tests/long/se/70.twolf/ref/x86/linux/simple-timing/config.ini

   1 [root]
   2 type=Root
   3 children=system
   4 full_system=false
   5 time_sync_enable=false
   6 time_sync_period=100000000000
   7 time_sync_spin_threshold=100000000
   8
   9 [system]
  10 type=System
  11 children=cpu membus physmem
  12 boot_osflags=a
  13 init_param=0
  14 kernel=
  15 load_addr_mask=1099511627775
  16 mem_mode=atomic
  17 memories=system.physmem
  18 num_work_ids=16
  19 readfile=
  20 symbolfile=
  21 work_begin_ckpt_count=0
  22 work_begin_cpu_id_exit=-1
  23 work_begin_exit_count=0
  24 work_cpus_ckpt_count=0
  25 work_end_ckpt_count=0
  26 work_end_exit_count=0
  27 work_item_id=-1
  28 system_port=system.membus.slave[0]
  29
  30 [system.cpu]
  31 type=TimingSimpleCPU
  32 children=dcache dtb icache interrupts itb l2cache toL2Bus tracer workload
  33 checker=Null
  34 clock=500
  35 cpu_id=0
  36 defer_registration=false
  37 do_checkpoint_insts=true
  38 do_quiesce=true
  39 do_statistics_insts=true
  40 dtb=system.cpu.dtb
  41 function_trace=false
  42 function_trace_start=0
  43 interrupts=system.cpu.interrupts
  44 itb=system.cpu.itb
  45 max_insts_all_threads=0
  46 max_insts_any_thread=0
  47 max_loads_all_threads=0
  48 max_loads_any_thread=0
  49 numThreads=1
  50 phase=0
  51 profile=0
  52 progress_interval=0
  53 system=system
  54 tracer=system.cpu.tracer
  55 workload=system.cpu.workload
  56 dcache_port=system.cpu.dcache.cpu_side
  57 icache_port=system.cpu.icache.cpu_side
  58
  59 [system.cpu.dcache]
  60 type=BaseCache
  61 addr_ranges=0:18446744073709551615
  62 assoc=2
  63 block_size=64
  64 forward_snoops=true
  65 hash_delay=1
  66 is_top_level=true
  67 latency=1000
  68 max_miss_count=0
  69 mshrs=10
  70 prefetch_on_access=false
  71 prefetcher=Null
  72 prioritizeRequests=false
  73 repl=Null
  74 size=262144
  75 subblock_size=0
  76 system=system
  77 tgts_per_mshr=5
  78 trace_addr=0
  79 two_queue=false
  80 write_buffers=8
  81 cpu_side=system.cpu.dcache_port
  82 mem_side=system.cpu.toL2Bus.slave[1]
  83
  84 [system.cpu.dtb]
  85 type=X86TLB
  86 children=walker
  87 size=64
  88 walker=system.cpu.dtb.walker
  89
  90 [system.cpu.dtb.walker]
  91 type=X86PagetableWalker
  92 system=system
  93 port=system.cpu.toL2Bus.slave[3]
  94
  95 [system.cpu.icache]
  96 type=BaseCache
  97 addr_ranges=0:18446744073709551615
  98 assoc=2
  99 block_size=64
 100 forward_snoops=true
 101 hash_delay=1
 102 is_top_level=true
 103 latency=1000
 104 max_miss_count=0
 105 mshrs=10
 106 prefetch_on_access=false
 107 prefetcher=Null
 108 prioritizeRequests=false
 109 repl=Null
 110 size=131072
 111 subblock_size=0
 112 system=system
 113 tgts_per_mshr=5
 114 trace_addr=0
 115 two_queue=false
 116 write_buffers=8
 117 cpu_side=system.cpu.icache_port
 118 mem_side=system.cpu.toL2Bus.slave[0]
 119
 120 [system.cpu.interrupts]
 121 type=X86LocalApic
 122 int_latency=1000
 123 pio_addr=2305843009213693952
 124 pio_latency=1000
 125 system=system
 126 int_master=system.membus.slave[2]
 127 int_slave=system.membus.master[2]
 128 pio=system.membus.master[1]
 129
 130 [system.cpu.itb]
 131 type=X86TLB
 132 children=walker
 133 size=64
 134 walker=system.cpu.itb.walker
 135
 136 [system.cpu.itb.walker]
 137 type=X86PagetableWalker
 138 system=system
 139 port=system.cpu.toL2Bus.slave[2]
 140
 141 [system.cpu.l2cache]
 142 type=BaseCache
 143 addr_ranges=0:18446744073709551615
 144 assoc=2
 145 block_size=64
 146 forward_snoops=true
 147 hash_delay=1
 148 is_top_level=false
 149 latency=10000
 150 max_miss_count=0
 151 mshrs=10
 152 prefetch_on_access=false
 153 prefetcher=Null
 154 prioritizeRequests=false
 155 repl=Null
 156 size=2097152
 157 subblock_size=0
 158 system=system
 159 tgts_per_mshr=5
 160 trace_addr=0
 161 two_queue=false
 162 write_buffers=8
 163 cpu_side=system.cpu.toL2Bus.master[0]
 164 mem_side=system.membus.slave[1]
 165
 166 [system.cpu.toL2Bus]
 167 type=CoherentBus
 168 block_size=64
 169 clock=1000
 170 header_cycles=1
 171 use_default_range=false
 172 width=64
 173 master=system.cpu.l2cache.cpu_side
 174 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
 175
 176 [system.cpu.tracer]
 177 type=ExeTracer
 178
 179 [system.cpu.workload]
 180 type=LiveProcess
 181 cmd=twolf smred
 182 cwd=build/X86/tests/fast/long/se/70.twolf/x86/linux/simple-timing
 183 egid=100
 184 env=
 185 errout=cerr
 186 euid=100
 187 executable=/dist/m5/cpu2000/binaries/x86/linux/twolf
 188 gid=100
 189 input=cin
 190 max_stack_size=67108864
 191 output=cout
 192 pid=100
 193 ppid=99
 194 simpoint=0
 195 system=system
 196 uid=100
 197
 198 [system.membus]
 199 type=CoherentBus
 200 block_size=64
 201 clock=1000
 202 header_cycles=1
 203 use_default_range=false
 204 width=64
 205 master=system.physmem.port[0] system.cpu.interrupts.pio system.cpu.interrupts.int_slave
 206 slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
 207
 208 [system.physmem]
 209 type=SimpleMemory
 210 conf_table_reported=false
 211 file=
 212 in_addr_map=true
 213 latency=30000
 214 latency_var=0
 215 null=false
 216 range=0:134217727
 217 zero=false
 218 port=system.membus.master[0]
 219