regressions: x86: stats updates due to new x87 insts
[gem5.git] / tests / long / se / 70.twolf / ref / x86 / linux / simple-timing / config.ini
1 [root]
2 type=Root
3 children=system
4 full_system=false
5 time_sync_enable=false
6 time_sync_period=100000000000
7 time_sync_spin_threshold=100000000
8
9 [system]
10 type=System
11 children=cpu membus physmem
12 boot_osflags=a
13 clock=1000
14 init_param=0
15 kernel=
16 load_addr_mask=1099511627775
17 mem_mode=timing
18 mem_ranges=
19 memories=system.physmem
20 num_work_ids=16
21 readfile=
22 symbolfile=
23 work_begin_ckpt_count=0
24 work_begin_cpu_id_exit=-1
25 work_begin_exit_count=0
26 work_cpus_ckpt_count=0
27 work_end_ckpt_count=0
28 work_end_exit_count=0
29 work_item_id=-1
30 system_port=system.membus.slave[0]
31
32 [system.cpu]
33 type=TimingSimpleCPU
34 children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
35 branchPred=Null
36 checker=Null
37 clock=500
38 cpu_id=0
39 do_checkpoint_insts=true
40 do_quiesce=true
41 do_statistics_insts=true
42 dtb=system.cpu.dtb
43 function_trace=false
44 function_trace_start=0
45 interrupts=system.cpu.interrupts
46 isa=system.cpu.isa
47 itb=system.cpu.itb
48 max_insts_all_threads=0
49 max_insts_any_thread=0
50 max_loads_all_threads=0
51 max_loads_any_thread=0
52 numThreads=1
53 profile=0
54 progress_interval=0
55 switched_out=false
56 system=system
57 tracer=system.cpu.tracer
58 workload=system.cpu.workload
59 dcache_port=system.cpu.dcache.cpu_side
60 icache_port=system.cpu.icache.cpu_side
61
62 [system.cpu.dcache]
63 type=BaseCache
64 addr_ranges=0:18446744073709551615
65 assoc=2
66 block_size=64
67 clock=500
68 forward_snoops=true
69 hit_latency=2
70 is_top_level=true
71 max_miss_count=0
72 mshrs=4
73 prefetch_on_access=false
74 prefetcher=Null
75 response_latency=2
76 size=262144
77 system=system
78 tgts_per_mshr=20
79 two_queue=false
80 write_buffers=8
81 cpu_side=system.cpu.dcache_port
82 mem_side=system.cpu.toL2Bus.slave[1]
83
84 [system.cpu.dtb]
85 type=X86TLB
86 children=walker
87 size=64
88 walker=system.cpu.dtb.walker
89
90 [system.cpu.dtb.walker]
91 type=X86PagetableWalker
92 clock=500
93 system=system
94 port=system.cpu.toL2Bus.slave[3]
95
96 [system.cpu.icache]
97 type=BaseCache
98 addr_ranges=0:18446744073709551615
99 assoc=2
100 block_size=64
101 clock=500
102 forward_snoops=true
103 hit_latency=2
104 is_top_level=true
105 max_miss_count=0
106 mshrs=4
107 prefetch_on_access=false
108 prefetcher=Null
109 response_latency=2
110 size=131072
111 system=system
112 tgts_per_mshr=20
113 two_queue=false
114 write_buffers=8
115 cpu_side=system.cpu.icache_port
116 mem_side=system.cpu.toL2Bus.slave[0]
117
118 [system.cpu.interrupts]
119 type=X86LocalApic
120 clock=8000
121 int_latency=1000
122 pio_addr=2305843009213693952
123 pio_latency=100000
124 system=system
125 int_master=system.membus.slave[2]
126 int_slave=system.membus.master[2]
127 pio=system.membus.master[1]
128
129 [system.cpu.isa]
130 type=X86ISA
131
132 [system.cpu.itb]
133 type=X86TLB
134 children=walker
135 size=64
136 walker=system.cpu.itb.walker
137
138 [system.cpu.itb.walker]
139 type=X86PagetableWalker
140 clock=500
141 system=system
142 port=system.cpu.toL2Bus.slave[2]
143
144 [system.cpu.l2cache]
145 type=BaseCache
146 addr_ranges=0:18446744073709551615
147 assoc=8
148 block_size=64
149 clock=500
150 forward_snoops=true
151 hit_latency=20
152 is_top_level=false
153 max_miss_count=0
154 mshrs=20
155 prefetch_on_access=false
156 prefetcher=Null
157 response_latency=20
158 size=2097152
159 system=system
160 tgts_per_mshr=12
161 two_queue=false
162 write_buffers=8
163 cpu_side=system.cpu.toL2Bus.master[0]
164 mem_side=system.membus.slave[1]
165
166 [system.cpu.toL2Bus]
167 type=CoherentBus
168 block_size=64
169 clock=500
170 header_cycles=1
171 system=system
172 use_default_range=false
173 width=32
174 master=system.cpu.l2cache.cpu_side
175 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
176
177 [system.cpu.tracer]
178 type=ExeTracer
179
180 [system.cpu.workload]
181 type=LiveProcess
182 cmd=twolf smred
183 cwd=build/X86/tests/opt/long/se/70.twolf/x86/linux/simple-timing
184 egid=100
185 env=
186 errout=cerr
187 euid=100
188 executable=/scratch/nilay/GEM5/dist/m5/cpu2000/binaries/x86/linux/twolf
189 gid=100
190 input=cin
191 max_stack_size=67108864
192 output=cout
193 pid=100
194 ppid=99
195 simpoint=0
196 system=system
197 uid=100
198
199 [system.membus]
200 type=CoherentBus
201 block_size=64
202 clock=1000
203 header_cycles=1
204 system=system
205 use_default_range=false
206 width=8
207 master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
208 slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
209
210 [system.physmem]
211 type=SimpleMemory
212 bandwidth=73.000000
213 clock=1000
214 conf_table_reported=false
215 in_addr_map=true
216 latency=30000
217 latency_var=0
218 null=false
219 range=0:134217727
220 zero=false
221 port=system.membus.master[0]
222