tests/opt/memory_map_offset.ys

   1 read_verilog << EOT
   2
   3 module top(...);
   4
   5 input [3:0] ra;
   6 input [3:0] wa;
   7
   8 input [15:0] wd;
   9 output [15:0] rd;
  10 input en, clk;
  11
  12 reg [15:0] mem[3:9];
  13
  14 always @(posedge clk)
  15         if (en)
  16                 mem[wa] <= wd;
  17
  18 assign rd = mem[ra];
  19
  20 endmodule
  21
  22 EOT
  23
  24 hierarchy -auto-top
  25 proc
  26 opt_clean
  27 memory_map
  28
  29 design -stash gate
  30
  31 read_verilog << EOT
  32
  33 module top(...);
  34
  35 input [3:0] ra;
  36 input [3:0] wa;
  37
  38 input [15:0] wd;
  39 output reg [15:0] rd;
  40 input en, clk;
  41
  42 reg [15:0] \mem[3] ;
  43 reg [15:0] \mem[4] ;
  44 reg [15:0] \mem[5] ;
  45 reg [15:0] \mem[6] ;
  46 reg [15:0] \mem[7] ;
  47 reg [15:0] \mem[8] ;
  48 reg [15:0] \mem[9] ;
  49
  50 always @(posedge clk) begin
  51         if (en && wa == 3)
  52                 \mem[3] <= wd;
  53         if (en && wa == 4)
  54                 \mem[4] <= wd;
  55         if (en && wa == 5)
  56                 \mem[5] <= wd;
  57         if (en && wa == 6)
  58                 \mem[6] <= wd;
  59         if (en && wa == 7)
  60                 \mem[7] <= wd;
  61         if (en && wa == 8)
  62                 \mem[8] <= wd;
  63         if (en && wa == 9)
  64                 \mem[9] <= wd;
  65 end
  66
  67 always @* begin
  68         rd = 16'bx;
  69         if (ra == 3)
  70                 rd = \mem[3] ;
  71         if (ra == 4)
  72                 rd = \mem[4] ;
  73         if (ra == 5)
  74                 rd = \mem[5] ;
  75         if (ra == 6)
  76                 rd = \mem[6] ;
  77         if (ra == 7)
  78                 rd = \mem[7] ;
  79         if (ra == 8)
  80                 rd = \mem[8] ;
  81         if (ra == 9)
  82                 rd = \mem[9] ;
  83 end
  84
  85 endmodule
  86
  87 EOT
  88
  89 hierarchy -auto-top
  90 proc
  91 opt_clean
  92
  93 design -stash gold
  94
  95 design -copy-from gold -as gold A:top
  96 design -copy-from gate -as gate A:top
  97
  98 equiv_make gold gate equiv
  99 equiv_induct -undef equiv
 100 equiv_status -assert equiv