tests/opt/opt_lut_ins.ys

   1 read_ilang << EOF
   2
   3 module \top
   4
   5   wire width 4 input 1 \A
   6
   7   wire output 2 \Y
   8
   9   cell $lut \lut
  10     parameter \LUT 16'1111110011000000
  11     parameter \WIDTH 4
  12     connect \A \A
  13     connect \Y \Y
  14   end
  15 end
  16
  17 EOF
  18
  19 equiv_opt -assert opt_lut_ins
  20
  21 design -load postopt
  22
  23 select -assert-count 1 t:$lut r:WIDTH=3 %i