Merge zizzer:/z/m5/Bitkeeper/newmem
[gem5.git] / tests / quick / 00.hello / ref / alpha / linux / simple-timing / config.ini
1 [root]
2 type=Root
3 children=system
4 checkpoint=
5 clock=1000000000000
6 max_tick=0
7 output_file=cout
8 progress_interval=0
9
10 [debug]
11 break_cycles=
12
13 [exetrace]
14 intel_format=false
15 pc_symbol=true
16 print_cpseq=false
17 print_cycle=true
18 print_data=true
19 print_effaddr=true
20 print_fetchseq=false
21 print_iregs=false
22 print_opclass=true
23 print_thread=true
24 speculative=true
25 trace_system=client
26
27 [serialize]
28 count=10
29 cycle=0
30 dir=cpt.%012d
31 period=0
32
33 [stats]
34 descriptions=true
35 dump_cycle=0
36 dump_period=0
37 dump_reset=false
38 ignore_events=
39 mysql_db=
40 mysql_host=
41 mysql_password=
42 mysql_user=
43 project_name=test
44 simulation_name=test
45 simulation_sample=0
46 text_compat=true
47 text_file=m5stats.txt
48
49 [system]
50 type=System
51 children=cpu membus physmem
52 mem_mode=atomic
53 physmem=system.physmem
54
55 [system.cpu]
56 type=TimingSimpleCPU
57 children=dcache icache l2cache toL2Bus workload
58 clock=1
59 defer_registration=false
60 function_trace=false
61 function_trace_start=0
62 max_insts_all_threads=0
63 max_insts_any_thread=0
64 max_loads_all_threads=0
65 max_loads_any_thread=0
66 mem=system.cpu.dcache
67 progress_interval=0
68 system=system
69 workload=system.cpu.workload
70 dcache_port=system.cpu.dcache.cpu_side
71 icache_port=system.cpu.icache.cpu_side
72
73 [system.cpu.dcache]
74 type=BaseCache
75 adaptive_compression=false
76 assoc=2
77 block_size=64
78 compressed_bus=false
79 compression_latency=0
80 do_copy=false
81 hash_delay=1
82 hit_latency=1
83 latency=1
84 lifo=false
85 max_miss_count=0
86 mshrs=10
87 prefetch_access=false
88 prefetch_cache_check_push=true
89 prefetch_data_accesses_only=false
90 prefetch_degree=1
91 prefetch_latency=10
92 prefetch_miss=false
93 prefetch_past_page=false
94 prefetch_policy=none
95 prefetch_serial_squash=false
96 prefetch_use_cpu_id=true
97 prefetcher_size=100
98 prioritizeRequests=false
99 protocol=Null
100 repl=Null
101 size=262144
102 split=false
103 split_size=0
104 store_compressed=false
105 subblock_size=0
106 tgts_per_mshr=5
107 trace_addr=0
108 two_queue=false
109 write_buffers=8
110 cpu_side=system.cpu.dcache_port
111 mem_side=system.cpu.toL2Bus.port[1]
112
113 [system.cpu.icache]
114 type=BaseCache
115 adaptive_compression=false
116 assoc=2
117 block_size=64
118 compressed_bus=false
119 compression_latency=0
120 do_copy=false
121 hash_delay=1
122 hit_latency=1
123 latency=1
124 lifo=false
125 max_miss_count=0
126 mshrs=10
127 prefetch_access=false
128 prefetch_cache_check_push=true
129 prefetch_data_accesses_only=false
130 prefetch_degree=1
131 prefetch_latency=10
132 prefetch_miss=false
133 prefetch_past_page=false
134 prefetch_policy=none
135 prefetch_serial_squash=false
136 prefetch_use_cpu_id=true
137 prefetcher_size=100
138 prioritizeRequests=false
139 protocol=Null
140 repl=Null
141 size=131072
142 split=false
143 split_size=0
144 store_compressed=false
145 subblock_size=0
146 tgts_per_mshr=5
147 trace_addr=0
148 two_queue=false
149 write_buffers=8
150 cpu_side=system.cpu.icache_port
151 mem_side=system.cpu.toL2Bus.port[0]
152
153 [system.cpu.l2cache]
154 type=BaseCache
155 adaptive_compression=false
156 assoc=2
157 block_size=64
158 compressed_bus=false
159 compression_latency=0
160 do_copy=false
161 hash_delay=1
162 hit_latency=1
163 latency=1
164 lifo=false
165 max_miss_count=0
166 mshrs=10
167 prefetch_access=false
168 prefetch_cache_check_push=true
169 prefetch_data_accesses_only=false
170 prefetch_degree=1
171 prefetch_latency=10
172 prefetch_miss=false
173 prefetch_past_page=false
174 prefetch_policy=none
175 prefetch_serial_squash=false
176 prefetch_use_cpu_id=true
177 prefetcher_size=100
178 prioritizeRequests=false
179 protocol=Null
180 repl=Null
181 size=2097152
182 split=false
183 split_size=0
184 store_compressed=false
185 subblock_size=0
186 tgts_per_mshr=5
187 trace_addr=0
188 two_queue=false
189 write_buffers=8
190 cpu_side=system.cpu.toL2Bus.port[2]
191 mem_side=system.membus.port[1]
192
193 [system.cpu.toL2Bus]
194 type=Bus
195 bus_id=0
196 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
197
198 [system.cpu.workload]
199 type=LiveProcess
200 cmd=hello
201 egid=100
202 env=
203 euid=100
204 executable=tests/test-progs/hello/bin/alpha/linux/hello
205 gid=100
206 input=cin
207 output=cout
208 pid=100
209 ppid=99
210 system=system
211 uid=100
212
213 [system.membus]
214 type=Bus
215 bus_id=0
216 port=system.physmem.port system.cpu.l2cache.mem_side
217
218 [system.physmem]
219 type=PhysicalMemory
220 file=
221 latency=1
222 range=0:134217727
223 port=system.membus.port[0]
224
225 [trace]
226 bufsize=0
227 cycle=0
228 dump_on_exit=false
229 file=cout
230 flags=
231 ignore=
232 start=0
233