8d1301d9c65a06d8a2c5988bba9958253e632a1a
5 time_sync_period=100000000000
6 time_sync_spin_threshold=100000000
10 children=bridge cpu diskmem intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver
11 boot_cpu_frequency=500
14 boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB slram=slram0,0x8000000,+0x8000000 mtdparts=slram0:- root=/dev/mtdblock0
18 kernel=/chips/pd/randd/dist/binaries/vmlinux.arm
19 load_addr_mask=268435455
20 machine_type=RealView_PBX
23 physmem=system.physmem
24 readfile=tests/halt.sh
26 work_begin_ckpt_count=0
27 work_begin_cpu_id_exit=-1
28 work_begin_exit_count=0
29 work_cpus_ckpt_count=0
37 filter_ranges_a=0:18446744073709551615
38 filter_ranges_b=0:134217727
45 side_a=system.iobus.port[0]
46 side_b=system.membus.port[0]
50 children=dcache dtb icache interrupts itb tracer
54 defer_registration=false
55 do_checkpoint_insts=true
57 do_statistics_insts=true
60 function_trace_start=0
61 interrupts=system.cpu.interrupts
63 max_insts_all_threads=0
64 max_insts_any_thread=0
65 max_loads_all_threads=0
66 max_loads_any_thread=0
72 tracer=system.cpu.tracer
73 dcache_port=system.cpu.dcache.cpu_side
74 icache_port=system.cpu.icache.cpu_side
78 addr_range=0:18446744073709551615
88 prefetch_data_accesses_only=false
90 prefetch_latency=10000
91 prefetch_on_access=false
92 prefetch_past_page=false
94 prefetch_serial_squash=false
95 prefetch_use_cpu_id=true
97 prioritizeRequests=false
105 cpu_side=system.cpu.dcache_port
106 mem_side=system.toL2Bus.port[2]
112 walker=system.cpu.dtb.walker
114 [system.cpu.dtb.walker]
119 port=system.toL2Bus.port[4]
123 addr_range=0:18446744073709551615
133 prefetch_data_accesses_only=false
135 prefetch_latency=10000
136 prefetch_on_access=false
137 prefetch_past_page=false
139 prefetch_serial_squash=false
140 prefetch_use_cpu_id=true
142 prioritizeRequests=false
150 cpu_side=system.cpu.icache_port
151 mem_side=system.toL2Bus.port[1]
153 [system.cpu.interrupts]
160 walker=system.cpu.itb.walker
162 [system.cpu.itb.walker]
167 port=system.toL2Bus.port[3]
174 file=/chips/pd/randd/dist/disks/ael-arm.ext2
178 range=134217728:268435455
180 port=system.membus.port[1]
192 use_default_range=false
194 port=system.bridge.side_a system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc_fake.pio system.realview.flash_fake.pio system.iocache.cpu_side system.realview.cf_ctrl.config system.realview.cf_ctrl.dma system.realview.clcd.dma
198 addr_range=0:134217727
208 prefetch_data_accesses_only=false
210 prefetch_latency=500000
211 prefetch_on_access=false
212 prefetch_past_page=false
214 prefetch_serial_squash=false
215 prefetch_use_cpu_id=true
217 prioritizeRequests=false
225 cpu_side=system.iobus.port[25]
226 mem_side=system.membus.port[6]
230 addr_range=0:18446744073709551615
240 prefetch_data_accesses_only=false
242 prefetch_latency=100000
243 prefetch_on_access=false
244 prefetch_past_page=false
246 prefetch_serial_squash=false
247 prefetch_use_cpu_id=true
249 prioritizeRequests=false
257 cpu_side=system.toL2Bus.port[0]
258 mem_side=system.membus.port[7]
262 children=badaddr_responder
267 use_default_range=false
269 default=system.membus.badaddr_responder.pio
270 port=system.bridge.side_b system.diskmem.port[0] system.physmem.port[0] system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.iocache.mem_side system.l2c.mem_side
272 [system.membus.badaddr_responder]
277 platform=system.realview
280 ret_data32=4294967295
281 ret_data64=18446744073709551615
286 pio=system.membus.default
296 port=system.membus.port[2]
300 children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake mmc_fake realview_io rtc_fake sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake
301 intrctrl=system.intrctrl
304 [system.realview.a9scu]
308 platform=system.realview
310 pio=system.membus.port[5]
312 [system.realview.aaci_fake]
318 platform=system.realview
320 pio=system.iobus.port[21]
322 [system.realview.cf_ctrl]
366 max_backoff_delay=10000000
367 min_backoff_delay=4000
372 platform=system.realview
374 config=system.iobus.port[26]
375 dma=system.iobus.port[27]
376 pio=system.iobus.port[8]
378 [system.realview.clcd]
382 gic=system.realview.gic
384 max_backoff_delay=10000000
385 min_backoff_delay=4000
388 platform=system.realview
391 dma=system.iobus.port[28]
392 pio=system.iobus.port[5]
394 [system.realview.dmac_fake]
400 platform=system.realview
402 pio=system.iobus.port[9]
404 [system.realview.flash_fake]
409 platform=system.realview
412 ret_data32=4294967295
413 ret_data64=18446744073709551615
418 pio=system.iobus.port[24]
420 [system.realview.gic]
428 platform=system.realview
430 pio=system.membus.port[3]
432 [system.realview.gpio0_fake]
438 platform=system.realview
440 pio=system.iobus.port[16]
442 [system.realview.gpio1_fake]
448 platform=system.realview
450 pio=system.iobus.port[17]
452 [system.realview.gpio2_fake]
458 platform=system.realview
460 pio=system.iobus.port[18]
462 [system.realview.kmi0]
465 gic=system.realview.gic
471 platform=system.realview
474 pio=system.iobus.port[6]
476 [system.realview.kmi1]
479 gic=system.realview.gic
485 platform=system.realview
488 pio=system.iobus.port[7]
490 [system.realview.l2x0_fake]
495 platform=system.realview
498 ret_data32=4294967295
499 ret_data64=18446744073709551615
504 pio=system.membus.port[4]
506 [system.realview.mmc_fake]
512 platform=system.realview
514 pio=system.iobus.port[22]
516 [system.realview.realview_io]
521 platform=system.realview
524 pio=system.iobus.port[2]
526 [system.realview.rtc_fake]
532 platform=system.realview
534 pio=system.iobus.port[23]
536 [system.realview.sci_fake]
542 platform=system.realview
544 pio=system.iobus.port[20]
546 [system.realview.smc_fake]
552 platform=system.realview
554 pio=system.iobus.port[13]
556 [system.realview.sp810_fake]
562 platform=system.realview
564 pio=system.iobus.port[14]
566 [system.realview.ssp_fake]
572 platform=system.realview
574 pio=system.iobus.port[19]
576 [system.realview.timer0]
581 gic=system.realview.gic
586 platform=system.realview
588 pio=system.iobus.port[3]
590 [system.realview.timer1]
595 gic=system.realview.gic
600 platform=system.realview
602 pio=system.iobus.port[4]
604 [system.realview.uart]
607 gic=system.realview.gic
612 platform=system.realview
614 terminal=system.terminal
615 pio=system.iobus.port[1]
617 [system.realview.uart1_fake]
623 platform=system.realview
625 pio=system.iobus.port[10]
627 [system.realview.uart2_fake]
633 platform=system.realview
635 pio=system.iobus.port[11]
637 [system.realview.uart3_fake]
643 platform=system.realview
645 pio=system.iobus.port[12]
647 [system.realview.watchdog_fake]
653 platform=system.realview
655 pio=system.iobus.port[15]
659 intr_control=system.intrctrl
670 use_default_range=false
672 port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port