26263fe30cc5fa0e073a0d6b02897d9f091b5c8f
8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
13 children=bridge clk_domain cpu0 cpu1 cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami voltage_domain
14 boot_cpu_frequency=500
15 boot_osflags=root=/dev/hda1 console=ttyS0
17 clk_domain=system.clk_domain
18 console=/work/gem5/dist/binaries/console
21 kernel=/work/gem5/dist/binaries/vmlinux
22 kernel_addr_check=true
23 load_addr_mask=1099511627775
26 mem_ranges=0:134217727
27 memories=system.physmem
28 mmap_using_noreserve=false
31 pal=/work/gem5/dist/binaries/ts_osfpal
32 readfile=/work/gem5/outgoing/gem5_2/tests/halt.sh
36 work_begin_ckpt_count=0
37 work_begin_cpu_id_exit=-1
38 work_begin_exit_count=0
39 work_cpus_ckpt_count=0
43 system_port=system.membus.slave[0]
47 clk_domain=system.clk_domain
50 ranges=8796093022208:18446744073709551615
53 master=system.iobus.slave[0]
54 slave=system.membus.master[0]
62 voltage_domain=system.voltage_domain
66 children=dcache dtb icache interrupts isa itb tracer
69 clk_domain=system.cpu_clk_domain
71 do_checkpoint_insts=true
73 do_statistics_insts=true
78 function_trace_start=0
79 interrupts=system.cpu0.interrupts
82 max_insts_all_threads=0
83 max_insts_any_thread=0
84 max_loads_all_threads=0
85 max_loads_any_thread=0
90 simulate_data_stalls=false
91 simulate_inst_stalls=false
95 tracer=system.cpu0.tracer
98 dcache_port=system.cpu0.dcache.cpu_side
99 icache_port=system.cpu0.icache.cpu_side
104 addr_ranges=0:18446744073709551615
106 clk_domain=system.cpu_clk_domain
107 clusivity=mostly_incl
108 demand_mshr_reserve=1
115 prefetch_on_access=false
118 sequential_access=false
121 tags=system.cpu0.dcache.tags
124 writeback_clean=false
125 cpu_side=system.cpu0.dcache_port
126 mem_side=system.toL2Bus.slave[1]
128 [system.cpu0.dcache.tags]
132 clk_domain=system.cpu_clk_domain
135 sequential_access=false
146 addr_ranges=0:18446744073709551615
148 clk_domain=system.cpu_clk_domain
149 clusivity=mostly_incl
150 demand_mshr_reserve=1
157 prefetch_on_access=false
160 sequential_access=false
163 tags=system.cpu0.icache.tags
167 cpu_side=system.cpu0.icache_port
168 mem_side=system.toL2Bus.slave[0]
170 [system.cpu0.icache.tags]
174 clk_domain=system.cpu_clk_domain
177 sequential_access=false
180 [system.cpu0.interrupts]
200 children=dcache dtb icache interrupts isa itb tracer
203 clk_domain=system.cpu_clk_domain
205 do_checkpoint_insts=true
207 do_statistics_insts=true
212 function_trace_start=0
213 interrupts=system.cpu1.interrupts
216 max_insts_all_threads=0
217 max_insts_any_thread=0
218 max_loads_all_threads=0
219 max_loads_any_thread=0
223 simpoint_start_insts=
224 simulate_data_stalls=false
225 simulate_inst_stalls=false
229 tracer=system.cpu1.tracer
232 dcache_port=system.cpu1.dcache.cpu_side
233 icache_port=system.cpu1.icache.cpu_side
238 addr_ranges=0:18446744073709551615
240 clk_domain=system.cpu_clk_domain
241 clusivity=mostly_incl
242 demand_mshr_reserve=1
249 prefetch_on_access=false
252 sequential_access=false
255 tags=system.cpu1.dcache.tags
258 writeback_clean=false
259 cpu_side=system.cpu1.dcache_port
260 mem_side=system.toL2Bus.slave[3]
262 [system.cpu1.dcache.tags]
266 clk_domain=system.cpu_clk_domain
269 sequential_access=false
280 addr_ranges=0:18446744073709551615
282 clk_domain=system.cpu_clk_domain
283 clusivity=mostly_incl
284 demand_mshr_reserve=1
291 prefetch_on_access=false
294 sequential_access=false
297 tags=system.cpu1.icache.tags
301 cpu_side=system.cpu1.icache_port
302 mem_side=system.toL2Bus.slave[2]
304 [system.cpu1.icache.tags]
308 clk_domain=system.cpu_clk_domain
311 sequential_access=false
314 [system.cpu1.interrupts]
332 [system.cpu_clk_domain]
338 voltage_domain=system.voltage_domain
346 image=system.disk0.image
351 child=system.disk0.image.child
357 [system.disk0.image.child]
360 image_file=/work/gem5/dist/disks/linux-latest.img
369 image=system.disk2.image
374 child=system.disk2.image.child
380 [system.disk2.image.child]
383 image_file=/work/gem5/dist/disks/linux-bigswap2.img
386 [system.dvfs_handler]
391 sys_clk_domain=system.clk_domain
392 transition_latency=100000000
401 clk_domain=system.clk_domain
406 use_default_range=false
408 master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side
409 slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
414 addr_ranges=0:134217727
416 clk_domain=system.clk_domain
417 clusivity=mostly_incl
418 demand_mshr_reserve=1
425 prefetch_on_access=false
428 sequential_access=false
431 tags=system.iocache.tags
434 writeback_clean=false
435 cpu_side=system.iobus.master[27]
436 mem_side=system.membus.slave[2]
438 [system.iocache.tags]
442 clk_domain=system.clk_domain
445 sequential_access=false
451 addr_ranges=0:18446744073709551615
453 clk_domain=system.cpu_clk_domain
454 clusivity=mostly_incl
455 demand_mshr_reserve=1
462 prefetch_on_access=false
465 sequential_access=false
471 writeback_clean=false
472 cpu_side=system.toL2Bus.master[0]
473 mem_side=system.membus.slave[1]
479 clk_domain=system.cpu_clk_domain
482 sequential_access=false
487 children=badaddr_responder
488 clk_domain=system.clk_domain
494 snoop_response_latency=4
496 use_default_range=false
498 default=system.membus.badaddr_responder.pio
499 master=system.bridge.slave system.physmem.port
500 slave=system.system_port system.l2c.mem_side system.iocache.mem_side
502 [system.membus.badaddr_responder]
504 clk_domain=system.clk_domain
512 ret_data32=4294967295
513 ret_data64=18446744073709551615
518 pio=system.membus.default
523 clk_domain=system.clk_domain
524 conf_table_reported=true
531 port=system.membus.master[1]
536 disk=system.simple_disk.disk
540 [system.simple_disk.disk]
543 image_file=/work/gem5/dist/disks/linux-latest.img
549 intr_control=system.intrctrl
556 children=snoop_filter
557 clk_domain=system.cpu_clk_domain
562 snoop_filter=system.toL2Bus.snoop_filter
563 snoop_response_latency=1
565 use_default_range=false
567 master=system.l2c.cpu_side
568 slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
570 [system.toL2Bus.snoop_filter]
579 children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip uart
581 intrctrl=system.intrctrl
584 [system.tsunami.backdoor]
586 clk_domain=system.clk_domain
588 disk=system.simple_disk
590 pio_addr=8804682956800
592 platform=system.tsunami
594 terminal=system.terminal
595 pio=system.iobus.master[24]
597 [system.tsunami.cchip]
599 clk_domain=system.clk_domain
601 pio_addr=8803072344064
604 tsunami=system.tsunami
605 pio=system.iobus.master[0]
607 [system.tsunami.ethernet]
647 MSICAPNextCapability=0
651 MSIXCAPNextCapability=0
661 PMCAPNextCapability=0
666 PXCAPDevCapabilities=0
673 PXCAPNextCapability=0
681 clk_domain=system.clk_domain
691 hardware_address=00:90:00:00:00:01
692 host=system.tsunami.pchip
707 dma=system.iobus.slave[2]
708 pio=system.iobus.master[26]
710 [system.tsunami.fake_OROM]
712 clk_domain=system.clk_domain
715 pio_addr=8796093677568
720 ret_data32=4294967295
721 ret_data64=18446744073709551615
726 pio=system.iobus.master[8]
728 [system.tsunami.fake_ata0]
730 clk_domain=system.clk_domain
733 pio_addr=8804615848432
738 ret_data32=4294967295
739 ret_data64=18446744073709551615
744 pio=system.iobus.master[19]
746 [system.tsunami.fake_ata1]
748 clk_domain=system.clk_domain
751 pio_addr=8804615848304
756 ret_data32=4294967295
757 ret_data64=18446744073709551615
762 pio=system.iobus.master[20]
764 [system.tsunami.fake_pnp_addr]
766 clk_domain=system.clk_domain
769 pio_addr=8804615848569
774 ret_data32=4294967295
775 ret_data64=18446744073709551615
780 pio=system.iobus.master[9]
782 [system.tsunami.fake_pnp_read0]
784 clk_domain=system.clk_domain
787 pio_addr=8804615848451
792 ret_data32=4294967295
793 ret_data64=18446744073709551615
798 pio=system.iobus.master[11]
800 [system.tsunami.fake_pnp_read1]
802 clk_domain=system.clk_domain
805 pio_addr=8804615848515
810 ret_data32=4294967295
811 ret_data64=18446744073709551615
816 pio=system.iobus.master[12]
818 [system.tsunami.fake_pnp_read2]
820 clk_domain=system.clk_domain
823 pio_addr=8804615848579
828 ret_data32=4294967295
829 ret_data64=18446744073709551615
834 pio=system.iobus.master[13]
836 [system.tsunami.fake_pnp_read3]
838 clk_domain=system.clk_domain
841 pio_addr=8804615848643
846 ret_data32=4294967295
847 ret_data64=18446744073709551615
852 pio=system.iobus.master[14]
854 [system.tsunami.fake_pnp_read4]
856 clk_domain=system.clk_domain
859 pio_addr=8804615848707
864 ret_data32=4294967295
865 ret_data64=18446744073709551615
870 pio=system.iobus.master[15]
872 [system.tsunami.fake_pnp_read5]
874 clk_domain=system.clk_domain
877 pio_addr=8804615848771
882 ret_data32=4294967295
883 ret_data64=18446744073709551615
888 pio=system.iobus.master[16]
890 [system.tsunami.fake_pnp_read6]
892 clk_domain=system.clk_domain
895 pio_addr=8804615848835
900 ret_data32=4294967295
901 ret_data64=18446744073709551615
906 pio=system.iobus.master[17]
908 [system.tsunami.fake_pnp_read7]
910 clk_domain=system.clk_domain
913 pio_addr=8804615848899
918 ret_data32=4294967295
919 ret_data64=18446744073709551615
924 pio=system.iobus.master[18]
926 [system.tsunami.fake_pnp_write]
928 clk_domain=system.clk_domain
931 pio_addr=8804615850617
936 ret_data32=4294967295
937 ret_data64=18446744073709551615
942 pio=system.iobus.master[10]
944 [system.tsunami.fake_ppc]
946 clk_domain=system.clk_domain
949 pio_addr=8804615848891
954 ret_data32=4294967295
955 ret_data64=18446744073709551615
960 pio=system.iobus.master[7]
962 [system.tsunami.fake_sm_chip]
964 clk_domain=system.clk_domain
967 pio_addr=8804615848816
972 ret_data32=4294967295
973 ret_data64=18446744073709551615
978 pio=system.iobus.master[2]
980 [system.tsunami.fake_uart1]
982 clk_domain=system.clk_domain
985 pio_addr=8804615848696
990 ret_data32=4294967295
991 ret_data64=18446744073709551615
996 pio=system.iobus.master[3]
998 [system.tsunami.fake_uart2]
1000 clk_domain=system.clk_domain
1003 pio_addr=8804615848936
1008 ret_data32=4294967295
1009 ret_data64=18446744073709551615
1014 pio=system.iobus.master[4]
1016 [system.tsunami.fake_uart3]
1018 clk_domain=system.clk_domain
1021 pio_addr=8804615848680
1026 ret_data32=4294967295
1027 ret_data64=18446744073709551615
1032 pio=system.iobus.master[5]
1034 [system.tsunami.fake_uart4]
1036 clk_domain=system.clk_domain
1039 pio_addr=8804615848944
1044 ret_data32=4294967295
1045 ret_data64=18446744073709551615
1050 pio=system.iobus.master[6]
1054 clk_domain=system.clk_domain
1055 devicename=FrameBuffer
1057 pio_addr=8804615848912
1060 pio=system.iobus.master[21]
1062 [system.tsunami.ide]
1101 MSICAPMsgUpperAddr=0
1102 MSICAPNextCapability=0
1106 MSIXCAPNextCapability=0
1116 PMCAPNextCapability=0
1121 PXCAPDevCapabilities=0
1128 PXCAPNextCapability=0
1136 clk_domain=system.clk_domain
1137 config_latency=20000
1139 disks=system.disk0 system.disk2
1141 host=system.tsunami.pchip
1148 dma=system.iobus.slave[1]
1149 pio=system.iobus.master[25]
1153 clk_domain=system.clk_domain
1156 pio_addr=8804615847936
1159 time=Thu Jan 1 00:00:00 2009
1160 tsunami=system.tsunami
1162 pio=system.iobus.master[22]
1164 [system.tsunami.pchip]
1166 clk_domain=system.clk_domain
1167 conf_base=8804649402368
1172 pci_mem_base=8796093022208
1173 pci_pio_base=8804615847936
1174 pio_addr=8802535473152
1176 platform=system.tsunami
1178 tsunami=system.tsunami
1179 pio=system.iobus.master[1]
1181 [system.tsunami.uart]
1183 clk_domain=system.clk_domain
1185 pio_addr=8804615848952
1187 platform=system.tsunami
1189 terminal=system.terminal
1190 pio=system.iobus.master[23]
1192 [system.voltage_domain]