54bf6e9287d71bbcb1e6c0c0fa62e8cda1a3bc11
[gem5.git] / tests / quick / fs / 10.linux-boot / ref / alpha / linux / tsunami-simple-timing / config.ini
1 [root]
2 type=Root
3 children=system
4 full_system=true
5 time_sync_enable=false
6 time_sync_period=100000000000
7 time_sync_spin_threshold=100000000
8
9 [system]
10 type=LinuxAlphaSystem
11 children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain
12 boot_cpu_frequency=500
13 boot_osflags=root=/dev/hda1 console=ttyS0
14 cache_line_size=64
15 clk_domain=system.clk_domain
16 console=/dist/m5/system/binaries/console
17 init_param=0
18 kernel=/dist/m5/system/binaries/vmlinux
19 load_addr_mask=1099511627775
20 mem_mode=timing
21 mem_ranges=0:134217727
22 memories=system.physmem
23 num_work_ids=16
24 pal=/dist/m5/system/binaries/ts_osfpal
25 readfile=tests/halt.sh
26 symbolfile=
27 system_rev=1024
28 system_type=34
29 work_begin_ckpt_count=0
30 work_begin_cpu_id_exit=-1
31 work_begin_exit_count=0
32 work_cpus_ckpt_count=0
33 work_end_ckpt_count=0
34 work_end_exit_count=0
35 work_item_id=-1
36 system_port=system.membus.slave[0]
37
38 [system.bridge]
39 type=Bridge
40 clk_domain=system.clk_domain
41 delay=50000
42 ranges=8796093022208:18446744073709551615
43 req_size=16
44 resp_size=16
45 master=system.iobus.slave[0]
46 slave=system.membus.master[0]
47
48 [system.clk_domain]
49 type=SrcClockDomain
50 clock=1000
51 voltage_domain=system.voltage_domain
52
53 [system.cpu]
54 type=TimingSimpleCPU
55 children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer
56 checker=Null
57 clk_domain=system.cpu_clk_domain
58 cpu_id=0
59 do_checkpoint_insts=true
60 do_quiesce=true
61 do_statistics_insts=true
62 dtb=system.cpu.dtb
63 function_trace=false
64 function_trace_start=0
65 interrupts=system.cpu.interrupts
66 isa=system.cpu.isa
67 itb=system.cpu.itb
68 max_insts_all_threads=0
69 max_insts_any_thread=0
70 max_loads_all_threads=0
71 max_loads_any_thread=0
72 numThreads=1
73 profile=0
74 progress_interval=0
75 simpoint_start_insts=
76 switched_out=false
77 system=system
78 tracer=system.cpu.tracer
79 workload=
80 dcache_port=system.cpu.dcache.cpu_side
81 icache_port=system.cpu.icache.cpu_side
82
83 [system.cpu.dcache]
84 type=BaseCache
85 children=tags
86 addr_ranges=0:18446744073709551615
87 assoc=4
88 clk_domain=system.cpu_clk_domain
89 forward_snoops=true
90 hit_latency=2
91 is_top_level=true
92 max_miss_count=0
93 mshrs=4
94 prefetch_on_access=false
95 prefetcher=Null
96 response_latency=2
97 size=32768
98 system=system
99 tags=system.cpu.dcache.tags
100 tgts_per_mshr=20
101 two_queue=false
102 write_buffers=8
103 cpu_side=system.cpu.dcache_port
104 mem_side=system.cpu.toL2Bus.slave[1]
105
106 [system.cpu.dcache.tags]
107 type=LRU
108 assoc=4
109 block_size=64
110 clk_domain=system.cpu_clk_domain
111 hit_latency=2
112 size=32768
113
114 [system.cpu.dtb]
115 type=AlphaTLB
116 size=64
117
118 [system.cpu.icache]
119 type=BaseCache
120 children=tags
121 addr_ranges=0:18446744073709551615
122 assoc=1
123 clk_domain=system.cpu_clk_domain
124 forward_snoops=true
125 hit_latency=2
126 is_top_level=true
127 max_miss_count=0
128 mshrs=4
129 prefetch_on_access=false
130 prefetcher=Null
131 response_latency=2
132 size=32768
133 system=system
134 tags=system.cpu.icache.tags
135 tgts_per_mshr=20
136 two_queue=false
137 write_buffers=8
138 cpu_side=system.cpu.icache_port
139 mem_side=system.cpu.toL2Bus.slave[0]
140
141 [system.cpu.icache.tags]
142 type=LRU
143 assoc=1
144 block_size=64
145 clk_domain=system.cpu_clk_domain
146 hit_latency=2
147 size=32768
148
149 [system.cpu.interrupts]
150 type=AlphaInterrupts
151
152 [system.cpu.isa]
153 type=AlphaISA
154
155 [system.cpu.itb]
156 type=AlphaTLB
157 size=48
158
159 [system.cpu.l2cache]
160 type=BaseCache
161 children=tags
162 addr_ranges=0:18446744073709551615
163 assoc=8
164 clk_domain=system.cpu_clk_domain
165 forward_snoops=true
166 hit_latency=20
167 is_top_level=false
168 max_miss_count=0
169 mshrs=20
170 prefetch_on_access=false
171 prefetcher=Null
172 response_latency=20
173 size=4194304
174 system=system
175 tags=system.cpu.l2cache.tags
176 tgts_per_mshr=12
177 two_queue=false
178 write_buffers=8
179 cpu_side=system.cpu.toL2Bus.master[0]
180 mem_side=system.membus.slave[1]
181
182 [system.cpu.l2cache.tags]
183 type=LRU
184 assoc=8
185 block_size=64
186 clk_domain=system.cpu_clk_domain
187 hit_latency=20
188 size=4194304
189
190 [system.cpu.toL2Bus]
191 type=CoherentBus
192 clk_domain=system.cpu_clk_domain
193 header_cycles=1
194 system=system
195 use_default_range=false
196 width=32
197 master=system.cpu.l2cache.cpu_side
198 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
199
200 [system.cpu.tracer]
201 type=ExeTracer
202
203 [system.cpu_clk_domain]
204 type=SrcClockDomain
205 clock=500
206 voltage_domain=system.voltage_domain
207
208 [system.disk0]
209 type=IdeDisk
210 children=image
211 delay=1000000
212 driveID=master
213 image=system.disk0.image
214
215 [system.disk0.image]
216 type=CowDiskImage
217 children=child
218 child=system.disk0.image.child
219 image_file=
220 read_only=false
221 table_size=65536
222
223 [system.disk0.image.child]
224 type=RawDiskImage
225 image_file=/dist/m5/system/disks/linux-latest.img
226 read_only=true
227
228 [system.disk2]
229 type=IdeDisk
230 children=image
231 delay=1000000
232 driveID=master
233 image=system.disk2.image
234
235 [system.disk2.image]
236 type=CowDiskImage
237 children=child
238 child=system.disk2.image.child
239 image_file=
240 read_only=false
241 table_size=65536
242
243 [system.disk2.image.child]
244 type=RawDiskImage
245 image_file=/dist/m5/system/disks/linux-bigswap2.img
246 read_only=true
247
248 [system.intrctrl]
249 type=IntrControl
250 sys=system
251
252 [system.iobus]
253 type=NoncoherentBus
254 clk_domain=system.clk_domain
255 header_cycles=1
256 use_default_range=true
257 width=8
258 default=system.tsunami.pciconfig.pio
259 master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side
260 slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
261
262 [system.iocache]
263 type=BaseCache
264 children=tags
265 addr_ranges=0:134217727
266 assoc=8
267 clk_domain=system.clk_domain
268 forward_snoops=false
269 hit_latency=50
270 is_top_level=true
271 max_miss_count=0
272 mshrs=20
273 prefetch_on_access=false
274 prefetcher=Null
275 response_latency=50
276 size=1024
277 system=system
278 tags=system.iocache.tags
279 tgts_per_mshr=12
280 two_queue=false
281 write_buffers=8
282 cpu_side=system.iobus.master[29]
283 mem_side=system.membus.slave[2]
284
285 [system.iocache.tags]
286 type=LRU
287 assoc=8
288 block_size=64
289 clk_domain=system.clk_domain
290 hit_latency=50
291 size=1024
292
293 [system.membus]
294 type=CoherentBus
295 children=badaddr_responder
296 clk_domain=system.clk_domain
297 header_cycles=1
298 system=system
299 use_default_range=false
300 width=8
301 default=system.membus.badaddr_responder.pio
302 master=system.bridge.slave system.physmem.port
303 slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
304
305 [system.membus.badaddr_responder]
306 type=IsaFake
307 clk_domain=system.clk_domain
308 fake_mem=false
309 pio_addr=0
310 pio_latency=100000
311 pio_size=8
312 ret_bad_addr=true
313 ret_data16=65535
314 ret_data32=4294967295
315 ret_data64=18446744073709551615
316 ret_data8=255
317 system=system
318 update_data=false
319 warn_access=
320 pio=system.membus.default
321
322 [system.physmem]
323 type=SimpleDRAM
324 activation_limit=4
325 addr_mapping=RaBaChCo
326 banks_per_rank=8
327 burst_length=8
328 channels=1
329 clk_domain=system.clk_domain
330 conf_table_reported=true
331 device_bus_width=8
332 device_rowbuffer_size=1024
333 devices_per_rank=8
334 in_addr_map=true
335 mem_sched_policy=frfcfs
336 null=false
337 page_policy=open
338 range=0:134217727
339 ranks_per_channel=2
340 read_buffer_size=32
341 static_backend_latency=10000
342 static_frontend_latency=10000
343 tBURST=5000
344 tCL=13750
345 tRCD=13750
346 tREFI=7800000
347 tRFC=300000
348 tRP=13750
349 tWTR=7500
350 tXAW=40000
351 write_buffer_size=32
352 write_thresh_perc=70
353 port=system.membus.master[1]
354
355 [system.simple_disk]
356 type=SimpleDisk
357 children=disk
358 disk=system.simple_disk.disk
359 system=system
360
361 [system.simple_disk.disk]
362 type=RawDiskImage
363 image_file=/dist/m5/system/disks/linux-latest.img
364 read_only=true
365
366 [system.terminal]
367 type=Terminal
368 intr_control=system.intrctrl
369 number=0
370 output=true
371 port=3456
372
373 [system.tsunami]
374 type=Tsunami
375 children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
376 intrctrl=system.intrctrl
377 system=system
378
379 [system.tsunami.backdoor]
380 type=AlphaBackdoor
381 clk_domain=system.clk_domain
382 cpu=system.cpu
383 disk=system.simple_disk
384 pio_addr=8804682956800
385 pio_latency=100000
386 platform=system.tsunami
387 system=system
388 terminal=system.terminal
389 pio=system.iobus.master[24]
390
391 [system.tsunami.cchip]
392 type=TsunamiCChip
393 clk_domain=system.clk_domain
394 pio_addr=8803072344064
395 pio_latency=100000
396 system=system
397 tsunami=system.tsunami
398 pio=system.iobus.master[0]
399
400 [system.tsunami.ethernet]
401 type=NSGigE
402 BAR0=1
403 BAR0LegacyIO=false
404 BAR0Size=256
405 BAR1=0
406 BAR1LegacyIO=false
407 BAR1Size=4096
408 BAR2=0
409 BAR2LegacyIO=false
410 BAR2Size=0
411 BAR3=0
412 BAR3LegacyIO=false
413 BAR3Size=0
414 BAR4=0
415 BAR4LegacyIO=false
416 BAR4Size=0
417 BAR5=0
418 BAR5LegacyIO=false
419 BAR5Size=0
420 BIST=0
421 CacheLineSize=0
422 CardbusCIS=0
423 ClassCode=2
424 Command=0
425 DeviceID=34
426 ExpansionROM=0
427 HeaderType=0
428 InterruptLine=30
429 InterruptPin=1
430 LatencyTimer=0
431 MaximumLatency=52
432 MinimumGrant=176
433 ProgIF=0
434 Revision=0
435 Status=656
436 SubClassCode=0
437 SubsystemID=0
438 SubsystemVendorID=0
439 VendorID=4107
440 clk_domain=system.clk_domain
441 config_latency=20000
442 dma_data_free=false
443 dma_desc_free=false
444 dma_no_allocate=true
445 dma_read_delay=0
446 dma_read_factor=0
447 dma_write_delay=0
448 dma_write_factor=0
449 hardware_address=00:90:00:00:00:01
450 intr_delay=10000000
451 pci_bus=0
452 pci_dev=1
453 pci_func=0
454 pio_latency=30000
455 platform=system.tsunami
456 rss=false
457 rx_delay=1000000
458 rx_fifo_size=524288
459 rx_filter=true
460 rx_thread=false
461 system=system
462 tx_delay=1000000
463 tx_fifo_size=524288
464 tx_thread=false
465 config=system.iobus.master[28]
466 dma=system.iobus.slave[2]
467 pio=system.iobus.master[27]
468
469 [system.tsunami.fake_OROM]
470 type=IsaFake
471 clk_domain=system.clk_domain
472 fake_mem=false
473 pio_addr=8796093677568
474 pio_latency=100000
475 pio_size=393216
476 ret_bad_addr=false
477 ret_data16=65535
478 ret_data32=4294967295
479 ret_data64=18446744073709551615
480 ret_data8=255
481 system=system
482 update_data=false
483 warn_access=
484 pio=system.iobus.master[8]
485
486 [system.tsunami.fake_ata0]
487 type=IsaFake
488 clk_domain=system.clk_domain
489 fake_mem=false
490 pio_addr=8804615848432
491 pio_latency=100000
492 pio_size=8
493 ret_bad_addr=false
494 ret_data16=65535
495 ret_data32=4294967295
496 ret_data64=18446744073709551615
497 ret_data8=255
498 system=system
499 update_data=false
500 warn_access=
501 pio=system.iobus.master[19]
502
503 [system.tsunami.fake_ata1]
504 type=IsaFake
505 clk_domain=system.clk_domain
506 fake_mem=false
507 pio_addr=8804615848304
508 pio_latency=100000
509 pio_size=8
510 ret_bad_addr=false
511 ret_data16=65535
512 ret_data32=4294967295
513 ret_data64=18446744073709551615
514 ret_data8=255
515 system=system
516 update_data=false
517 warn_access=
518 pio=system.iobus.master[20]
519
520 [system.tsunami.fake_pnp_addr]
521 type=IsaFake
522 clk_domain=system.clk_domain
523 fake_mem=false
524 pio_addr=8804615848569
525 pio_latency=100000
526 pio_size=8
527 ret_bad_addr=false
528 ret_data16=65535
529 ret_data32=4294967295
530 ret_data64=18446744073709551615
531 ret_data8=255
532 system=system
533 update_data=false
534 warn_access=
535 pio=system.iobus.master[9]
536
537 [system.tsunami.fake_pnp_read0]
538 type=IsaFake
539 clk_domain=system.clk_domain
540 fake_mem=false
541 pio_addr=8804615848451
542 pio_latency=100000
543 pio_size=8
544 ret_bad_addr=false
545 ret_data16=65535
546 ret_data32=4294967295
547 ret_data64=18446744073709551615
548 ret_data8=255
549 system=system
550 update_data=false
551 warn_access=
552 pio=system.iobus.master[11]
553
554 [system.tsunami.fake_pnp_read1]
555 type=IsaFake
556 clk_domain=system.clk_domain
557 fake_mem=false
558 pio_addr=8804615848515
559 pio_latency=100000
560 pio_size=8
561 ret_bad_addr=false
562 ret_data16=65535
563 ret_data32=4294967295
564 ret_data64=18446744073709551615
565 ret_data8=255
566 system=system
567 update_data=false
568 warn_access=
569 pio=system.iobus.master[12]
570
571 [system.tsunami.fake_pnp_read2]
572 type=IsaFake
573 clk_domain=system.clk_domain
574 fake_mem=false
575 pio_addr=8804615848579
576 pio_latency=100000
577 pio_size=8
578 ret_bad_addr=false
579 ret_data16=65535
580 ret_data32=4294967295
581 ret_data64=18446744073709551615
582 ret_data8=255
583 system=system
584 update_data=false
585 warn_access=
586 pio=system.iobus.master[13]
587
588 [system.tsunami.fake_pnp_read3]
589 type=IsaFake
590 clk_domain=system.clk_domain
591 fake_mem=false
592 pio_addr=8804615848643
593 pio_latency=100000
594 pio_size=8
595 ret_bad_addr=false
596 ret_data16=65535
597 ret_data32=4294967295
598 ret_data64=18446744073709551615
599 ret_data8=255
600 system=system
601 update_data=false
602 warn_access=
603 pio=system.iobus.master[14]
604
605 [system.tsunami.fake_pnp_read4]
606 type=IsaFake
607 clk_domain=system.clk_domain
608 fake_mem=false
609 pio_addr=8804615848707
610 pio_latency=100000
611 pio_size=8
612 ret_bad_addr=false
613 ret_data16=65535
614 ret_data32=4294967295
615 ret_data64=18446744073709551615
616 ret_data8=255
617 system=system
618 update_data=false
619 warn_access=
620 pio=system.iobus.master[15]
621
622 [system.tsunami.fake_pnp_read5]
623 type=IsaFake
624 clk_domain=system.clk_domain
625 fake_mem=false
626 pio_addr=8804615848771
627 pio_latency=100000
628 pio_size=8
629 ret_bad_addr=false
630 ret_data16=65535
631 ret_data32=4294967295
632 ret_data64=18446744073709551615
633 ret_data8=255
634 system=system
635 update_data=false
636 warn_access=
637 pio=system.iobus.master[16]
638
639 [system.tsunami.fake_pnp_read6]
640 type=IsaFake
641 clk_domain=system.clk_domain
642 fake_mem=false
643 pio_addr=8804615848835
644 pio_latency=100000
645 pio_size=8
646 ret_bad_addr=false
647 ret_data16=65535
648 ret_data32=4294967295
649 ret_data64=18446744073709551615
650 ret_data8=255
651 system=system
652 update_data=false
653 warn_access=
654 pio=system.iobus.master[17]
655
656 [system.tsunami.fake_pnp_read7]
657 type=IsaFake
658 clk_domain=system.clk_domain
659 fake_mem=false
660 pio_addr=8804615848899
661 pio_latency=100000
662 pio_size=8
663 ret_bad_addr=false
664 ret_data16=65535
665 ret_data32=4294967295
666 ret_data64=18446744073709551615
667 ret_data8=255
668 system=system
669 update_data=false
670 warn_access=
671 pio=system.iobus.master[18]
672
673 [system.tsunami.fake_pnp_write]
674 type=IsaFake
675 clk_domain=system.clk_domain
676 fake_mem=false
677 pio_addr=8804615850617
678 pio_latency=100000
679 pio_size=8
680 ret_bad_addr=false
681 ret_data16=65535
682 ret_data32=4294967295
683 ret_data64=18446744073709551615
684 ret_data8=255
685 system=system
686 update_data=false
687 warn_access=
688 pio=system.iobus.master[10]
689
690 [system.tsunami.fake_ppc]
691 type=IsaFake
692 clk_domain=system.clk_domain
693 fake_mem=false
694 pio_addr=8804615848891
695 pio_latency=100000
696 pio_size=8
697 ret_bad_addr=false
698 ret_data16=65535
699 ret_data32=4294967295
700 ret_data64=18446744073709551615
701 ret_data8=255
702 system=system
703 update_data=false
704 warn_access=
705 pio=system.iobus.master[7]
706
707 [system.tsunami.fake_sm_chip]
708 type=IsaFake
709 clk_domain=system.clk_domain
710 fake_mem=false
711 pio_addr=8804615848816
712 pio_latency=100000
713 pio_size=8
714 ret_bad_addr=false
715 ret_data16=65535
716 ret_data32=4294967295
717 ret_data64=18446744073709551615
718 ret_data8=255
719 system=system
720 update_data=false
721 warn_access=
722 pio=system.iobus.master[2]
723
724 [system.tsunami.fake_uart1]
725 type=IsaFake
726 clk_domain=system.clk_domain
727 fake_mem=false
728 pio_addr=8804615848696
729 pio_latency=100000
730 pio_size=8
731 ret_bad_addr=false
732 ret_data16=65535
733 ret_data32=4294967295
734 ret_data64=18446744073709551615
735 ret_data8=255
736 system=system
737 update_data=false
738 warn_access=
739 pio=system.iobus.master[3]
740
741 [system.tsunami.fake_uart2]
742 type=IsaFake
743 clk_domain=system.clk_domain
744 fake_mem=false
745 pio_addr=8804615848936
746 pio_latency=100000
747 pio_size=8
748 ret_bad_addr=false
749 ret_data16=65535
750 ret_data32=4294967295
751 ret_data64=18446744073709551615
752 ret_data8=255
753 system=system
754 update_data=false
755 warn_access=
756 pio=system.iobus.master[4]
757
758 [system.tsunami.fake_uart3]
759 type=IsaFake
760 clk_domain=system.clk_domain
761 fake_mem=false
762 pio_addr=8804615848680
763 pio_latency=100000
764 pio_size=8
765 ret_bad_addr=false
766 ret_data16=65535
767 ret_data32=4294967295
768 ret_data64=18446744073709551615
769 ret_data8=255
770 system=system
771 update_data=false
772 warn_access=
773 pio=system.iobus.master[5]
774
775 [system.tsunami.fake_uart4]
776 type=IsaFake
777 clk_domain=system.clk_domain
778 fake_mem=false
779 pio_addr=8804615848944
780 pio_latency=100000
781 pio_size=8
782 ret_bad_addr=false
783 ret_data16=65535
784 ret_data32=4294967295
785 ret_data64=18446744073709551615
786 ret_data8=255
787 system=system
788 update_data=false
789 warn_access=
790 pio=system.iobus.master[6]
791
792 [system.tsunami.fb]
793 type=BadDevice
794 clk_domain=system.clk_domain
795 devicename=FrameBuffer
796 pio_addr=8804615848912
797 pio_latency=100000
798 system=system
799 pio=system.iobus.master[21]
800
801 [system.tsunami.ide]
802 type=IdeController
803 BAR0=1
804 BAR0LegacyIO=false
805 BAR0Size=8
806 BAR1=1
807 BAR1LegacyIO=false
808 BAR1Size=4
809 BAR2=1
810 BAR2LegacyIO=false
811 BAR2Size=8
812 BAR3=1
813 BAR3LegacyIO=false
814 BAR3Size=4
815 BAR4=1
816 BAR4LegacyIO=false
817 BAR4Size=16
818 BAR5=1
819 BAR5LegacyIO=false
820 BAR5Size=0
821 BIST=0
822 CacheLineSize=0
823 CardbusCIS=0
824 ClassCode=1
825 Command=0
826 DeviceID=28945
827 ExpansionROM=0
828 HeaderType=0
829 InterruptLine=31
830 InterruptPin=1
831 LatencyTimer=0
832 MaximumLatency=0
833 MinimumGrant=0
834 ProgIF=133
835 Revision=0
836 Status=640
837 SubClassCode=1
838 SubsystemID=0
839 SubsystemVendorID=0
840 VendorID=32902
841 clk_domain=system.clk_domain
842 config_latency=20000
843 ctrl_offset=0
844 disks=system.disk0 system.disk2
845 io_shift=0
846 pci_bus=0
847 pci_dev=0
848 pci_func=0
849 pio_latency=30000
850 platform=system.tsunami
851 system=system
852 config=system.iobus.master[26]
853 dma=system.iobus.slave[1]
854 pio=system.iobus.master[25]
855
856 [system.tsunami.io]
857 type=TsunamiIO
858 clk_domain=system.clk_domain
859 frequency=976562500
860 pio_addr=8804615847936
861 pio_latency=100000
862 system=system
863 time=Thu Jan 1 00:00:00 2009
864 tsunami=system.tsunami
865 year_is_bcd=false
866 pio=system.iobus.master[22]
867
868 [system.tsunami.pchip]
869 type=TsunamiPChip
870 clk_domain=system.clk_domain
871 pio_addr=8802535473152
872 pio_latency=100000
873 system=system
874 tsunami=system.tsunami
875 pio=system.iobus.master[1]
876
877 [system.tsunami.pciconfig]
878 type=PciConfigAll
879 bus=0
880 clk_domain=system.clk_domain
881 pio_addr=0
882 pio_latency=30000
883 platform=system.tsunami
884 size=16777216
885 system=system
886 pio=system.iobus.default
887
888 [system.tsunami.uart]
889 type=Uart8250
890 clk_domain=system.clk_domain
891 pio_addr=8804615848952
892 pio_latency=100000
893 platform=system.tsunami
894 system=system
895 terminal=system.terminal
896 pio=system.iobus.master[23]
897
898 [system.voltage_domain]
899 type=VoltageDomain
900 voltage=1.000000
901