39f3dd9715d88de522c2a56f68912a8d8bcfd853
8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
13 children=bridge clk_domain cpu0 cpu1 cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami voltage_domain
14 boot_cpu_frequency=500
15 boot_osflags=root=/dev/hda1 console=ttyS0
17 clk_domain=system.clk_domain
18 console=/scratch/nilay/GEM5/system/binaries/console
21 kernel=/scratch/nilay/GEM5/system/binaries/vmlinux
22 kernel_addr_check=true
23 load_addr_mask=1099511627775
26 mem_ranges=0:134217727
27 memories=system.physmem
29 pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
30 readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
34 work_begin_ckpt_count=0
35 work_begin_cpu_id_exit=-1
36 work_begin_exit_count=0
37 work_cpus_ckpt_count=0
41 system_port=system.membus.slave[0]
45 clk_domain=system.clk_domain
48 ranges=8796093022208:18446744073709551615
51 master=system.iobus.slave[0]
52 slave=system.membus.master[0]
60 voltage_domain=system.voltage_domain
64 children=dcache dtb icache interrupts isa itb tracer
67 clk_domain=system.cpu_clk_domain
69 do_checkpoint_insts=true
71 do_statistics_insts=true
75 function_trace_start=0
76 interrupts=system.cpu0.interrupts
79 max_insts_all_threads=0
80 max_insts_any_thread=0
81 max_loads_all_threads=0
82 max_loads_any_thread=0
90 tracer=system.cpu0.tracer
92 dcache_port=system.cpu0.dcache.cpu_side
93 icache_port=system.cpu0.icache.cpu_side
98 addr_ranges=0:18446744073709551615
100 clk_domain=system.cpu_clk_domain
107 prefetch_on_access=false
110 sequential_access=false
113 tags=system.cpu0.dcache.tags
117 cpu_side=system.cpu0.dcache_port
118 mem_side=system.toL2Bus.slave[1]
120 [system.cpu0.dcache.tags]
124 clk_domain=system.cpu_clk_domain
127 sequential_access=false
138 addr_ranges=0:18446744073709551615
140 clk_domain=system.cpu_clk_domain
147 prefetch_on_access=false
150 sequential_access=false
153 tags=system.cpu0.icache.tags
157 cpu_side=system.cpu0.icache_port
158 mem_side=system.toL2Bus.slave[0]
160 [system.cpu0.icache.tags]
164 clk_domain=system.cpu_clk_domain
167 sequential_access=false
170 [system.cpu0.interrupts]
190 children=dcache dtb icache interrupts isa itb tracer
193 clk_domain=system.cpu_clk_domain
195 do_checkpoint_insts=true
197 do_statistics_insts=true
201 function_trace_start=0
202 interrupts=system.cpu1.interrupts
205 max_insts_all_threads=0
206 max_insts_any_thread=0
207 max_loads_all_threads=0
208 max_loads_any_thread=0
212 simpoint_start_insts=
216 tracer=system.cpu1.tracer
218 dcache_port=system.cpu1.dcache.cpu_side
219 icache_port=system.cpu1.icache.cpu_side
224 addr_ranges=0:18446744073709551615
226 clk_domain=system.cpu_clk_domain
233 prefetch_on_access=false
236 sequential_access=false
239 tags=system.cpu1.dcache.tags
243 cpu_side=system.cpu1.dcache_port
244 mem_side=system.toL2Bus.slave[3]
246 [system.cpu1.dcache.tags]
250 clk_domain=system.cpu_clk_domain
253 sequential_access=false
264 addr_ranges=0:18446744073709551615
266 clk_domain=system.cpu_clk_domain
273 prefetch_on_access=false
276 sequential_access=false
279 tags=system.cpu1.icache.tags
283 cpu_side=system.cpu1.icache_port
284 mem_side=system.toL2Bus.slave[2]
286 [system.cpu1.icache.tags]
290 clk_domain=system.cpu_clk_domain
293 sequential_access=false
296 [system.cpu1.interrupts]
314 [system.cpu_clk_domain]
320 voltage_domain=system.voltage_domain
328 image=system.disk0.image
333 child=system.disk0.image.child
339 [system.disk0.image.child]
342 image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
351 image=system.disk2.image
356 child=system.disk2.image.child
362 [system.disk2.image.child]
365 image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
368 [system.dvfs_handler]
373 sys_clk_domain=system.clk_domain
374 transition_latency=100000000
383 clk_domain=system.clk_domain
386 use_default_range=true
388 default=system.tsunami.pciconfig.pio
389 master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side
390 slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
395 addr_ranges=0:134217727
397 clk_domain=system.clk_domain
404 prefetch_on_access=false
407 sequential_access=false
410 tags=system.iocache.tags
414 cpu_side=system.iobus.master[29]
415 mem_side=system.membus.slave[2]
417 [system.iocache.tags]
421 clk_domain=system.clk_domain
424 sequential_access=false
430 addr_ranges=0:18446744073709551615
432 clk_domain=system.cpu_clk_domain
439 prefetch_on_access=false
442 sequential_access=false
449 cpu_side=system.toL2Bus.master[0]
450 mem_side=system.membus.slave[1]
456 clk_domain=system.cpu_clk_domain
459 sequential_access=false
464 children=badaddr_responder
465 clk_domain=system.clk_domain
469 use_default_range=false
471 default=system.membus.badaddr_responder.pio
472 master=system.bridge.slave system.physmem.port
473 slave=system.system_port system.l2c.mem_side system.iocache.mem_side
475 [system.membus.badaddr_responder]
477 clk_domain=system.clk_domain
485 ret_data32=4294967295
486 ret_data64=18446744073709551615
491 pio=system.membus.default
496 addr_mapping=RoRaBaChCo
500 clk_domain=system.clk_domain
501 conf_table_reported=true
503 device_rowbuffer_size=1024
507 max_accesses_per_row=16
508 mem_sched_policy=frfcfs
509 min_writes_per_switch=16
511 page_policy=open_adaptive
515 static_backend_latency=10000
516 static_frontend_latency=10000
532 write_high_thresh_perc=85
533 write_low_thresh_perc=50
534 port=system.membus.master[1]
539 disk=system.simple_disk.disk
543 [system.simple_disk.disk]
546 image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img
552 intr_control=system.intrctrl
559 clk_domain=system.cpu_clk_domain
563 use_default_range=false
565 master=system.l2c.cpu_side
566 slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
570 children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
572 intrctrl=system.intrctrl
575 [system.tsunami.backdoor]
577 clk_domain=system.clk_domain
579 disk=system.simple_disk
581 pio_addr=8804682956800
583 platform=system.tsunami
585 terminal=system.terminal
586 pio=system.iobus.master[24]
588 [system.tsunami.cchip]
590 clk_domain=system.clk_domain
592 pio_addr=8803072344064
595 tsunami=system.tsunami
596 pio=system.iobus.master[0]
598 [system.tsunami.ethernet]
637 MSICAPNextCapability=0
641 MSIXCAPNextCapability=0
651 PMCAPNextCapability=0
656 PXCAPDevCapabilities=0
663 PXCAPNextCapability=0
671 clk_domain=system.clk_domain
681 hardware_address=00:90:00:00:00:01
687 platform=system.tsunami
697 config=system.iobus.master[28]
698 dma=system.iobus.slave[2]
699 pio=system.iobus.master[27]
701 [system.tsunami.fake_OROM]
703 clk_domain=system.clk_domain
706 pio_addr=8796093677568
711 ret_data32=4294967295
712 ret_data64=18446744073709551615
717 pio=system.iobus.master[8]
719 [system.tsunami.fake_ata0]
721 clk_domain=system.clk_domain
724 pio_addr=8804615848432
729 ret_data32=4294967295
730 ret_data64=18446744073709551615
735 pio=system.iobus.master[19]
737 [system.tsunami.fake_ata1]
739 clk_domain=system.clk_domain
742 pio_addr=8804615848304
747 ret_data32=4294967295
748 ret_data64=18446744073709551615
753 pio=system.iobus.master[20]
755 [system.tsunami.fake_pnp_addr]
757 clk_domain=system.clk_domain
760 pio_addr=8804615848569
765 ret_data32=4294967295
766 ret_data64=18446744073709551615
771 pio=system.iobus.master[9]
773 [system.tsunami.fake_pnp_read0]
775 clk_domain=system.clk_domain
778 pio_addr=8804615848451
783 ret_data32=4294967295
784 ret_data64=18446744073709551615
789 pio=system.iobus.master[11]
791 [system.tsunami.fake_pnp_read1]
793 clk_domain=system.clk_domain
796 pio_addr=8804615848515
801 ret_data32=4294967295
802 ret_data64=18446744073709551615
807 pio=system.iobus.master[12]
809 [system.tsunami.fake_pnp_read2]
811 clk_domain=system.clk_domain
814 pio_addr=8804615848579
819 ret_data32=4294967295
820 ret_data64=18446744073709551615
825 pio=system.iobus.master[13]
827 [system.tsunami.fake_pnp_read3]
829 clk_domain=system.clk_domain
832 pio_addr=8804615848643
837 ret_data32=4294967295
838 ret_data64=18446744073709551615
843 pio=system.iobus.master[14]
845 [system.tsunami.fake_pnp_read4]
847 clk_domain=system.clk_domain
850 pio_addr=8804615848707
855 ret_data32=4294967295
856 ret_data64=18446744073709551615
861 pio=system.iobus.master[15]
863 [system.tsunami.fake_pnp_read5]
865 clk_domain=system.clk_domain
868 pio_addr=8804615848771
873 ret_data32=4294967295
874 ret_data64=18446744073709551615
879 pio=system.iobus.master[16]
881 [system.tsunami.fake_pnp_read6]
883 clk_domain=system.clk_domain
886 pio_addr=8804615848835
891 ret_data32=4294967295
892 ret_data64=18446744073709551615
897 pio=system.iobus.master[17]
899 [system.tsunami.fake_pnp_read7]
901 clk_domain=system.clk_domain
904 pio_addr=8804615848899
909 ret_data32=4294967295
910 ret_data64=18446744073709551615
915 pio=system.iobus.master[18]
917 [system.tsunami.fake_pnp_write]
919 clk_domain=system.clk_domain
922 pio_addr=8804615850617
927 ret_data32=4294967295
928 ret_data64=18446744073709551615
933 pio=system.iobus.master[10]
935 [system.tsunami.fake_ppc]
937 clk_domain=system.clk_domain
940 pio_addr=8804615848891
945 ret_data32=4294967295
946 ret_data64=18446744073709551615
951 pio=system.iobus.master[7]
953 [system.tsunami.fake_sm_chip]
955 clk_domain=system.clk_domain
958 pio_addr=8804615848816
963 ret_data32=4294967295
964 ret_data64=18446744073709551615
969 pio=system.iobus.master[2]
971 [system.tsunami.fake_uart1]
973 clk_domain=system.clk_domain
976 pio_addr=8804615848696
981 ret_data32=4294967295
982 ret_data64=18446744073709551615
987 pio=system.iobus.master[3]
989 [system.tsunami.fake_uart2]
991 clk_domain=system.clk_domain
994 pio_addr=8804615848936
999 ret_data32=4294967295
1000 ret_data64=18446744073709551615
1005 pio=system.iobus.master[4]
1007 [system.tsunami.fake_uart3]
1009 clk_domain=system.clk_domain
1012 pio_addr=8804615848680
1017 ret_data32=4294967295
1018 ret_data64=18446744073709551615
1023 pio=system.iobus.master[5]
1025 [system.tsunami.fake_uart4]
1027 clk_domain=system.clk_domain
1030 pio_addr=8804615848944
1035 ret_data32=4294967295
1036 ret_data64=18446744073709551615
1041 pio=system.iobus.master[6]
1045 clk_domain=system.clk_domain
1046 devicename=FrameBuffer
1048 pio_addr=8804615848912
1051 pio=system.iobus.master[21]
1053 [system.tsunami.ide]
1091 MSICAPMsgUpperAddr=0
1092 MSICAPNextCapability=0
1096 MSIXCAPNextCapability=0
1106 PMCAPNextCapability=0
1111 PXCAPDevCapabilities=0
1118 PXCAPNextCapability=0
1126 clk_domain=system.clk_domain
1127 config_latency=20000
1129 disks=system.disk0 system.disk2
1136 platform=system.tsunami
1138 config=system.iobus.master[26]
1139 dma=system.iobus.slave[1]
1140 pio=system.iobus.master[25]
1144 clk_domain=system.clk_domain
1147 pio_addr=8804615847936
1150 time=Thu Jan 1 00:00:00 2009
1151 tsunami=system.tsunami
1153 pio=system.iobus.master[22]
1155 [system.tsunami.pchip]
1157 clk_domain=system.clk_domain
1159 pio_addr=8802535473152
1162 tsunami=system.tsunami
1163 pio=system.iobus.master[1]
1165 [system.tsunami.pciconfig]
1168 clk_domain=system.clk_domain
1172 platform=system.tsunami
1175 pio=system.iobus.default
1177 [system.tsunami.uart]
1179 clk_domain=system.clk_domain
1181 pio_addr=8804615848952
1183 platform=system.tsunami
1185 terminal=system.terminal
1186 pio=system.iobus.master[23]
1188 [system.voltage_domain]