8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
13 children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
15 boot_loader=/dist/m5/system/binaries/boot_emm.arm
16 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
18 clk_domain=system.clk_domain
19 dtb_filename=/dist/m5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
20 early_kernel_symbols=false
21 enable_context_switch_stats_dump=false
23 exit_on_work_items=false
25 gic_cpu_addr=738205696
26 have_large_asid_64=false
29 have_virtualization=false
30 highest_el_is_64=false
32 kernel=/dist/m5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
33 kernel_addr_check=true
34 load_addr_mask=268435455
35 load_offset=2147483648
36 machine_type=VExpress_EMM
38 mem_ranges=2147483648:2415919103
39 memories=system.physmem system.realview.nvmem system.realview.vram
40 mmap_using_noreserve=false
47 readfile=/z/atgutier/gem5/gem5-commit/tests/halt.sh
50 work_begin_ckpt_count=0
51 work_begin_cpu_id_exit=-1
52 work_begin_exit_count=0
53 work_cpus_ckpt_count=0
57 system_port=system.membus.slave[1]
61 clk_domain=system.clk_domain
64 ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
67 master=system.iobus.slave[0]
68 slave=system.membus.master[0]
76 image=system.cf0.image
81 child=system.cf0.image.child
87 [system.cf0.image.child]
90 image_file=/dist/m5/system/disks/linux-aarch32-ael.img
99 voltage_domain=system.voltage_domain
103 children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer
106 clk_domain=system.cpu_clk_domain
108 do_checkpoint_insts=true
110 do_statistics_insts=true
111 dstage2_mmu=system.cpu.dstage2_mmu
116 function_trace_start=0
117 interrupts=system.cpu.interrupts
119 istage2_mmu=system.cpu.istage2_mmu
121 max_insts_all_threads=0
122 max_insts_any_thread=0
123 max_loads_all_threads=0
124 max_loads_any_thread=0
128 simpoint_start_insts=
129 simulate_data_stalls=false
130 simulate_inst_stalls=false
134 tracer=system.cpu.tracer
137 dcache_port=system.cpu.dcache.cpu_side
138 icache_port=system.cpu.icache.cpu_side
143 addr_ranges=0:18446744073709551615
145 clk_domain=system.cpu_clk_domain
146 clusivity=mostly_incl
147 demand_mshr_reserve=1
154 prefetch_on_access=false
157 sequential_access=false
160 tags=system.cpu.dcache.tags
163 writeback_clean=false
164 cpu_side=system.cpu.dcache_port
165 mem_side=system.cpu.toL2Bus.slave[1]
167 [system.cpu.dcache.tags]
171 clk_domain=system.cpu_clk_domain
174 sequential_access=false
177 [system.cpu.dstage2_mmu]
181 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
185 [system.cpu.dstage2_mmu.stage2_tlb]
191 walker=system.cpu.dstage2_mmu.stage2_tlb.walker
193 [system.cpu.dstage2_mmu.stage2_tlb.walker]
195 clk_domain=system.cpu_clk_domain
198 num_squash_per_cycle=2
207 walker=system.cpu.dtb.walker
209 [system.cpu.dtb.walker]
211 clk_domain=system.cpu_clk_domain
214 num_squash_per_cycle=2
216 port=system.cpu.toL2Bus.slave[3]
221 addr_ranges=0:18446744073709551615
223 clk_domain=system.cpu_clk_domain
224 clusivity=mostly_incl
225 demand_mshr_reserve=1
232 prefetch_on_access=false
235 sequential_access=false
238 tags=system.cpu.icache.tags
242 cpu_side=system.cpu.icache_port
243 mem_side=system.cpu.toL2Bus.slave[0]
245 [system.cpu.icache.tags]
249 clk_domain=system.cpu_clk_domain
252 sequential_access=false
255 [system.cpu.interrupts]
261 decoderFlavour=Generic
266 id_aa64dfr0_el1=1052678
270 id_aa64mmfr0_el1=15728642
290 [system.cpu.istage2_mmu]
294 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
298 [system.cpu.istage2_mmu.stage2_tlb]
304 walker=system.cpu.istage2_mmu.stage2_tlb.walker
306 [system.cpu.istage2_mmu.stage2_tlb.walker]
308 clk_domain=system.cpu_clk_domain
311 num_squash_per_cycle=2
320 walker=system.cpu.itb.walker
322 [system.cpu.itb.walker]
324 clk_domain=system.cpu_clk_domain
327 num_squash_per_cycle=2
329 port=system.cpu.toL2Bus.slave[2]
334 addr_ranges=0:18446744073709551615
336 clk_domain=system.cpu_clk_domain
337 clusivity=mostly_incl
338 demand_mshr_reserve=1
345 prefetch_on_access=false
348 sequential_access=false
351 tags=system.cpu.l2cache.tags
354 writeback_clean=false
355 cpu_side=system.cpu.toL2Bus.master[0]
356 mem_side=system.membus.slave[2]
358 [system.cpu.l2cache.tags]
362 clk_domain=system.cpu_clk_domain
365 sequential_access=false
370 children=snoop_filter
371 clk_domain=system.cpu_clk_domain
376 snoop_filter=system.cpu.toL2Bus.snoop_filter
377 snoop_response_latency=1
379 use_default_range=false
381 master=system.cpu.l2cache.cpu_side
382 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
384 [system.cpu.toL2Bus.snoop_filter]
395 [system.cpu_clk_domain]
401 voltage_domain=system.voltage_domain
403 [system.dvfs_handler]
408 sys_clk_domain=system.clk_domain
409 transition_latency=100000000
418 clk_domain=system.clk_domain
423 use_default_range=false
425 master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side
426 slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
431 addr_ranges=2147483648:2415919103
433 clk_domain=system.clk_domain
434 clusivity=mostly_incl
435 demand_mshr_reserve=1
442 prefetch_on_access=false
445 sequential_access=false
448 tags=system.iocache.tags
451 writeback_clean=false
452 cpu_side=system.iobus.master[25]
453 mem_side=system.membus.slave[3]
455 [system.iocache.tags]
459 clk_domain=system.clk_domain
462 sequential_access=false
467 children=badaddr_responder
468 clk_domain=system.clk_domain
474 snoop_response_latency=4
476 use_default_range=false
478 default=system.membus.badaddr_responder.pio
479 master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port
480 slave=system.realview.hdlcd.dma system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
482 [system.membus.badaddr_responder]
484 clk_domain=system.clk_domain
492 ret_data32=4294967295
493 ret_data64=18446744073709551615
498 pio=system.membus.default
503 clk_domain=system.clk_domain
504 conf_table_reported=true
510 range=2147483648:2415919103
511 port=system.membus.master[5]
515 children=aaci_fake cf_ctrl clcd dcc energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mcc mmc_fake nvmem pci_host realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
517 intrctrl=system.intrctrl
520 [system.realview.aaci_fake]
523 clk_domain=system.clk_domain
529 pio=system.iobus.master[18]
531 [system.realview.cf_ctrl]
571 MSICAPNextCapability=0
575 MSIXCAPNextCapability=0
585 PMCAPNextCapability=0
590 PXCAPDevCapabilities=0
597 PXCAPNextCapability=0
605 clk_domain=system.clk_domain
610 host=system.realview.pci_host
617 dma=system.iobus.slave[2]
618 pio=system.iobus.master[9]
620 [system.realview.clcd]
623 clk_domain=system.clk_domain
626 gic=system.realview.gic
633 dma=system.iobus.slave[1]
634 pio=system.iobus.master[5]
636 [system.realview.dcc]
638 children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys
641 [system.realview.dcc.osc_cpu]
647 parent=system.realview.realview_io
650 voltage_domain=system.voltage_domain
652 [system.realview.dcc.osc_ddr]
658 parent=system.realview.realview_io
661 voltage_domain=system.voltage_domain
663 [system.realview.dcc.osc_hsbm]
669 parent=system.realview.realview_io
672 voltage_domain=system.voltage_domain
674 [system.realview.dcc.osc_pxl]
680 parent=system.realview.realview_io
683 voltage_domain=system.voltage_domain
685 [system.realview.dcc.osc_smb]
691 parent=system.realview.realview_io
694 voltage_domain=system.voltage_domain
696 [system.realview.dcc.osc_sys]
702 parent=system.realview.realview_io
705 voltage_domain=system.voltage_domain
707 [system.realview.energy_ctrl]
709 clk_domain=system.clk_domain
710 dvfs_handler=system.dvfs_handler
715 pio=system.iobus.master[22]
717 [system.realview.ethernet]
757 MSICAPNextCapability=0
761 MSIXCAPNextCapability=0
771 PMCAPNextCapability=0
776 PXCAPDevCapabilities=0
783 PXCAPNextCapability=0
789 SubsystemVendorID=32902
791 clk_domain=system.clk_domain
794 fetch_comp_delay=10000
796 hardware_address=00:90:00:00:00:01
797 host=system.realview.pci_host
804 rx_desc_cache_size=64
808 tx_desc_cache_size=64
813 dma=system.iobus.slave[4]
814 pio=system.iobus.master[24]
816 [system.realview.generic_timer]
819 gic=system.realview.gic
824 [system.realview.gic]
826 clk_domain=system.clk_domain
834 platform=system.realview
836 pio=system.membus.master[2]
838 [system.realview.hdlcd]
841 clk_domain=system.clk_domain
844 gic=system.realview.gic
848 pixel_buffer_size=2048
850 pxl_clk=system.realview.dcc.osc_pxl
853 workaround_dma_line_count=true
854 workaround_swap_rb=true
855 dma=system.membus.slave[0]
856 pio=system.iobus.master[6]
858 [system.realview.ide]
898 MSICAPNextCapability=0
902 MSIXCAPNextCapability=0
912 PMCAPNextCapability=0
917 PXCAPDevCapabilities=0
924 PXCAPNextCapability=0
932 clk_domain=system.clk_domain
937 host=system.realview.pci_host
944 dma=system.iobus.slave[3]
945 pio=system.iobus.master[23]
947 [system.realview.kmi0]
950 clk_domain=system.clk_domain
952 gic=system.realview.gic
960 pio=system.iobus.master[7]
962 [system.realview.kmi1]
965 clk_domain=system.clk_domain
967 gic=system.realview.gic
975 pio=system.iobus.master[8]
977 [system.realview.l2x0_fake]
979 clk_domain=system.clk_domain
987 ret_data32=4294967295
988 ret_data64=18446744073709551615
993 pio=system.iobus.master[12]
995 [system.realview.lan_fake]
997 clk_domain=system.clk_domain
1005 ret_data32=4294967295
1006 ret_data64=18446744073709551615
1011 pio=system.iobus.master[19]
1013 [system.realview.local_cpu_timer]
1015 clk_domain=system.clk_domain
1017 gic=system.realview.gic
1023 pio=system.membus.master[4]
1025 [system.realview.mcc]
1027 children=osc_clcd osc_mcc osc_peripheral osc_system_bus
1030 [system.realview.mcc.osc_clcd]
1036 parent=system.realview.realview_io
1039 voltage_domain=system.voltage_domain
1041 [system.realview.mcc.osc_mcc]
1047 parent=system.realview.realview_io
1050 voltage_domain=system.voltage_domain
1052 [system.realview.mcc.osc_peripheral]
1058 parent=system.realview.realview_io
1061 voltage_domain=system.voltage_domain
1063 [system.realview.mcc.osc_system_bus]
1069 parent=system.realview.realview_io
1072 voltage_domain=system.voltage_domain
1074 [system.realview.mmc_fake]
1077 clk_domain=system.clk_domain
1083 pio=system.iobus.master[21]
1085 [system.realview.nvmem]
1088 clk_domain=system.clk_domain
1089 conf_table_reported=false
1096 port=system.membus.master[1]
1098 [system.realview.pci_host]
1100 clk_domain=system.clk_domain
1108 platform=system.realview
1110 pio=system.iobus.master[2]
1112 [system.realview.realview_io]
1114 clk_domain=system.clk_domain
1122 pio=system.iobus.master[1]
1124 [system.realview.rtc]
1127 clk_domain=system.clk_domain
1129 gic=system.realview.gic
1135 time=Thu Jan 1 00:00:00 2009
1136 pio=system.iobus.master[10]
1138 [system.realview.sp810_fake]
1141 clk_domain=system.clk_domain
1147 pio=system.iobus.master[16]
1149 [system.realview.timer0]
1152 clk_domain=system.clk_domain
1156 gic=system.realview.gic
1162 pio=system.iobus.master[3]
1164 [system.realview.timer1]
1167 clk_domain=system.clk_domain
1171 gic=system.realview.gic
1177 pio=system.iobus.master[4]
1179 [system.realview.uart]
1181 clk_domain=system.clk_domain
1184 gic=system.realview.gic
1189 platform=system.realview
1191 terminal=system.terminal
1192 pio=system.iobus.master[0]
1194 [system.realview.uart1_fake]
1197 clk_domain=system.clk_domain
1203 pio=system.iobus.master[13]
1205 [system.realview.uart2_fake]
1208 clk_domain=system.clk_domain
1214 pio=system.iobus.master[14]
1216 [system.realview.uart3_fake]
1219 clk_domain=system.clk_domain
1225 pio=system.iobus.master[15]
1227 [system.realview.usb_fake]
1229 clk_domain=system.clk_domain
1237 ret_data32=4294967295
1238 ret_data64=18446744073709551615
1243 pio=system.iobus.master[20]
1245 [system.realview.vgic]
1247 clk_domain=system.clk_domain
1249 gic=system.realview.gic
1252 platform=system.realview
1256 pio=system.membus.master[3]
1258 [system.realview.vram]
1261 clk_domain=system.clk_domain
1262 conf_table_reported=false
1268 range=402653184:436207615
1269 port=system.iobus.master[11]
1271 [system.realview.watchdog_fake]
1274 clk_domain=system.clk_domain
1280 pio=system.iobus.master[17]
1285 intr_control=system.intrctrl
1297 [system.voltage_domain]