8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
13 children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain
15 boot_loader=/dist/m5/system/binaries/boot_emm.arm
16 boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1
18 clk_domain=system.clk_domain
19 dtb_filename=/dist/m5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb
20 early_kernel_symbols=false
21 enable_context_switch_stats_dump=false
24 gic_cpu_addr=738205696
25 have_large_asid_64=false
28 have_virtualization=false
29 highest_el_is_64=false
31 kernel=/dist/m5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5
32 kernel_addr_check=true
33 load_addr_mask=268435455
34 load_offset=2147483648
35 machine_type=VExpress_EMM
37 mem_ranges=2147483648:2415919103
38 memories=system.physmem system.realview.nvmem system.realview.vram
39 mmap_using_noreserve=false
46 readfile=/z/atgutier/gem5/gem5/tests/halt.sh
49 work_begin_ckpt_count=0
50 work_begin_cpu_id_exit=-1
51 work_begin_exit_count=0
52 work_cpus_ckpt_count=0
56 system_port=system.membus.slave[1]
60 clk_domain=system.clk_domain
63 ranges=788529152:805306367 721420288:725614591 805306368:1073741823 1073741824:1610612735 402653184:469762047 469762048:536870911
66 master=system.iobus.slave[0]
67 slave=system.membus.master[0]
75 image=system.cf0.image
80 child=system.cf0.image.child
86 [system.cf0.image.child]
89 image_file=/dist/m5/system/disks/linux-aarch32-ael.img
98 voltage_domain=system.voltage_domain
102 children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb tracer
105 clk_domain=system.cpu_clk_domain
107 do_checkpoint_insts=true
109 do_statistics_insts=true
110 dstage2_mmu=system.cpu0.dstage2_mmu
115 function_trace_start=0
116 interrupts=system.cpu0.interrupts
118 istage2_mmu=system.cpu0.istage2_mmu
120 max_insts_all_threads=0
121 max_insts_any_thread=0
122 max_loads_all_threads=0
123 max_loads_any_thread=0
127 simpoint_start_insts=
128 simulate_data_stalls=false
129 simulate_inst_stalls=false
133 tracer=system.cpu0.tracer
136 dcache_port=system.cpu0.dcache.cpu_side
137 icache_port=system.cpu0.icache.cpu_side
142 addr_ranges=0:18446744073709551615
144 clk_domain=system.cpu_clk_domain
145 clusivity=mostly_incl
146 demand_mshr_reserve=1
153 prefetch_on_access=false
156 sequential_access=false
159 tags=system.cpu0.dcache.tags
162 writeback_clean=false
163 cpu_side=system.cpu0.dcache_port
164 mem_side=system.toL2Bus.slave[1]
166 [system.cpu0.dcache.tags]
170 clk_domain=system.cpu_clk_domain
173 sequential_access=false
176 [system.cpu0.dstage2_mmu]
180 stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb
184 [system.cpu0.dstage2_mmu.stage2_tlb]
190 walker=system.cpu0.dstage2_mmu.stage2_tlb.walker
192 [system.cpu0.dstage2_mmu.stage2_tlb.walker]
194 clk_domain=system.cpu_clk_domain
197 num_squash_per_cycle=2
206 walker=system.cpu0.dtb.walker
208 [system.cpu0.dtb.walker]
210 clk_domain=system.cpu_clk_domain
213 num_squash_per_cycle=2
215 port=system.toL2Bus.slave[3]
220 addr_ranges=0:18446744073709551615
222 clk_domain=system.cpu_clk_domain
223 clusivity=mostly_incl
224 demand_mshr_reserve=1
231 prefetch_on_access=false
234 sequential_access=false
237 tags=system.cpu0.icache.tags
241 cpu_side=system.cpu0.icache_port
242 mem_side=system.toL2Bus.slave[0]
244 [system.cpu0.icache.tags]
248 clk_domain=system.cpu_clk_domain
251 sequential_access=false
254 [system.cpu0.interrupts]
260 decoderFlavour=Generic
265 id_aa64dfr0_el1=1052678
269 id_aa64mmfr0_el1=15728642
289 [system.cpu0.istage2_mmu]
293 stage2_tlb=system.cpu0.istage2_mmu.stage2_tlb
297 [system.cpu0.istage2_mmu.stage2_tlb]
303 walker=system.cpu0.istage2_mmu.stage2_tlb.walker
305 [system.cpu0.istage2_mmu.stage2_tlb.walker]
307 clk_domain=system.cpu_clk_domain
310 num_squash_per_cycle=2
319 walker=system.cpu0.itb.walker
321 [system.cpu0.itb.walker]
323 clk_domain=system.cpu_clk_domain
326 num_squash_per_cycle=2
328 port=system.toL2Bus.slave[2]
336 children=dstage2_mmu dtb isa istage2_mmu itb tracer
339 clk_domain=system.cpu_clk_domain
341 do_checkpoint_insts=true
343 do_statistics_insts=true
344 dstage2_mmu=system.cpu1.dstage2_mmu
349 function_trace_start=0
352 istage2_mmu=system.cpu1.istage2_mmu
354 max_insts_all_threads=0
355 max_insts_any_thread=0
356 max_loads_all_threads=0
357 max_loads_any_thread=0
361 simpoint_start_insts=
362 simulate_data_stalls=false
363 simulate_inst_stalls=false
367 tracer=system.cpu1.tracer
371 [system.cpu1.dstage2_mmu]
375 stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb
379 [system.cpu1.dstage2_mmu.stage2_tlb]
385 walker=system.cpu1.dstage2_mmu.stage2_tlb.walker
387 [system.cpu1.dstage2_mmu.stage2_tlb.walker]
389 clk_domain=system.cpu_clk_domain
392 num_squash_per_cycle=2
401 walker=system.cpu1.dtb.walker
403 [system.cpu1.dtb.walker]
405 clk_domain=system.cpu_clk_domain
408 num_squash_per_cycle=2
413 decoderFlavour=Generic
418 id_aa64dfr0_el1=1052678
422 id_aa64mmfr0_el1=15728642
442 [system.cpu1.istage2_mmu]
446 stage2_tlb=system.cpu1.istage2_mmu.stage2_tlb
450 [system.cpu1.istage2_mmu.stage2_tlb]
456 walker=system.cpu1.istage2_mmu.stage2_tlb.walker
458 [system.cpu1.istage2_mmu.stage2_tlb.walker]
460 clk_domain=system.cpu_clk_domain
463 num_squash_per_cycle=2
472 walker=system.cpu1.itb.walker
474 [system.cpu1.itb.walker]
476 clk_domain=system.cpu_clk_domain
479 num_squash_per_cycle=2
486 [system.cpu_clk_domain]
492 voltage_domain=system.voltage_domain
494 [system.dvfs_handler]
499 sys_clk_domain=system.clk_domain
500 transition_latency=100000000
509 clk_domain=system.clk_domain
514 use_default_range=false
516 master=system.realview.uart.pio system.realview.realview_io.pio system.realview.pci_host.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.hdlcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.rtc.pio system.realview.vram.port system.realview.l2x0_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.aaci_fake.pio system.realview.lan_fake.pio system.realview.usb_fake.pio system.realview.mmc_fake.pio system.realview.energy_ctrl.pio system.realview.ide.pio system.realview.ethernet.pio system.iocache.cpu_side
517 slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma system.realview.ide.dma system.realview.ethernet.dma
522 addr_ranges=2147483648:2415919103
524 clk_domain=system.clk_domain
525 clusivity=mostly_incl
526 demand_mshr_reserve=1
533 prefetch_on_access=false
536 sequential_access=false
539 tags=system.iocache.tags
542 writeback_clean=false
543 cpu_side=system.iobus.master[25]
544 mem_side=system.membus.slave[3]
546 [system.iocache.tags]
550 clk_domain=system.clk_domain
553 sequential_access=false
559 addr_ranges=0:18446744073709551615
561 clk_domain=system.cpu_clk_domain
562 clusivity=mostly_incl
563 demand_mshr_reserve=1
570 prefetch_on_access=false
573 sequential_access=false
579 writeback_clean=false
580 cpu_side=system.toL2Bus.master[0]
581 mem_side=system.membus.slave[2]
587 clk_domain=system.cpu_clk_domain
590 sequential_access=false
595 children=badaddr_responder
596 clk_domain=system.clk_domain
602 snoop_response_latency=4
604 use_default_range=false
606 default=system.membus.badaddr_responder.pio
607 master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port
608 slave=system.realview.hdlcd.dma system.system_port system.l2c.mem_side system.iocache.mem_side
610 [system.membus.badaddr_responder]
612 clk_domain=system.clk_domain
620 ret_data32=4294967295
621 ret_data64=18446744073709551615
626 pio=system.membus.default
631 clk_domain=system.clk_domain
632 conf_table_reported=true
638 range=2147483648:2415919103
639 port=system.membus.master[5]
643 children=aaci_fake cf_ctrl clcd dcc energy_ctrl ethernet generic_timer gic hdlcd ide kmi0 kmi1 l2x0_fake lan_fake local_cpu_timer mcc mmc_fake nvmem pci_host realview_io rtc sp810_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake usb_fake vgic vram watchdog_fake
645 intrctrl=system.intrctrl
648 [system.realview.aaci_fake]
651 clk_domain=system.clk_domain
657 pio=system.iobus.master[18]
659 [system.realview.cf_ctrl]
699 MSICAPNextCapability=0
703 MSIXCAPNextCapability=0
713 PMCAPNextCapability=0
718 PXCAPDevCapabilities=0
725 PXCAPNextCapability=0
733 clk_domain=system.clk_domain
738 host=system.realview.pci_host
745 dma=system.iobus.slave[2]
746 pio=system.iobus.master[9]
748 [system.realview.clcd]
751 clk_domain=system.clk_domain
754 gic=system.realview.gic
761 dma=system.iobus.slave[1]
762 pio=system.iobus.master[5]
764 [system.realview.dcc]
766 children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys
769 [system.realview.dcc.osc_cpu]
775 parent=system.realview.realview_io
778 voltage_domain=system.voltage_domain
780 [system.realview.dcc.osc_ddr]
786 parent=system.realview.realview_io
789 voltage_domain=system.voltage_domain
791 [system.realview.dcc.osc_hsbm]
797 parent=system.realview.realview_io
800 voltage_domain=system.voltage_domain
802 [system.realview.dcc.osc_pxl]
808 parent=system.realview.realview_io
811 voltage_domain=system.voltage_domain
813 [system.realview.dcc.osc_smb]
819 parent=system.realview.realview_io
822 voltage_domain=system.voltage_domain
824 [system.realview.dcc.osc_sys]
830 parent=system.realview.realview_io
833 voltage_domain=system.voltage_domain
835 [system.realview.energy_ctrl]
837 clk_domain=system.clk_domain
838 dvfs_handler=system.dvfs_handler
843 pio=system.iobus.master[22]
845 [system.realview.ethernet]
885 MSICAPNextCapability=0
889 MSIXCAPNextCapability=0
899 PMCAPNextCapability=0
904 PXCAPDevCapabilities=0
911 PXCAPNextCapability=0
917 SubsystemVendorID=32902
919 clk_domain=system.clk_domain
922 fetch_comp_delay=10000
924 hardware_address=00:90:00:00:00:01
925 host=system.realview.pci_host
932 rx_desc_cache_size=64
936 tx_desc_cache_size=64
941 dma=system.iobus.slave[4]
942 pio=system.iobus.master[24]
944 [system.realview.generic_timer]
947 gic=system.realview.gic
952 [system.realview.gic]
954 clk_domain=system.clk_domain
962 platform=system.realview
964 pio=system.membus.master[2]
966 [system.realview.hdlcd]
969 clk_domain=system.clk_domain
972 gic=system.realview.gic
976 pixel_buffer_size=2048
978 pxl_clk=system.realview.dcc.osc_pxl
981 workaround_dma_line_count=true
982 workaround_swap_rb=true
983 dma=system.membus.slave[0]
984 pio=system.iobus.master[6]
986 [system.realview.ide]
1025 MSICAPMsgUpperAddr=0
1026 MSICAPNextCapability=0
1030 MSIXCAPNextCapability=0
1040 PMCAPNextCapability=0
1045 PXCAPDevCapabilities=0
1052 PXCAPNextCapability=0
1060 clk_domain=system.clk_domain
1061 config_latency=20000
1065 host=system.realview.pci_host
1072 dma=system.iobus.slave[3]
1073 pio=system.iobus.master[23]
1075 [system.realview.kmi0]
1078 clk_domain=system.clk_domain
1080 gic=system.realview.gic
1087 vnc=system.vncserver
1088 pio=system.iobus.master[7]
1090 [system.realview.kmi1]
1093 clk_domain=system.clk_domain
1095 gic=system.realview.gic
1102 vnc=system.vncserver
1103 pio=system.iobus.master[8]
1105 [system.realview.l2x0_fake]
1107 clk_domain=system.clk_domain
1115 ret_data32=4294967295
1116 ret_data64=18446744073709551615
1121 pio=system.iobus.master[12]
1123 [system.realview.lan_fake]
1125 clk_domain=system.clk_domain
1133 ret_data32=4294967295
1134 ret_data64=18446744073709551615
1139 pio=system.iobus.master[19]
1141 [system.realview.local_cpu_timer]
1143 clk_domain=system.clk_domain
1145 gic=system.realview.gic
1151 pio=system.membus.master[4]
1153 [system.realview.mcc]
1155 children=osc_clcd osc_mcc osc_peripheral osc_system_bus
1158 [system.realview.mcc.osc_clcd]
1164 parent=system.realview.realview_io
1167 voltage_domain=system.voltage_domain
1169 [system.realview.mcc.osc_mcc]
1175 parent=system.realview.realview_io
1178 voltage_domain=system.voltage_domain
1180 [system.realview.mcc.osc_peripheral]
1186 parent=system.realview.realview_io
1189 voltage_domain=system.voltage_domain
1191 [system.realview.mcc.osc_system_bus]
1197 parent=system.realview.realview_io
1200 voltage_domain=system.voltage_domain
1202 [system.realview.mmc_fake]
1205 clk_domain=system.clk_domain
1211 pio=system.iobus.master[21]
1213 [system.realview.nvmem]
1216 clk_domain=system.clk_domain
1217 conf_table_reported=false
1224 port=system.membus.master[1]
1226 [system.realview.pci_host]
1228 clk_domain=system.clk_domain
1236 platform=system.realview
1238 pio=system.iobus.master[2]
1240 [system.realview.realview_io]
1242 clk_domain=system.clk_domain
1250 pio=system.iobus.master[1]
1252 [system.realview.rtc]
1255 clk_domain=system.clk_domain
1257 gic=system.realview.gic
1263 time=Thu Jan 1 00:00:00 2009
1264 pio=system.iobus.master[10]
1266 [system.realview.sp810_fake]
1269 clk_domain=system.clk_domain
1275 pio=system.iobus.master[16]
1277 [system.realview.timer0]
1280 clk_domain=system.clk_domain
1284 gic=system.realview.gic
1290 pio=system.iobus.master[3]
1292 [system.realview.timer1]
1295 clk_domain=system.clk_domain
1299 gic=system.realview.gic
1305 pio=system.iobus.master[4]
1307 [system.realview.uart]
1309 clk_domain=system.clk_domain
1312 gic=system.realview.gic
1317 platform=system.realview
1319 terminal=system.terminal
1320 pio=system.iobus.master[0]
1322 [system.realview.uart1_fake]
1325 clk_domain=system.clk_domain
1331 pio=system.iobus.master[13]
1333 [system.realview.uart2_fake]
1336 clk_domain=system.clk_domain
1342 pio=system.iobus.master[14]
1344 [system.realview.uart3_fake]
1347 clk_domain=system.clk_domain
1353 pio=system.iobus.master[15]
1355 [system.realview.usb_fake]
1357 clk_domain=system.clk_domain
1365 ret_data32=4294967295
1366 ret_data64=18446744073709551615
1371 pio=system.iobus.master[20]
1373 [system.realview.vgic]
1375 clk_domain=system.clk_domain
1377 gic=system.realview.gic
1380 platform=system.realview
1384 pio=system.membus.master[3]
1386 [system.realview.vram]
1389 clk_domain=system.clk_domain
1390 conf_table_reported=false
1396 range=402653184:436207615
1397 port=system.iobus.master[11]
1399 [system.realview.watchdog_fake]
1402 clk_domain=system.clk_domain
1408 pio=system.iobus.master[17]
1413 intr_control=system.intrctrl
1420 children=snoop_filter
1421 clk_domain=system.cpu_clk_domain
1426 snoop_filter=system.toL2Bus.snoop_filter
1427 snoop_response_latency=1
1429 use_default_range=false
1431 master=system.l2c.cpu_side
1432 slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port
1434 [system.toL2Bus.snoop_filter]
1438 max_capacity=8388608
1448 [system.voltage_domain]