2 ---------- Begin Simulation Statistics ----------
3 sim_seconds 5.112152 # Number of seconds simulated
4 sim_ticks 5112152301500 # Number of ticks simulated
5 final_tick 5112152301500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6 sim_freq 1000000000000 # Frequency of simulated ticks
7 host_inst_rate 973581 # Simulator instruction rate (inst/s)
8 host_op_rate 1993134 # Simulator op (including micro ops) rate (op/s)
9 host_tick_rate 24877176621 # Simulator tick rate (ticks/s)
10 host_mem_usage 614804 # Number of bytes of host memory used
11 host_seconds 205.50 # Real time elapsed on the host
12 sim_insts 200066731 # Number of instructions simulated
13 sim_ops 409580371 # Number of ops (including micro ops) simulated
14 system.voltage_domain.voltage 1 # Voltage in Volts
15 system.clk_domain.clock 1000 # Clock period in ticks
16 system.physmem.bytes_read::cpu.dtb.walker 64 # Number of bytes read from this memory
17 system.physmem.bytes_read::cpu.itb.walker 320 # Number of bytes read from this memory
18 system.physmem.bytes_read::cpu.inst 846912 # Number of bytes read from this memory
19 system.physmem.bytes_read::cpu.data 10615104 # Number of bytes read from this memory
20 system.physmem.bytes_read::pc.south_bridge.ide 28352 # Number of bytes read from this memory
21 system.physmem.bytes_read::total 11490752 # Number of bytes read from this memory
22 system.physmem.bytes_inst_read::cpu.inst 846912 # Number of instructions bytes read from this memory
23 system.physmem.bytes_inst_read::total 846912 # Number of instructions bytes read from this memory
24 system.physmem.bytes_written::writebacks 9270016 # Number of bytes written to this memory
25 system.physmem.bytes_written::total 9270016 # Number of bytes written to this memory
26 system.physmem.num_reads::cpu.dtb.walker 1 # Number of read requests responded to by this memory
27 system.physmem.num_reads::cpu.itb.walker 5 # Number of read requests responded to by this memory
28 system.physmem.num_reads::cpu.inst 13233 # Number of read requests responded to by this memory
29 system.physmem.num_reads::cpu.data 165861 # Number of read requests responded to by this memory
30 system.physmem.num_reads::pc.south_bridge.ide 443 # Number of read requests responded to by this memory
31 system.physmem.num_reads::total 179543 # Number of read requests responded to by this memory
32 system.physmem.num_writes::writebacks 144844 # Number of write requests responded to by this memory
33 system.physmem.num_writes::total 144844 # Number of write requests responded to by this memory
34 system.physmem.bw_read::cpu.dtb.walker 13 # Total read bandwidth from this memory (bytes/s)
35 system.physmem.bw_read::cpu.itb.walker 63 # Total read bandwidth from this memory (bytes/s)
36 system.physmem.bw_read::cpu.inst 165666 # Total read bandwidth from this memory (bytes/s)
37 system.physmem.bw_read::cpu.data 2076445 # Total read bandwidth from this memory (bytes/s)
38 system.physmem.bw_read::pc.south_bridge.ide 5546 # Total read bandwidth from this memory (bytes/s)
39 system.physmem.bw_read::total 2247733 # Total read bandwidth from this memory (bytes/s)
40 system.physmem.bw_inst_read::cpu.inst 165666 # Instruction read bandwidth from this memory (bytes/s)
41 system.physmem.bw_inst_read::total 165666 # Instruction read bandwidth from this memory (bytes/s)
42 system.physmem.bw_write::writebacks 1813329 # Write bandwidth from this memory (bytes/s)
43 system.physmem.bw_write::total 1813329 # Write bandwidth from this memory (bytes/s)
44 system.physmem.bw_total::writebacks 1813329 # Total bandwidth to/from this memory (bytes/s)
45 system.physmem.bw_total::cpu.dtb.walker 13 # Total bandwidth to/from this memory (bytes/s)
46 system.physmem.bw_total::cpu.itb.walker 63 # Total bandwidth to/from this memory (bytes/s)
47 system.physmem.bw_total::cpu.inst 165666 # Total bandwidth to/from this memory (bytes/s)
48 system.physmem.bw_total::cpu.data 2076445 # Total bandwidth to/from this memory (bytes/s)
49 system.physmem.bw_total::pc.south_bridge.ide 5546 # Total bandwidth to/from this memory (bytes/s)
50 system.physmem.bw_total::total 4061062 # Total bandwidth to/from this memory (bytes/s)
51 system.cpu_clk_domain.clock 500 # Clock period in ticks
52 system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks
53 system.cpu.numCycles 10224308568 # number of cpu cycles simulated
54 system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
55 system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
56 system.cpu.kern.inst.arm 0 # number of arm instructions executed
57 system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed
58 system.cpu.committedInsts 200066731 # Number of instructions committed
59 system.cpu.committedOps 409580371 # Number of ops (including micro ops) committed
60 system.cpu.num_int_alu_accesses 374583495 # Number of integer alu accesses
61 system.cpu.num_fp_alu_accesses 48 # Number of float alu accesses
62 system.cpu.num_func_calls 2308877 # number of times a function call or return occured
63 system.cpu.num_conditional_control_insts 40001070 # number of instructions that are conditional controls
64 system.cpu.num_int_insts 374583495 # number of integer instructions
65 system.cpu.num_fp_insts 48 # number of float instructions
66 system.cpu.num_int_register_reads 682689563 # number of times the integer registers were read
67 system.cpu.num_int_register_writes 323557658 # number of times the integer registers were written
68 system.cpu.num_fp_register_reads 48 # number of times the floating registers were read
69 system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
70 system.cpu.num_cc_register_reads 233837318 # number of times the CC registers were read
71 system.cpu.num_cc_register_writes 157316420 # number of times the CC registers were written
72 system.cpu.num_mem_refs 35667022 # number of memory refs
73 system.cpu.num_load_insts 27243255 # Number of load instructions
74 system.cpu.num_store_insts 8423767 # Number of store instructions
75 system.cpu.num_idle_cycles 9770324721.656570 # Number of idle cycles
76 system.cpu.num_busy_cycles 453983846.343430 # Number of busy cycles
77 system.cpu.not_idle_fraction 0.044402 # Percentage of non-idle cycles
78 system.cpu.idle_fraction 0.955598 # Percentage of idle cycles
79 system.cpu.Branches 43152159 # Number of branches fetched
80 system.cpu.op_class::No_OpClass 172754 0.04% 0.04% # Class of executed instruction
81 system.cpu.op_class::IntAlu 373476545 91.18% 91.23% # Class of executed instruction
82 system.cpu.op_class::IntMult 144577 0.04% 91.26% # Class of executed instruction
83 system.cpu.op_class::IntDiv 123078 0.03% 91.29% # Class of executed instruction
84 system.cpu.op_class::FloatAdd 0 0.00% 91.29% # Class of executed instruction
85 system.cpu.op_class::FloatCmp 0 0.00% 91.29% # Class of executed instruction
86 system.cpu.op_class::FloatCvt 16 0.00% 91.29% # Class of executed instruction
87 system.cpu.op_class::FloatMult 0 0.00% 91.29% # Class of executed instruction
88 system.cpu.op_class::FloatDiv 0 0.00% 91.29% # Class of executed instruction
89 system.cpu.op_class::FloatSqrt 0 0.00% 91.29% # Class of executed instruction
90 system.cpu.op_class::SimdAdd 0 0.00% 91.29% # Class of executed instruction
91 system.cpu.op_class::SimdAddAcc 0 0.00% 91.29% # Class of executed instruction
92 system.cpu.op_class::SimdAlu 0 0.00% 91.29% # Class of executed instruction
93 system.cpu.op_class::SimdCmp 0 0.00% 91.29% # Class of executed instruction
94 system.cpu.op_class::SimdCvt 0 0.00% 91.29% # Class of executed instruction
95 system.cpu.op_class::SimdMisc 0 0.00% 91.29% # Class of executed instruction
96 system.cpu.op_class::SimdMult 0 0.00% 91.29% # Class of executed instruction
97 system.cpu.op_class::SimdMultAcc 0 0.00% 91.29% # Class of executed instruction
98 system.cpu.op_class::SimdShift 0 0.00% 91.29% # Class of executed instruction
99 system.cpu.op_class::SimdShiftAcc 0 0.00% 91.29% # Class of executed instruction
100 system.cpu.op_class::SimdSqrt 0 0.00% 91.29% # Class of executed instruction
101 system.cpu.op_class::SimdFloatAdd 0 0.00% 91.29% # Class of executed instruction
102 system.cpu.op_class::SimdFloatAlu 0 0.00% 91.29% # Class of executed instruction
103 system.cpu.op_class::SimdFloatCmp 0 0.00% 91.29% # Class of executed instruction
104 system.cpu.op_class::SimdFloatCvt 0 0.00% 91.29% # Class of executed instruction
105 system.cpu.op_class::SimdFloatDiv 0 0.00% 91.29% # Class of executed instruction
106 system.cpu.op_class::SimdFloatMisc 0 0.00% 91.29% # Class of executed instruction
107 system.cpu.op_class::SimdFloatMult 0 0.00% 91.29% # Class of executed instruction
108 system.cpu.op_class::SimdFloatMultAcc 0 0.00% 91.29% # Class of executed instruction
109 system.cpu.op_class::SimdFloatSqrt 0 0.00% 91.29% # Class of executed instruction
110 system.cpu.op_class::MemRead 27240665 6.65% 97.94% # Class of executed instruction
111 system.cpu.op_class::MemWrite 8423767 2.06% 100.00% # Class of executed instruction
112 system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
113 system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
114 system.cpu.op_class::total 409581402 # Class of executed instruction
115 system.cpu.dcache.tags.replacements 1621902 # number of replacements
116 system.cpu.dcache.tags.tagsinuse 511.999425 # Cycle average of tags in use
117 system.cpu.dcache.tags.total_refs 20181182 # Total number of references to valid blocks.
118 system.cpu.dcache.tags.sampled_refs 1622414 # Sample count of references to valid blocks.
119 system.cpu.dcache.tags.avg_refs 12.438984 # Average number of references to valid blocks.
120 system.cpu.dcache.tags.warmup_cycle 7549500 # Cycle when the warmup percentage was hit.
121 system.cpu.dcache.tags.occ_blocks::cpu.data 511.999425 # Average occupied blocks per requestor
122 system.cpu.dcache.tags.occ_percent::cpu.data 0.999999 # Average percentage of cache occupancy
123 system.cpu.dcache.tags.occ_percent::total 0.999999 # Average percentage of cache occupancy
124 system.cpu.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id
125 system.cpu.dcache.tags.age_task_id_blocks_1024::0 282 # Occupied blocks per task id
126 system.cpu.dcache.tags.age_task_id_blocks_1024::1 202 # Occupied blocks per task id
127 system.cpu.dcache.tags.age_task_id_blocks_1024::2 28 # Occupied blocks per task id
128 system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
129 system.cpu.dcache.tags.tag_accesses 88836888 # Number of tag accesses
130 system.cpu.dcache.tags.data_accesses 88836888 # Number of data accesses
131 system.cpu.dcache.ReadReq_hits::cpu.data 12023339 # number of ReadReq hits
132 system.cpu.dcache.ReadReq_hits::total 12023339 # number of ReadReq hits
133 system.cpu.dcache.WriteReq_hits::cpu.data 8096662 # number of WriteReq hits
134 system.cpu.dcache.WriteReq_hits::total 8096662 # number of WriteReq hits
135 system.cpu.dcache.SoftPFReq_hits::cpu.data 58900 # number of SoftPFReq hits
136 system.cpu.dcache.SoftPFReq_hits::total 58900 # number of SoftPFReq hits
137 system.cpu.dcache.demand_hits::cpu.data 20120001 # number of demand (read+write) hits
138 system.cpu.dcache.demand_hits::total 20120001 # number of demand (read+write) hits
139 system.cpu.dcache.overall_hits::cpu.data 20178901 # number of overall hits
140 system.cpu.dcache.overall_hits::total 20178901 # number of overall hits
141 system.cpu.dcache.ReadReq_misses::cpu.data 905249 # number of ReadReq misses
142 system.cpu.dcache.ReadReq_misses::total 905249 # number of ReadReq misses
143 system.cpu.dcache.WriteReq_misses::cpu.data 316707 # number of WriteReq misses
144 system.cpu.dcache.WriteReq_misses::total 316707 # number of WriteReq misses
145 system.cpu.dcache.SoftPFReq_misses::cpu.data 402757 # number of SoftPFReq misses
146 system.cpu.dcache.SoftPFReq_misses::total 402757 # number of SoftPFReq misses
147 system.cpu.dcache.demand_misses::cpu.data 1221956 # number of demand (read+write) misses
148 system.cpu.dcache.demand_misses::total 1221956 # number of demand (read+write) misses
149 system.cpu.dcache.overall_misses::cpu.data 1624713 # number of overall misses
150 system.cpu.dcache.overall_misses::total 1624713 # number of overall misses
151 system.cpu.dcache.ReadReq_accesses::cpu.data 12928588 # number of ReadReq accesses(hits+misses)
152 system.cpu.dcache.ReadReq_accesses::total 12928588 # number of ReadReq accesses(hits+misses)
153 system.cpu.dcache.WriteReq_accesses::cpu.data 8413369 # number of WriteReq accesses(hits+misses)
154 system.cpu.dcache.WriteReq_accesses::total 8413369 # number of WriteReq accesses(hits+misses)
155 system.cpu.dcache.SoftPFReq_accesses::cpu.data 461657 # number of SoftPFReq accesses(hits+misses)
156 system.cpu.dcache.SoftPFReq_accesses::total 461657 # number of SoftPFReq accesses(hits+misses)
157 system.cpu.dcache.demand_accesses::cpu.data 21341957 # number of demand (read+write) accesses
158 system.cpu.dcache.demand_accesses::total 21341957 # number of demand (read+write) accesses
159 system.cpu.dcache.overall_accesses::cpu.data 21803614 # number of overall (read+write) accesses
160 system.cpu.dcache.overall_accesses::total 21803614 # number of overall (read+write) accesses
161 system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.070019 # miss rate for ReadReq accesses
162 system.cpu.dcache.ReadReq_miss_rate::total 0.070019 # miss rate for ReadReq accesses
163 system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.037643 # miss rate for WriteReq accesses
164 system.cpu.dcache.WriteReq_miss_rate::total 0.037643 # miss rate for WriteReq accesses
165 system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.872416 # miss rate for SoftPFReq accesses
166 system.cpu.dcache.SoftPFReq_miss_rate::total 0.872416 # miss rate for SoftPFReq accesses
167 system.cpu.dcache.demand_miss_rate::cpu.data 0.057256 # miss rate for demand accesses
168 system.cpu.dcache.demand_miss_rate::total 0.057256 # miss rate for demand accesses
169 system.cpu.dcache.overall_miss_rate::cpu.data 0.074516 # miss rate for overall accesses
170 system.cpu.dcache.overall_miss_rate::total 0.074516 # miss rate for overall accesses
171 system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
172 system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
173 system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
174 system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked
175 system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
176 system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
177 system.cpu.dcache.fast_writes 0 # number of fast writes performed
178 system.cpu.dcache.cache_copies 0 # number of cache copies performed
179 system.cpu.dcache.writebacks::writebacks 1535779 # number of writebacks
180 system.cpu.dcache.writebacks::total 1535779 # number of writebacks
181 system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
182 system.cpu.dtb_walker_cache.tags.replacements 7749 # number of replacements
183 system.cpu.dtb_walker_cache.tags.tagsinuse 5.013997 # Cycle average of tags in use
184 system.cpu.dtb_walker_cache.tags.total_refs 12940 # Total number of references to valid blocks.
185 system.cpu.dtb_walker_cache.tags.sampled_refs 7763 # Sample count of references to valid blocks.
186 system.cpu.dtb_walker_cache.tags.avg_refs 1.666881 # Average number of references to valid blocks.
187 system.cpu.dtb_walker_cache.tags.warmup_cycle 5100454141000 # Cycle when the warmup percentage was hit.
188 system.cpu.dtb_walker_cache.tags.occ_blocks::cpu.dtb.walker 5.013997 # Average occupied blocks per requestor
189 system.cpu.dtb_walker_cache.tags.occ_percent::cpu.dtb.walker 0.313375 # Average percentage of cache occupancy
190 system.cpu.dtb_walker_cache.tags.occ_percent::total 0.313375 # Average percentage of cache occupancy
191 system.cpu.dtb_walker_cache.tags.occ_task_id_blocks::1024 14 # Occupied blocks per task id
192 system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::0 5 # Occupied blocks per task id
193 system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::1 5 # Occupied blocks per task id
194 system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id
195 system.cpu.dtb_walker_cache.tags.occ_task_id_percent::1024 0.875000 # Percentage of cache occupancy per task id
196 system.cpu.dtb_walker_cache.tags.tag_accesses 52753 # Number of tag accesses
197 system.cpu.dtb_walker_cache.tags.data_accesses 52753 # Number of data accesses
198 system.cpu.dtb_walker_cache.ReadReq_hits::cpu.dtb.walker 12941 # number of ReadReq hits
199 system.cpu.dtb_walker_cache.ReadReq_hits::total 12941 # number of ReadReq hits
200 system.cpu.dtb_walker_cache.demand_hits::cpu.dtb.walker 12941 # number of demand (read+write) hits
201 system.cpu.dtb_walker_cache.demand_hits::total 12941 # number of demand (read+write) hits
202 system.cpu.dtb_walker_cache.overall_hits::cpu.dtb.walker 12941 # number of overall hits
203 system.cpu.dtb_walker_cache.overall_hits::total 12941 # number of overall hits
204 system.cpu.dtb_walker_cache.ReadReq_misses::cpu.dtb.walker 8957 # number of ReadReq misses
205 system.cpu.dtb_walker_cache.ReadReq_misses::total 8957 # number of ReadReq misses
206 system.cpu.dtb_walker_cache.demand_misses::cpu.dtb.walker 8957 # number of demand (read+write) misses
207 system.cpu.dtb_walker_cache.demand_misses::total 8957 # number of demand (read+write) misses
208 system.cpu.dtb_walker_cache.overall_misses::cpu.dtb.walker 8957 # number of overall misses
209 system.cpu.dtb_walker_cache.overall_misses::total 8957 # number of overall misses
210 system.cpu.dtb_walker_cache.ReadReq_accesses::cpu.dtb.walker 21898 # number of ReadReq accesses(hits+misses)
211 system.cpu.dtb_walker_cache.ReadReq_accesses::total 21898 # number of ReadReq accesses(hits+misses)
212 system.cpu.dtb_walker_cache.demand_accesses::cpu.dtb.walker 21898 # number of demand (read+write) accesses
213 system.cpu.dtb_walker_cache.demand_accesses::total 21898 # number of demand (read+write) accesses
214 system.cpu.dtb_walker_cache.overall_accesses::cpu.dtb.walker 21898 # number of overall (read+write) accesses
215 system.cpu.dtb_walker_cache.overall_accesses::total 21898 # number of overall (read+write) accesses
216 system.cpu.dtb_walker_cache.ReadReq_miss_rate::cpu.dtb.walker 0.409033 # miss rate for ReadReq accesses
217 system.cpu.dtb_walker_cache.ReadReq_miss_rate::total 0.409033 # miss rate for ReadReq accesses
218 system.cpu.dtb_walker_cache.demand_miss_rate::cpu.dtb.walker 0.409033 # miss rate for demand accesses
219 system.cpu.dtb_walker_cache.demand_miss_rate::total 0.409033 # miss rate for demand accesses
220 system.cpu.dtb_walker_cache.overall_miss_rate::cpu.dtb.walker 0.409033 # miss rate for overall accesses
221 system.cpu.dtb_walker_cache.overall_miss_rate::total 0.409033 # miss rate for overall accesses
222 system.cpu.dtb_walker_cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
223 system.cpu.dtb_walker_cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
224 system.cpu.dtb_walker_cache.blocked::no_mshrs 0 # number of cycles access was blocked
225 system.cpu.dtb_walker_cache.blocked::no_targets 0 # number of cycles access was blocked
226 system.cpu.dtb_walker_cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
227 system.cpu.dtb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
228 system.cpu.dtb_walker_cache.fast_writes 0 # number of fast writes performed
229 system.cpu.dtb_walker_cache.cache_copies 0 # number of cache copies performed
230 system.cpu.dtb_walker_cache.writebacks::writebacks 2453 # number of writebacks
231 system.cpu.dtb_walker_cache.writebacks::total 2453 # number of writebacks
232 system.cpu.dtb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate
233 system.cpu.icache.tags.replacements 792216 # number of replacements
234 system.cpu.icache.tags.tagsinuse 510.662956 # Cycle average of tags in use
235 system.cpu.icache.tags.total_refs 243675150 # Total number of references to valid blocks.
236 system.cpu.icache.tags.sampled_refs 792728 # Sample count of references to valid blocks.
237 system.cpu.icache.tags.avg_refs 307.388095 # Average number of references to valid blocks.
238 system.cpu.icache.tags.warmup_cycle 148913118500 # Cycle when the warmup percentage was hit.
239 system.cpu.icache.tags.occ_blocks::cpu.inst 510.662956 # Average occupied blocks per requestor
240 system.cpu.icache.tags.occ_percent::cpu.inst 0.997389 # Average percentage of cache occupancy
241 system.cpu.icache.tags.occ_percent::total 0.997389 # Average percentage of cache occupancy
242 system.cpu.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id
243 system.cpu.icache.tags.age_task_id_blocks_1024::0 90 # Occupied blocks per task id
244 system.cpu.icache.tags.age_task_id_blocks_1024::1 130 # Occupied blocks per task id
245 system.cpu.icache.tags.age_task_id_blocks_1024::2 291 # Occupied blocks per task id
246 system.cpu.icache.tags.age_task_id_blocks_1024::3 1 # Occupied blocks per task id
247 system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
248 system.cpu.icache.tags.tag_accesses 245260620 # Number of tag accesses
249 system.cpu.icache.tags.data_accesses 245260620 # Number of data accesses
250 system.cpu.icache.ReadReq_hits::cpu.inst 243675150 # number of ReadReq hits
251 system.cpu.icache.ReadReq_hits::total 243675150 # number of ReadReq hits
252 system.cpu.icache.demand_hits::cpu.inst 243675150 # number of demand (read+write) hits
253 system.cpu.icache.demand_hits::total 243675150 # number of demand (read+write) hits
254 system.cpu.icache.overall_hits::cpu.inst 243675150 # number of overall hits
255 system.cpu.icache.overall_hits::total 243675150 # number of overall hits
256 system.cpu.icache.ReadReq_misses::cpu.inst 792735 # number of ReadReq misses
257 system.cpu.icache.ReadReq_misses::total 792735 # number of ReadReq misses
258 system.cpu.icache.demand_misses::cpu.inst 792735 # number of demand (read+write) misses
259 system.cpu.icache.demand_misses::total 792735 # number of demand (read+write) misses
260 system.cpu.icache.overall_misses::cpu.inst 792735 # number of overall misses
261 system.cpu.icache.overall_misses::total 792735 # number of overall misses
262 system.cpu.icache.ReadReq_accesses::cpu.inst 244467885 # number of ReadReq accesses(hits+misses)
263 system.cpu.icache.ReadReq_accesses::total 244467885 # number of ReadReq accesses(hits+misses)
264 system.cpu.icache.demand_accesses::cpu.inst 244467885 # number of demand (read+write) accesses
265 system.cpu.icache.demand_accesses::total 244467885 # number of demand (read+write) accesses
266 system.cpu.icache.overall_accesses::cpu.inst 244467885 # number of overall (read+write) accesses
267 system.cpu.icache.overall_accesses::total 244467885 # number of overall (read+write) accesses
268 system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.003243 # miss rate for ReadReq accesses
269 system.cpu.icache.ReadReq_miss_rate::total 0.003243 # miss rate for ReadReq accesses
270 system.cpu.icache.demand_miss_rate::cpu.inst 0.003243 # miss rate for demand accesses
271 system.cpu.icache.demand_miss_rate::total 0.003243 # miss rate for demand accesses
272 system.cpu.icache.overall_miss_rate::cpu.inst 0.003243 # miss rate for overall accesses
273 system.cpu.icache.overall_miss_rate::total 0.003243 # miss rate for overall accesses
274 system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
275 system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
276 system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked
277 system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked
278 system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
279 system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
280 system.cpu.icache.fast_writes 0 # number of fast writes performed
281 system.cpu.icache.cache_copies 0 # number of cache copies performed
282 system.cpu.icache.writebacks::writebacks 792216 # number of writebacks
283 system.cpu.icache.writebacks::total 792216 # number of writebacks
284 system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
285 system.cpu.itb_walker_cache.tags.replacements 3586 # number of replacements
286 system.cpu.itb_walker_cache.tags.tagsinuse 3.026546 # Cycle average of tags in use
287 system.cpu.itb_walker_cache.tags.total_refs 7763 # Total number of references to valid blocks.
288 system.cpu.itb_walker_cache.tags.sampled_refs 3597 # Sample count of references to valid blocks.
289 system.cpu.itb_walker_cache.tags.avg_refs 2.158187 # Average number of references to valid blocks.
290 system.cpu.itb_walker_cache.tags.warmup_cycle 5102144896000 # Cycle when the warmup percentage was hit.
291 system.cpu.itb_walker_cache.tags.occ_blocks::cpu.itb.walker 3.026546 # Average occupied blocks per requestor
292 system.cpu.itb_walker_cache.tags.occ_percent::cpu.itb.walker 0.189159 # Average percentage of cache occupancy
293 system.cpu.itb_walker_cache.tags.occ_percent::total 0.189159 # Average percentage of cache occupancy
294 system.cpu.itb_walker_cache.tags.occ_task_id_blocks::1024 11 # Occupied blocks per task id
295 system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::0 6 # Occupied blocks per task id
296 system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id
297 system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::3 1 # Occupied blocks per task id
298 system.cpu.itb_walker_cache.tags.occ_task_id_percent::1024 0.687500 # Percentage of cache occupancy per task id
299 system.cpu.itb_walker_cache.tags.tag_accesses 28899 # Number of tag accesses
300 system.cpu.itb_walker_cache.tags.data_accesses 28899 # Number of data accesses
301 system.cpu.itb_walker_cache.ReadReq_hits::cpu.itb.walker 7765 # number of ReadReq hits
302 system.cpu.itb_walker_cache.ReadReq_hits::total 7765 # number of ReadReq hits
303 system.cpu.itb_walker_cache.WriteReq_hits::cpu.itb.walker 2 # number of WriteReq hits
304 system.cpu.itb_walker_cache.WriteReq_hits::total 2 # number of WriteReq hits
305 system.cpu.itb_walker_cache.demand_hits::cpu.itb.walker 7767 # number of demand (read+write) hits
306 system.cpu.itb_walker_cache.demand_hits::total 7767 # number of demand (read+write) hits
307 system.cpu.itb_walker_cache.overall_hits::cpu.itb.walker 7767 # number of overall hits
308 system.cpu.itb_walker_cache.overall_hits::total 7767 # number of overall hits
309 system.cpu.itb_walker_cache.ReadReq_misses::cpu.itb.walker 4455 # number of ReadReq misses
310 system.cpu.itb_walker_cache.ReadReq_misses::total 4455 # number of ReadReq misses
311 system.cpu.itb_walker_cache.demand_misses::cpu.itb.walker 4455 # number of demand (read+write) misses
312 system.cpu.itb_walker_cache.demand_misses::total 4455 # number of demand (read+write) misses
313 system.cpu.itb_walker_cache.overall_misses::cpu.itb.walker 4455 # number of overall misses
314 system.cpu.itb_walker_cache.overall_misses::total 4455 # number of overall misses
315 system.cpu.itb_walker_cache.ReadReq_accesses::cpu.itb.walker 12220 # number of ReadReq accesses(hits+misses)
316 system.cpu.itb_walker_cache.ReadReq_accesses::total 12220 # number of ReadReq accesses(hits+misses)
317 system.cpu.itb_walker_cache.WriteReq_accesses::cpu.itb.walker 2 # number of WriteReq accesses(hits+misses)
318 system.cpu.itb_walker_cache.WriteReq_accesses::total 2 # number of WriteReq accesses(hits+misses)
319 system.cpu.itb_walker_cache.demand_accesses::cpu.itb.walker 12222 # number of demand (read+write) accesses
320 system.cpu.itb_walker_cache.demand_accesses::total 12222 # number of demand (read+write) accesses
321 system.cpu.itb_walker_cache.overall_accesses::cpu.itb.walker 12222 # number of overall (read+write) accesses
322 system.cpu.itb_walker_cache.overall_accesses::total 12222 # number of overall (read+write) accesses
323 system.cpu.itb_walker_cache.ReadReq_miss_rate::cpu.itb.walker 0.364566 # miss rate for ReadReq accesses
324 system.cpu.itb_walker_cache.ReadReq_miss_rate::total 0.364566 # miss rate for ReadReq accesses
325 system.cpu.itb_walker_cache.demand_miss_rate::cpu.itb.walker 0.364507 # miss rate for demand accesses
326 system.cpu.itb_walker_cache.demand_miss_rate::total 0.364507 # miss rate for demand accesses
327 system.cpu.itb_walker_cache.overall_miss_rate::cpu.itb.walker 0.364507 # miss rate for overall accesses
328 system.cpu.itb_walker_cache.overall_miss_rate::total 0.364507 # miss rate for overall accesses
329 system.cpu.itb_walker_cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
330 system.cpu.itb_walker_cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
331 system.cpu.itb_walker_cache.blocked::no_mshrs 0 # number of cycles access was blocked
332 system.cpu.itb_walker_cache.blocked::no_targets 0 # number of cycles access was blocked
333 system.cpu.itb_walker_cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
334 system.cpu.itb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
335 system.cpu.itb_walker_cache.fast_writes 0 # number of fast writes performed
336 system.cpu.itb_walker_cache.cache_copies 0 # number of cache copies performed
337 system.cpu.itb_walker_cache.writebacks::writebacks 545 # number of writebacks
338 system.cpu.itb_walker_cache.writebacks::total 545 # number of writebacks
339 system.cpu.itb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate
340 system.cpu.l2cache.tags.replacements 106204 # number of replacements
341 system.cpu.l2cache.tags.tagsinuse 64823.931309 # Cycle average of tags in use
342 system.cpu.l2cache.tags.total_refs 4340224 # Total number of references to valid blocks.
343 system.cpu.l2cache.tags.sampled_refs 170162 # Sample count of references to valid blocks.
344 system.cpu.l2cache.tags.avg_refs 25.506423 # Average number of references to valid blocks.
345 system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.
346 system.cpu.l2cache.tags.occ_blocks::writebacks 51928.965552 # Average occupied blocks per requestor
347 system.cpu.l2cache.tags.occ_blocks::cpu.dtb.walker 0.002478 # Average occupied blocks per requestor
348 system.cpu.l2cache.tags.occ_blocks::cpu.itb.walker 0.135113 # Average occupied blocks per requestor
349 system.cpu.l2cache.tags.occ_blocks::cpu.inst 2458.314401 # Average occupied blocks per requestor
350 system.cpu.l2cache.tags.occ_blocks::cpu.data 10436.513764 # Average occupied blocks per requestor
351 system.cpu.l2cache.tags.occ_percent::writebacks 0.792373 # Average percentage of cache occupancy
352 system.cpu.l2cache.tags.occ_percent::cpu.dtb.walker 0.000000 # Average percentage of cache occupancy
353 system.cpu.l2cache.tags.occ_percent::cpu.itb.walker 0.000002 # Average percentage of cache occupancy
354 system.cpu.l2cache.tags.occ_percent::cpu.inst 0.037511 # Average percentage of cache occupancy
355 system.cpu.l2cache.tags.occ_percent::cpu.data 0.159249 # Average percentage of cache occupancy
356 system.cpu.l2cache.tags.occ_percent::total 0.989135 # Average percentage of cache occupancy
357 system.cpu.l2cache.tags.occ_task_id_blocks::1024 63958 # Occupied blocks per task id
358 system.cpu.l2cache.tags.age_task_id_blocks_1024::0 57 # Occupied blocks per task id
359 system.cpu.l2cache.tags.age_task_id_blocks_1024::1 233 # Occupied blocks per task id
360 system.cpu.l2cache.tags.age_task_id_blocks_1024::2 3349 # Occupied blocks per task id
361 system.cpu.l2cache.tags.age_task_id_blocks_1024::3 20908 # Occupied blocks per task id
362 system.cpu.l2cache.tags.age_task_id_blocks_1024::4 39411 # Occupied blocks per task id
363 system.cpu.l2cache.tags.occ_task_id_percent::1024 0.975922 # Percentage of cache occupancy per task id
364 system.cpu.l2cache.tags.tag_accesses 39255979 # Number of tag accesses
365 system.cpu.l2cache.tags.data_accesses 39255979 # Number of data accesses
366 system.cpu.l2cache.WritebackDirty_hits::writebacks 1538777 # number of WritebackDirty hits
367 system.cpu.l2cache.WritebackDirty_hits::total 1538777 # number of WritebackDirty hits
368 system.cpu.l2cache.WritebackClean_hits::writebacks 792205 # number of WritebackClean hits
369 system.cpu.l2cache.WritebackClean_hits::total 792205 # number of WritebackClean hits
370 system.cpu.l2cache.UpgradeReq_hits::cpu.data 21 # number of UpgradeReq hits
371 system.cpu.l2cache.UpgradeReq_hits::total 21 # number of UpgradeReq hits
372 system.cpu.l2cache.ReadExReq_hits::cpu.data 179774 # number of ReadExReq hits
373 system.cpu.l2cache.ReadExReq_hits::total 179774 # number of ReadExReq hits
374 system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 779488 # number of ReadCleanReq hits
375 system.cpu.l2cache.ReadCleanReq_hits::total 779488 # number of ReadCleanReq hits
376 system.cpu.l2cache.ReadSharedReq_hits::cpu.dtb.walker 6656 # number of ReadSharedReq hits
377 system.cpu.l2cache.ReadSharedReq_hits::cpu.itb.walker 2896 # number of ReadSharedReq hits
378 system.cpu.l2cache.ReadSharedReq_hits::cpu.data 1275198 # number of ReadSharedReq hits
379 system.cpu.l2cache.ReadSharedReq_hits::total 1284750 # number of ReadSharedReq hits
380 system.cpu.l2cache.demand_hits::cpu.dtb.walker 6656 # number of demand (read+write) hits
381 system.cpu.l2cache.demand_hits::cpu.itb.walker 2896 # number of demand (read+write) hits
382 system.cpu.l2cache.demand_hits::cpu.inst 779488 # number of demand (read+write) hits
383 system.cpu.l2cache.demand_hits::cpu.data 1454972 # number of demand (read+write) hits
384 system.cpu.l2cache.demand_hits::total 2244012 # number of demand (read+write) hits
385 system.cpu.l2cache.overall_hits::cpu.dtb.walker 6656 # number of overall hits
386 system.cpu.l2cache.overall_hits::cpu.itb.walker 2896 # number of overall hits
387 system.cpu.l2cache.overall_hits::cpu.inst 779488 # number of overall hits
388 system.cpu.l2cache.overall_hits::cpu.data 1454972 # number of overall hits
389 system.cpu.l2cache.overall_hits::total 2244012 # number of overall hits
390 system.cpu.l2cache.UpgradeReq_misses::cpu.data 1808 # number of UpgradeReq misses
391 system.cpu.l2cache.UpgradeReq_misses::total 1808 # number of UpgradeReq misses
392 system.cpu.l2cache.ReadExReq_misses::cpu.data 134647 # number of ReadExReq misses
393 system.cpu.l2cache.ReadExReq_misses::total 134647 # number of ReadExReq misses
394 system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 13234 # number of ReadCleanReq misses
395 system.cpu.l2cache.ReadCleanReq_misses::total 13234 # number of ReadCleanReq misses
396 system.cpu.l2cache.ReadSharedReq_misses::cpu.dtb.walker 1 # number of ReadSharedReq misses
397 system.cpu.l2cache.ReadSharedReq_misses::cpu.itb.walker 5 # number of ReadSharedReq misses
398 system.cpu.l2cache.ReadSharedReq_misses::cpu.data 32164 # number of ReadSharedReq misses
399 system.cpu.l2cache.ReadSharedReq_misses::total 32170 # number of ReadSharedReq misses
400 system.cpu.l2cache.demand_misses::cpu.dtb.walker 1 # number of demand (read+write) misses
401 system.cpu.l2cache.demand_misses::cpu.itb.walker 5 # number of demand (read+write) misses
402 system.cpu.l2cache.demand_misses::cpu.inst 13234 # number of demand (read+write) misses
403 system.cpu.l2cache.demand_misses::cpu.data 166811 # number of demand (read+write) misses
404 system.cpu.l2cache.demand_misses::total 180051 # number of demand (read+write) misses
405 system.cpu.l2cache.overall_misses::cpu.dtb.walker 1 # number of overall misses
406 system.cpu.l2cache.overall_misses::cpu.itb.walker 5 # number of overall misses
407 system.cpu.l2cache.overall_misses::cpu.inst 13234 # number of overall misses
408 system.cpu.l2cache.overall_misses::cpu.data 166811 # number of overall misses
409 system.cpu.l2cache.overall_misses::total 180051 # number of overall misses
410 system.cpu.l2cache.WritebackDirty_accesses::writebacks 1538777 # number of WritebackDirty accesses(hits+misses)
411 system.cpu.l2cache.WritebackDirty_accesses::total 1538777 # number of WritebackDirty accesses(hits+misses)
412 system.cpu.l2cache.WritebackClean_accesses::writebacks 792205 # number of WritebackClean accesses(hits+misses)
413 system.cpu.l2cache.WritebackClean_accesses::total 792205 # number of WritebackClean accesses(hits+misses)
414 system.cpu.l2cache.UpgradeReq_accesses::cpu.data 1829 # number of UpgradeReq accesses(hits+misses)
415 system.cpu.l2cache.UpgradeReq_accesses::total 1829 # number of UpgradeReq accesses(hits+misses)
416 system.cpu.l2cache.ReadExReq_accesses::cpu.data 314421 # number of ReadExReq accesses(hits+misses)
417 system.cpu.l2cache.ReadExReq_accesses::total 314421 # number of ReadExReq accesses(hits+misses)
418 system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 792722 # number of ReadCleanReq accesses(hits+misses)
419 system.cpu.l2cache.ReadCleanReq_accesses::total 792722 # number of ReadCleanReq accesses(hits+misses)
420 system.cpu.l2cache.ReadSharedReq_accesses::cpu.dtb.walker 6657 # number of ReadSharedReq accesses(hits+misses)
421 system.cpu.l2cache.ReadSharedReq_accesses::cpu.itb.walker 2901 # number of ReadSharedReq accesses(hits+misses)
422 system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 1307362 # number of ReadSharedReq accesses(hits+misses)
423 system.cpu.l2cache.ReadSharedReq_accesses::total 1316920 # number of ReadSharedReq accesses(hits+misses)
424 system.cpu.l2cache.demand_accesses::cpu.dtb.walker 6657 # number of demand (read+write) accesses
425 system.cpu.l2cache.demand_accesses::cpu.itb.walker 2901 # number of demand (read+write) accesses
426 system.cpu.l2cache.demand_accesses::cpu.inst 792722 # number of demand (read+write) accesses
427 system.cpu.l2cache.demand_accesses::cpu.data 1621783 # number of demand (read+write) accesses
428 system.cpu.l2cache.demand_accesses::total 2424063 # number of demand (read+write) accesses
429 system.cpu.l2cache.overall_accesses::cpu.dtb.walker 6657 # number of overall (read+write) accesses
430 system.cpu.l2cache.overall_accesses::cpu.itb.walker 2901 # number of overall (read+write) accesses
431 system.cpu.l2cache.overall_accesses::cpu.inst 792722 # number of overall (read+write) accesses
432 system.cpu.l2cache.overall_accesses::cpu.data 1621783 # number of overall (read+write) accesses
433 system.cpu.l2cache.overall_accesses::total 2424063 # number of overall (read+write) accesses
434 system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.988518 # miss rate for UpgradeReq accesses
435 system.cpu.l2cache.UpgradeReq_miss_rate::total 0.988518 # miss rate for UpgradeReq accesses
436 system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.428238 # miss rate for ReadExReq accesses
437 system.cpu.l2cache.ReadExReq_miss_rate::total 0.428238 # miss rate for ReadExReq accesses
438 system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.016694 # miss rate for ReadCleanReq accesses
439 system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.016694 # miss rate for ReadCleanReq accesses
440 system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.dtb.walker 0.000150 # miss rate for ReadSharedReq accesses
441 system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.itb.walker 0.001724 # miss rate for ReadSharedReq accesses
442 system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 0.024602 # miss rate for ReadSharedReq accesses
443 system.cpu.l2cache.ReadSharedReq_miss_rate::total 0.024428 # miss rate for ReadSharedReq accesses
444 system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000150 # miss rate for demand accesses
445 system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.001724 # miss rate for demand accesses
446 system.cpu.l2cache.demand_miss_rate::cpu.inst 0.016694 # miss rate for demand accesses
447 system.cpu.l2cache.demand_miss_rate::cpu.data 0.102857 # miss rate for demand accesses
448 system.cpu.l2cache.demand_miss_rate::total 0.074277 # miss rate for demand accesses
449 system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000150 # miss rate for overall accesses
450 system.cpu.l2cache.overall_miss_rate::cpu.itb.walker 0.001724 # miss rate for overall accesses
451 system.cpu.l2cache.overall_miss_rate::cpu.inst 0.016694 # miss rate for overall accesses
452 system.cpu.l2cache.overall_miss_rate::cpu.data 0.102857 # miss rate for overall accesses
453 system.cpu.l2cache.overall_miss_rate::total 0.074277 # miss rate for overall accesses
454 system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
455 system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
456 system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked
457 system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked
458 system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
459 system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
460 system.cpu.l2cache.fast_writes 0 # number of fast writes performed
461 system.cpu.l2cache.cache_copies 0 # number of cache copies performed
462 system.cpu.l2cache.writebacks::writebacks 98177 # number of writebacks
463 system.cpu.l2cache.writebacks::total 98177 # number of writebacks
464 system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
465 system.cpu.toL2Bus.snoop_filter.tot_requests 4856313 # Total number of requests made to the snoop filter.
466 system.cpu.toL2Bus.snoop_filter.hit_single_requests 2425286 # Number of requests hitting in the snoop filter with a single holder of the requested data.
467 system.cpu.toL2Bus.snoop_filter.hit_multi_requests 11672 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
468 system.cpu.toL2Bus.snoop_filter.tot_snoops 1230 # Total number of snoops made to the snoop filter.
469 system.cpu.toL2Bus.snoop_filter.hit_single_snoops 1230 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
470 system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
471 system.cpu.toL2Bus.trans_dist::ReadReq 13857337 # Transaction distribution
472 system.cpu.toL2Bus.trans_dist::ReadResp 15971490 # Transaction distribution
473 system.cpu.toL2Bus.trans_dist::WriteReq 13943 # Transaction distribution
474 system.cpu.toL2Bus.trans_dist::WriteResp 13943 # Transaction distribution
475 system.cpu.toL2Bus.trans_dist::WritebackDirty 1538777 # Transaction distribution
476 system.cpu.toL2Bus.trans_dist::WritebackClean 792205 # Transaction distribution
477 system.cpu.toL2Bus.trans_dist::CleanEvict 88200 # Transaction distribution
478 system.cpu.toL2Bus.trans_dist::UpgradeReq 2281 # Transaction distribution
479 system.cpu.toL2Bus.trans_dist::UpgradeResp 2281 # Transaction distribution
480 system.cpu.toL2Bus.trans_dist::ReadExReq 314426 # Transaction distribution
481 system.cpu.toL2Bus.trans_dist::ReadExResp 314426 # Transaction distribution
482 system.cpu.toL2Bus.trans_dist::ReadCleanReq 792735 # Transaction distribution
483 system.cpu.toL2Bus.trans_dist::ReadSharedReq 1321418 # Transaction distribution
484 system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 2377675 # Packet count per connected master and slave (bytes)
485 system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 32613331 # Packet count per connected master and slave (bytes)
486 system.cpu.toL2Bus.pkt_count_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 10293 # Packet count per connected master and slave (bytes)
487 system.cpu.toL2Bus.pkt_count_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 22163 # Packet count per connected master and slave (bytes)
488 system.cpu.toL2Bus.pkt_count::total 35023462 # Packet count per connected master and slave (bytes)
489 system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 101436160 # Cumulative packet size per connected master and slave (bytes)
490 system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 227550265 # Cumulative packet size per connected master and slave (bytes)
491 system.cpu.toL2Bus.pkt_size_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 320000 # Cumulative packet size per connected master and slave (bytes)
492 system.cpu.toL2Bus.pkt_size_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 730240 # Cumulative packet size per connected master and slave (bytes)
493 system.cpu.toL2Bus.pkt_size::total 330036665 # Cumulative packet size per connected master and slave (bytes)
494 system.cpu.toL2Bus.snoops 203470 # Total snoops (count)
495 system.cpu.toL2Bus.snoop_fanout::samples 18930684 # Request fanout histogram
496 system.cpu.toL2Bus.snoop_fanout::mean 0.001304 # Request fanout histogram
497 system.cpu.toL2Bus.snoop_fanout::stdev 0.042949 # Request fanout histogram
498 system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
499 system.cpu.toL2Bus.snoop_fanout::0 18911125 99.90% 99.90% # Request fanout histogram
500 system.cpu.toL2Bus.snoop_fanout::1 14428 0.08% 99.97% # Request fanout histogram
501 system.cpu.toL2Bus.snoop_fanout::2 5131 0.03% 100.00% # Request fanout histogram
502 system.cpu.toL2Bus.snoop_fanout::3 0 0.00% 100.00% # Request fanout histogram
503 system.cpu.toL2Bus.snoop_fanout::4 0 0.00% 100.00% # Request fanout histogram
504 system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
505 system.cpu.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram
506 system.cpu.toL2Bus.snoop_fanout::max_value 2 # Request fanout histogram
507 system.cpu.toL2Bus.snoop_fanout::total 18930684 # Request fanout histogram
508 system.iobus.trans_dist::ReadReq 10012057 # Transaction distribution
509 system.iobus.trans_dist::ReadResp 10012057 # Transaction distribution
510 system.iobus.trans_dist::WriteReq 57724 # Transaction distribution
511 system.iobus.trans_dist::WriteResp 57724 # Transaction distribution
512 system.iobus.trans_dist::MessageReq 1696 # Transaction distribution
513 system.iobus.trans_dist::MessageResp 1696 # Transaction distribution
514 system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.cmos.pio 44 # Packet count per connected master and slave (bytes)
515 system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.dma1.pio 6 # Packet count per connected master and slave (bytes)
516 system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.ide.pio 11180 # Packet count per connected master and slave (bytes)
517 system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.keyboard.pio 1364 # Packet count per connected master and slave (bytes)
518 system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pic1.pio 86 # Packet count per connected master and slave (bytes)
519 system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pic2.pio 54 # Packet count per connected master and slave (bytes)
520 system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pit.pio 30 # Packet count per connected master and slave (bytes)
521 system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.speaker.pio 19999988 # Packet count per connected master and slave (bytes)
522 system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.io_apic.pio 1098 # Packet count per connected master and slave (bytes)
523 system.iobus.pkt_count_system.bridge.master::system.pc.i_dont_exist1.pio 170 # Packet count per connected master and slave (bytes)
524 system.iobus.pkt_count_system.bridge.master::system.pc.behind_pci.pio 2 # Packet count per connected master and slave (bytes)
525 system.iobus.pkt_count_system.bridge.master::system.pc.com_1.pio 27940 # Packet count per connected master and slave (bytes)
526 system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_2.pio 12 # Packet count per connected master and slave (bytes)
527 system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_3.pio 12 # Packet count per connected master and slave (bytes)
528 system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_4.pio 12 # Packet count per connected master and slave (bytes)
529 system.iobus.pkt_count_system.bridge.master::system.pc.fake_floppy.pio 10 # Packet count per connected master and slave (bytes)
530 system.iobus.pkt_count_system.bridge.master::system.pc.pci_host.pio 2308 # Packet count per connected master and slave (bytes)
531 system.iobus.pkt_count_system.bridge.master::total 20044316 # Packet count per connected master and slave (bytes)
532 system.iobus.pkt_count_system.pc.south_bridge.ide.dma::system.iocache.cpu_side 95246 # Packet count per connected master and slave (bytes)
533 system.iobus.pkt_count_system.pc.south_bridge.ide.dma::total 95246 # Packet count per connected master and slave (bytes)
534 system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::system.apicbridge.slave 3392 # Packet count per connected master and slave (bytes)
535 system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::total 3392 # Packet count per connected master and slave (bytes)
536 system.iobus.pkt_count::total 20142954 # Packet count per connected master and slave (bytes)
537 system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.cmos.pio 22 # Cumulative packet size per connected master and slave (bytes)
538 system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.dma1.pio 3 # Cumulative packet size per connected master and slave (bytes)
539 system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.ide.pio 6738 # Cumulative packet size per connected master and slave (bytes)
540 system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.keyboard.pio 682 # Cumulative packet size per connected master and slave (bytes)
541 system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pic1.pio 43 # Cumulative packet size per connected master and slave (bytes)
542 system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pic2.pio 27 # Cumulative packet size per connected master and slave (bytes)
543 system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pit.pio 15 # Cumulative packet size per connected master and slave (bytes)
544 system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.speaker.pio 9999994 # Cumulative packet size per connected master and slave (bytes)
545 system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.io_apic.pio 2196 # Cumulative packet size per connected master and slave (bytes)
546 system.iobus.pkt_size_system.bridge.master::system.pc.i_dont_exist1.pio 85 # Cumulative packet size per connected master and slave (bytes)
547 system.iobus.pkt_size_system.bridge.master::system.pc.behind_pci.pio 1 # Cumulative packet size per connected master and slave (bytes)
548 system.iobus.pkt_size_system.bridge.master::system.pc.com_1.pio 13970 # Cumulative packet size per connected master and slave (bytes)
549 system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_2.pio 6 # Cumulative packet size per connected master and slave (bytes)
550 system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_3.pio 6 # Cumulative packet size per connected master and slave (bytes)
551 system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_4.pio 6 # Cumulative packet size per connected master and slave (bytes)
552 system.iobus.pkt_size_system.bridge.master::system.pc.fake_floppy.pio 5 # Cumulative packet size per connected master and slave (bytes)
553 system.iobus.pkt_size_system.bridge.master::system.pc.pci_host.pio 4477 # Cumulative packet size per connected master and slave (bytes)
554 system.iobus.pkt_size_system.bridge.master::total 10028276 # Cumulative packet size per connected master and slave (bytes)
555 system.iobus.pkt_size_system.pc.south_bridge.ide.dma::system.iocache.cpu_side 3027768 # Cumulative packet size per connected master and slave (bytes)
556 system.iobus.pkt_size_system.pc.south_bridge.ide.dma::total 3027768 # Cumulative packet size per connected master and slave (bytes)
557 system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::system.apicbridge.slave 6784 # Cumulative packet size per connected master and slave (bytes)
558 system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::total 6784 # Cumulative packet size per connected master and slave (bytes)
559 system.iobus.pkt_size::total 13062828 # Cumulative packet size per connected master and slave (bytes)
560 system.iocache.tags.replacements 47568 # number of replacements
561 system.iocache.tags.tagsinuse 0.042441 # Cycle average of tags in use
562 system.iocache.tags.total_refs 0 # Total number of references to valid blocks.
563 system.iocache.tags.sampled_refs 47584 # Sample count of references to valid blocks.
564 system.iocache.tags.avg_refs 0 # Average number of references to valid blocks.
565 system.iocache.tags.warmup_cycle 4994875253009 # Cycle when the warmup percentage was hit.
566 system.iocache.tags.occ_blocks::pc.south_bridge.ide 0.042441 # Average occupied blocks per requestor
567 system.iocache.tags.occ_percent::pc.south_bridge.ide 0.002653 # Average percentage of cache occupancy
568 system.iocache.tags.occ_percent::total 0.002653 # Average percentage of cache occupancy
569 system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id
570 system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id
571 system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id
572 system.iocache.tags.tag_accesses 428607 # Number of tag accesses
573 system.iocache.tags.data_accesses 428607 # Number of data accesses
574 system.iocache.ReadReq_misses::pc.south_bridge.ide 903 # number of ReadReq misses
575 system.iocache.ReadReq_misses::total 903 # number of ReadReq misses
576 system.iocache.WriteLineReq_misses::pc.south_bridge.ide 46720 # number of WriteLineReq misses
577 system.iocache.WriteLineReq_misses::total 46720 # number of WriteLineReq misses
578 system.iocache.demand_misses::pc.south_bridge.ide 903 # number of demand (read+write) misses
579 system.iocache.demand_misses::total 903 # number of demand (read+write) misses
580 system.iocache.overall_misses::pc.south_bridge.ide 903 # number of overall misses
581 system.iocache.overall_misses::total 903 # number of overall misses
582 system.iocache.ReadReq_accesses::pc.south_bridge.ide 903 # number of ReadReq accesses(hits+misses)
583 system.iocache.ReadReq_accesses::total 903 # number of ReadReq accesses(hits+misses)
584 system.iocache.WriteLineReq_accesses::pc.south_bridge.ide 46720 # number of WriteLineReq accesses(hits+misses)
585 system.iocache.WriteLineReq_accesses::total 46720 # number of WriteLineReq accesses(hits+misses)
586 system.iocache.demand_accesses::pc.south_bridge.ide 903 # number of demand (read+write) accesses
587 system.iocache.demand_accesses::total 903 # number of demand (read+write) accesses
588 system.iocache.overall_accesses::pc.south_bridge.ide 903 # number of overall (read+write) accesses
589 system.iocache.overall_accesses::total 903 # number of overall (read+write) accesses
590 system.iocache.ReadReq_miss_rate::pc.south_bridge.ide 1 # miss rate for ReadReq accesses
591 system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses
592 system.iocache.WriteLineReq_miss_rate::pc.south_bridge.ide 1 # miss rate for WriteLineReq accesses
593 system.iocache.WriteLineReq_miss_rate::total 1 # miss rate for WriteLineReq accesses
594 system.iocache.demand_miss_rate::pc.south_bridge.ide 1 # miss rate for demand accesses
595 system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses
596 system.iocache.overall_miss_rate::pc.south_bridge.ide 1 # miss rate for overall accesses
597 system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses
598 system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
599 system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked
600 system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked
601 system.iocache.blocked::no_targets 0 # number of cycles access was blocked
602 system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
603 system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
604 system.iocache.fast_writes 0 # number of fast writes performed
605 system.iocache.cache_copies 0 # number of cache copies performed
606 system.iocache.writebacks::writebacks 46667 # number of writebacks
607 system.iocache.writebacks::total 46667 # number of writebacks
608 system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate
609 system.membus.trans_dist::ReadReq 13857337 # Transaction distribution
610 system.membus.trans_dist::ReadResp 13903644 # Transaction distribution
611 system.membus.trans_dist::WriteReq 13943 # Transaction distribution
612 system.membus.trans_dist::WriteResp 13943 # Transaction distribution
613 system.membus.trans_dist::WritebackDirty 144844 # Transaction distribution
614 system.membus.trans_dist::CleanEvict 8271 # Transaction distribution
615 system.membus.trans_dist::UpgradeReq 2561 # Transaction distribution
616 system.membus.trans_dist::UpgradeResp 2109 # Transaction distribution
617 system.membus.trans_dist::ReadExReq 134351 # Transaction distribution
618 system.membus.trans_dist::ReadExResp 134346 # Transaction distribution
619 system.membus.trans_dist::ReadSharedReq 46307 # Transaction distribution
620 system.membus.trans_dist::MessageReq 1696 # Transaction distribution
621 system.membus.trans_dist::MessageResp 1696 # Transaction distribution
622 system.membus.trans_dist::InvalidateReq 46720 # Transaction distribution
623 system.membus.trans_dist::InvalidateResp 46720 # Transaction distribution
624 system.membus.pkt_count_system.apicbridge.master::system.cpu.interrupts.int_slave 3392 # Packet count per connected master and slave (bytes)
625 system.membus.pkt_count_system.apicbridge.master::total 3392 # Packet count per connected master and slave (bytes)
626 system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 20044316 # Packet count per connected master and slave (bytes)
627 system.membus.pkt_count_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 7698244 # Packet count per connected master and slave (bytes)
628 system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 470253 # Packet count per connected master and slave (bytes)
629 system.membus.pkt_count_system.cpu.l2cache.mem_side::total 28212813 # Packet count per connected master and slave (bytes)
630 system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 142283 # Packet count per connected master and slave (bytes)
631 system.membus.pkt_count_system.iocache.mem_side::total 142283 # Packet count per connected master and slave (bytes)
632 system.membus.pkt_count::total 28358488 # Packet count per connected master and slave (bytes)
633 system.membus.pkt_size_system.apicbridge.master::system.cpu.interrupts.int_slave 6784 # Cumulative packet size per connected master and slave (bytes)
634 system.membus.pkt_size_system.apicbridge.master::total 6784 # Cumulative packet size per connected master and slave (bytes)
635 system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 10028276 # Cumulative packet size per connected master and slave (bytes)
636 system.membus.pkt_size_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 15396485 # Cumulative packet size per connected master and slave (bytes)
637 system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17787328 # Cumulative packet size per connected master and slave (bytes)
638 system.membus.pkt_size_system.cpu.l2cache.mem_side::total 43212089 # Cumulative packet size per connected master and slave (bytes)
639 system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 3044480 # Cumulative packet size per connected master and slave (bytes)
640 system.membus.pkt_size_system.iocache.mem_side::total 3044480 # Cumulative packet size per connected master and slave (bytes)
641 system.membus.pkt_size::total 46263353 # Cumulative packet size per connected master and slave (bytes)
642 system.membus.snoops 0 # Total snoops (count)
643 system.membus.snoop_fanout::samples 14256561 # Request fanout histogram
644 system.membus.snoop_fanout::mean 1.000119 # Request fanout histogram
645 system.membus.snoop_fanout::stdev 0.010906 # Request fanout histogram
646 system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
647 system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
648 system.membus.snoop_fanout::1 14254865 99.99% 99.99% # Request fanout histogram
649 system.membus.snoop_fanout::2 1696 0.01% 100.00% # Request fanout histogram
650 system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
651 system.membus.snoop_fanout::min_value 1 # Request fanout histogram
652 system.membus.snoop_fanout::max_value 2 # Request fanout histogram
653 system.membus.snoop_fanout::total 14256561 # Request fanout histogram
654 system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
655 system.pc.south_bridge.ide.disks0.dma_read_bytes 34816 # Number of bytes transfered via DMA reads (not PRD).
656 system.pc.south_bridge.ide.disks0.dma_read_txs 32 # Number of DMA read transactions (not PRD).
657 system.pc.south_bridge.ide.disks0.dma_write_full_pages 693 # Number of full page size DMA writes.
658 system.pc.south_bridge.ide.disks0.dma_write_bytes 2985984 # Number of bytes transfered via DMA writes.
659 system.pc.south_bridge.ide.disks0.dma_write_txs 812 # Number of DMA write transactions.
660 system.pc.south_bridge.ide.disks1.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
661 system.pc.south_bridge.ide.disks1.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
662 system.pc.south_bridge.ide.disks1.dma_read_txs 0 # Number of DMA read transactions (not PRD).
663 system.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes.
664 system.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes.
665 system.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions.
667 ---------- End Simulation Statistics ----------
projects / gem5.git / blob