59e823df9d3c863480d1ee2b78b1e6ad0a1dcea7
8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
13 children=acpi_description_table_pointer apicbridge bridge clk_domain cpu cpu_clk_domain dvfs_handler e820_table intel_mp_pointer intel_mp_table intrctrl iobus iocache membus pc physmem smbios_table voltage_domain
14 acpi_description_table_pointer=system.acpi_description_table_pointer
15 boot_osflags=earlyprintk=ttyS0 console=ttyS0 lpj=7999923 root=/dev/hda1
17 clk_domain=system.clk_domain
18 e820_table=system.e820_table
21 intel_mp_pointer=system.intel_mp_pointer
22 intel_mp_table=system.intel_mp_table
23 kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
24 kernel_addr_check=true
25 load_addr_mask=18446744073709551615
28 mem_ranges=0:134217727
29 memories=system.physmem
31 readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
32 smbios_table=system.smbios_table
34 work_begin_ckpt_count=0
35 work_begin_cpu_id_exit=-1
36 work_begin_exit_count=0
37 work_cpus_ckpt_count=0
41 system_port=system.membus.slave[1]
43 [system.acpi_description_table_pointer]
50 xsdt=system.acpi_description_table_pointer.xsdt
52 [system.acpi_description_table_pointer.xsdt]
64 clk_domain=system.clk_domain
67 ranges=11529215046068469760:11529215046068473855
70 master=system.membus.slave[0]
71 slave=system.iobus.master[0]
75 clk_domain=system.clk_domain
78 ranges=4273995776:4273999871 9223372036854775808:11529215046068469759 13835058055282163712:18446744073709551615
81 master=system.iobus.slave[0]
82 slave=system.membus.master[0]
90 voltage_domain=system.voltage_domain
94 children=apic_clk_domain dcache dtb dtb_walker_cache icache interrupts isa itb itb_walker_cache l2cache toL2Bus tracer
97 clk_domain=system.cpu_clk_domain
99 do_checkpoint_insts=true
101 do_statistics_insts=true
105 function_trace_start=0
106 interrupts=system.cpu.interrupts
109 max_insts_all_threads=0
110 max_insts_any_thread=0
111 max_loads_all_threads=0
112 max_loads_any_thread=0
116 simpoint_start_insts=
120 tracer=system.cpu.tracer
122 dcache_port=system.cpu.dcache.cpu_side
123 icache_port=system.cpu.icache.cpu_side
125 [system.cpu.apic_clk_domain]
126 type=DerivedClockDomain
128 clk_domain=system.cpu_clk_domain
134 addr_ranges=0:18446744073709551615
136 clk_domain=system.cpu_clk_domain
143 prefetch_on_access=false
146 sequential_access=false
149 tags=system.cpu.dcache.tags
153 cpu_side=system.cpu.dcache_port
154 mem_side=system.cpu.toL2Bus.slave[1]
156 [system.cpu.dcache.tags]
160 clk_domain=system.cpu_clk_domain
163 sequential_access=false
171 walker=system.cpu.dtb.walker
173 [system.cpu.dtb.walker]
174 type=X86PagetableWalker
175 clk_domain=system.cpu_clk_domain
177 num_squash_per_cycle=4
179 port=system.cpu.dtb_walker_cache.cpu_side
181 [system.cpu.dtb_walker_cache]
184 addr_ranges=0:18446744073709551615
186 clk_domain=system.cpu_clk_domain
193 prefetch_on_access=false
196 sequential_access=false
199 tags=system.cpu.dtb_walker_cache.tags
203 cpu_side=system.cpu.dtb.walker.port
204 mem_side=system.cpu.toL2Bus.slave[3]
206 [system.cpu.dtb_walker_cache.tags]
210 clk_domain=system.cpu_clk_domain
213 sequential_access=false
219 addr_ranges=0:18446744073709551615
221 clk_domain=system.cpu_clk_domain
228 prefetch_on_access=false
231 sequential_access=false
234 tags=system.cpu.icache.tags
238 cpu_side=system.cpu.icache_port
239 mem_side=system.cpu.toL2Bus.slave[0]
241 [system.cpu.icache.tags]
245 clk_domain=system.cpu_clk_domain
248 sequential_access=false
251 [system.cpu.interrupts]
253 clk_domain=system.cpu.apic_clk_domain
256 pio_addr=2305843009213693952
259 int_master=system.membus.slave[3]
260 int_slave=system.membus.master[2]
261 pio=system.membus.master[1]
272 walker=system.cpu.itb.walker
274 [system.cpu.itb.walker]
275 type=X86PagetableWalker
276 clk_domain=system.cpu_clk_domain
278 num_squash_per_cycle=4
280 port=system.cpu.itb_walker_cache.cpu_side
282 [system.cpu.itb_walker_cache]
285 addr_ranges=0:18446744073709551615
287 clk_domain=system.cpu_clk_domain
294 prefetch_on_access=false
297 sequential_access=false
300 tags=system.cpu.itb_walker_cache.tags
304 cpu_side=system.cpu.itb.walker.port
305 mem_side=system.cpu.toL2Bus.slave[2]
307 [system.cpu.itb_walker_cache.tags]
311 clk_domain=system.cpu_clk_domain
314 sequential_access=false
320 addr_ranges=0:18446744073709551615
322 clk_domain=system.cpu_clk_domain
329 prefetch_on_access=false
332 sequential_access=false
335 tags=system.cpu.l2cache.tags
339 cpu_side=system.cpu.toL2Bus.master[0]
340 mem_side=system.membus.slave[2]
342 [system.cpu.l2cache.tags]
346 clk_domain=system.cpu_clk_domain
349 sequential_access=false
354 clk_domain=system.cpu_clk_domain
358 use_default_range=false
360 master=system.cpu.l2cache.cpu_side
361 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side
367 [system.cpu_clk_domain]
373 voltage_domain=system.voltage_domain
375 [system.dvfs_handler]
380 sys_clk_domain=system.clk_domain
381 transition_latency=100000000
385 children=entries0 entries1 entries2 entries3
386 entries=system.e820_table.entries0 system.e820_table.entries1 system.e820_table.entries2 system.e820_table.entries3
389 [system.e820_table.entries0]
396 [system.e820_table.entries1]
403 [system.e820_table.entries2]
410 [system.e820_table.entries3]
417 [system.intel_mp_pointer]
418 type=X86IntelMPFloatingPointer
424 [system.intel_mp_table]
425 type=X86IntelMPConfigTable
426 children=base_entries00 base_entries01 base_entries02 base_entries03 base_entries04 base_entries05 base_entries06 base_entries07 base_entries08 base_entries09 base_entries10 base_entries11 base_entries12 base_entries13 base_entries14 base_entries15 base_entries16 base_entries17 base_entries18 base_entries19 base_entries20 base_entries21 base_entries22 base_entries23 base_entries24 base_entries25 base_entries26 base_entries27 base_entries28 base_entries29 base_entries30 base_entries31 base_entries32 ext_entries
427 base_entries=system.intel_mp_table.base_entries00 system.intel_mp_table.base_entries01 system.intel_mp_table.base_entries02 system.intel_mp_table.base_entries03 system.intel_mp_table.base_entries04 system.intel_mp_table.base_entries05 system.intel_mp_table.base_entries06 system.intel_mp_table.base_entries07 system.intel_mp_table.base_entries08 system.intel_mp_table.base_entries09 system.intel_mp_table.base_entries10 system.intel_mp_table.base_entries11 system.intel_mp_table.base_entries12 system.intel_mp_table.base_entries13 system.intel_mp_table.base_entries14 system.intel_mp_table.base_entries15 system.intel_mp_table.base_entries16 system.intel_mp_table.base_entries17 system.intel_mp_table.base_entries18 system.intel_mp_table.base_entries19 system.intel_mp_table.base_entries20 system.intel_mp_table.base_entries21 system.intel_mp_table.base_entries22 system.intel_mp_table.base_entries23 system.intel_mp_table.base_entries24 system.intel_mp_table.base_entries25 system.intel_mp_table.base_entries26 system.intel_mp_table.base_entries27 system.intel_mp_table.base_entries28 system.intel_mp_table.base_entries29 system.intel_mp_table.base_entries30 system.intel_mp_table.base_entries31 system.intel_mp_table.base_entries32
429 ext_entries=system.intel_mp_table.ext_entries
430 local_apic=4276092928
437 [system.intel_mp_table.base_entries00]
438 type=X86IntelMPProcessor
445 local_apic_version=20
449 [system.intel_mp_table.base_entries01]
450 type=X86IntelMPIOAPIC
457 [system.intel_mp_table.base_entries02]
463 [system.intel_mp_table.base_entries03]
469 [system.intel_mp_table.base_entries04]
470 type=X86IntelMPIOIntAssignment
472 dest_io_apic_intin=16
475 polarity=ConformPolarity
478 trigger=ConformTrigger
480 [system.intel_mp_table.base_entries05]
481 type=X86IntelMPIOIntAssignment
485 interrupt_type=ExtInt
486 polarity=ConformPolarity
489 trigger=ConformTrigger
491 [system.intel_mp_table.base_entries06]
492 type=X86IntelMPIOIntAssignment
497 polarity=ConformPolarity
500 trigger=ConformTrigger
502 [system.intel_mp_table.base_entries07]
503 type=X86IntelMPIOIntAssignment
507 interrupt_type=ExtInt
508 polarity=ConformPolarity
511 trigger=ConformTrigger
513 [system.intel_mp_table.base_entries08]
514 type=X86IntelMPIOIntAssignment
519 polarity=ConformPolarity
522 trigger=ConformTrigger
524 [system.intel_mp_table.base_entries09]
525 type=X86IntelMPIOIntAssignment
529 interrupt_type=ExtInt
530 polarity=ConformPolarity
533 trigger=ConformTrigger
535 [system.intel_mp_table.base_entries10]
536 type=X86IntelMPIOIntAssignment
541 polarity=ConformPolarity
544 trigger=ConformTrigger
546 [system.intel_mp_table.base_entries11]
547 type=X86IntelMPIOIntAssignment
551 interrupt_type=ExtInt
552 polarity=ConformPolarity
555 trigger=ConformTrigger
557 [system.intel_mp_table.base_entries12]
558 type=X86IntelMPIOIntAssignment
563 polarity=ConformPolarity
566 trigger=ConformTrigger
568 [system.intel_mp_table.base_entries13]
569 type=X86IntelMPIOIntAssignment
573 interrupt_type=ExtInt
574 polarity=ConformPolarity
577 trigger=ConformTrigger
579 [system.intel_mp_table.base_entries14]
580 type=X86IntelMPIOIntAssignment
585 polarity=ConformPolarity
588 trigger=ConformTrigger
590 [system.intel_mp_table.base_entries15]
591 type=X86IntelMPIOIntAssignment
595 interrupt_type=ExtInt
596 polarity=ConformPolarity
599 trigger=ConformTrigger
601 [system.intel_mp_table.base_entries16]
602 type=X86IntelMPIOIntAssignment
607 polarity=ConformPolarity
610 trigger=ConformTrigger
612 [system.intel_mp_table.base_entries17]
613 type=X86IntelMPIOIntAssignment
617 interrupt_type=ExtInt
618 polarity=ConformPolarity
621 trigger=ConformTrigger
623 [system.intel_mp_table.base_entries18]
624 type=X86IntelMPIOIntAssignment
629 polarity=ConformPolarity
632 trigger=ConformTrigger
634 [system.intel_mp_table.base_entries19]
635 type=X86IntelMPIOIntAssignment
639 interrupt_type=ExtInt
640 polarity=ConformPolarity
643 trigger=ConformTrigger
645 [system.intel_mp_table.base_entries20]
646 type=X86IntelMPIOIntAssignment
651 polarity=ConformPolarity
654 trigger=ConformTrigger
656 [system.intel_mp_table.base_entries21]
657 type=X86IntelMPIOIntAssignment
661 interrupt_type=ExtInt
662 polarity=ConformPolarity
665 trigger=ConformTrigger
667 [system.intel_mp_table.base_entries22]
668 type=X86IntelMPIOIntAssignment
673 polarity=ConformPolarity
676 trigger=ConformTrigger
678 [system.intel_mp_table.base_entries23]
679 type=X86IntelMPIOIntAssignment
683 interrupt_type=ExtInt
684 polarity=ConformPolarity
687 trigger=ConformTrigger
689 [system.intel_mp_table.base_entries24]
690 type=X86IntelMPIOIntAssignment
692 dest_io_apic_intin=10
695 polarity=ConformPolarity
698 trigger=ConformTrigger
700 [system.intel_mp_table.base_entries25]
701 type=X86IntelMPIOIntAssignment
705 interrupt_type=ExtInt
706 polarity=ConformPolarity
709 trigger=ConformTrigger
711 [system.intel_mp_table.base_entries26]
712 type=X86IntelMPIOIntAssignment
714 dest_io_apic_intin=11
717 polarity=ConformPolarity
720 trigger=ConformTrigger
722 [system.intel_mp_table.base_entries27]
723 type=X86IntelMPIOIntAssignment
727 interrupt_type=ExtInt
728 polarity=ConformPolarity
731 trigger=ConformTrigger
733 [system.intel_mp_table.base_entries28]
734 type=X86IntelMPIOIntAssignment
736 dest_io_apic_intin=12
739 polarity=ConformPolarity
742 trigger=ConformTrigger
744 [system.intel_mp_table.base_entries29]
745 type=X86IntelMPIOIntAssignment
749 interrupt_type=ExtInt
750 polarity=ConformPolarity
753 trigger=ConformTrigger
755 [system.intel_mp_table.base_entries30]
756 type=X86IntelMPIOIntAssignment
758 dest_io_apic_intin=13
761 polarity=ConformPolarity
764 trigger=ConformTrigger
766 [system.intel_mp_table.base_entries31]
767 type=X86IntelMPIOIntAssignment
771 interrupt_type=ExtInt
772 polarity=ConformPolarity
775 trigger=ConformTrigger
777 [system.intel_mp_table.base_entries32]
778 type=X86IntelMPIOIntAssignment
780 dest_io_apic_intin=14
783 polarity=ConformPolarity
786 trigger=ConformTrigger
788 [system.intel_mp_table.ext_entries]
789 type=X86IntelMPBusHierarchy
793 subtractive_decode=true
802 clk_domain=system.clk_domain
805 use_default_range=false
807 default=system.pc.pciconfig.pio
808 master=system.apicbridge.slave system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.iocache.cpu_side
809 slave=system.bridge.master system.pc.south_bridge.ide.dma system.pc.south_bridge.io_apic.int_master
814 addr_ranges=0:134217727
816 clk_domain=system.clk_domain
823 prefetch_on_access=false
826 sequential_access=false
829 tags=system.iocache.tags
833 cpu_side=system.iobus.master[18]
834 mem_side=system.membus.slave[4]
836 [system.iocache.tags]
840 clk_domain=system.clk_domain
843 sequential_access=false
848 children=badaddr_responder
849 clk_domain=system.clk_domain
853 use_default_range=false
855 default=system.membus.badaddr_responder.pio
856 master=system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave system.physmem.port
857 slave=system.apicbridge.master system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master system.iocache.mem_side
859 [system.membus.badaddr_responder]
861 clk_domain=system.clk_domain
869 ret_data32=4294967295
870 ret_data64=18446744073709551615
875 pio=system.membus.default
879 children=behind_pci com_1 fake_com_2 fake_com_3 fake_com_4 fake_floppy i_dont_exist pciconfig south_bridge
881 intrctrl=system.intrctrl
884 [system.pc.behind_pci]
886 clk_domain=system.clk_domain
889 pio_addr=9223372036854779128
894 ret_data32=4294967295
895 ret_data64=18446744073709551615
900 pio=system.iobus.master[12]
905 clk_domain=system.clk_domain
907 pio_addr=9223372036854776824
911 terminal=system.pc.com_1.terminal
912 pio=system.iobus.master[13]
914 [system.pc.com_1.terminal]
917 intr_control=system.intrctrl
922 [system.pc.fake_com_2]
924 clk_domain=system.clk_domain
927 pio_addr=9223372036854776568
932 ret_data32=4294967295
933 ret_data64=18446744073709551615
938 pio=system.iobus.master[14]
940 [system.pc.fake_com_3]
942 clk_domain=system.clk_domain
945 pio_addr=9223372036854776808
950 ret_data32=4294967295
951 ret_data64=18446744073709551615
956 pio=system.iobus.master[15]
958 [system.pc.fake_com_4]
960 clk_domain=system.clk_domain
963 pio_addr=9223372036854776552
968 ret_data32=4294967295
969 ret_data64=18446744073709551615
974 pio=system.iobus.master[16]
976 [system.pc.fake_floppy]
978 clk_domain=system.clk_domain
981 pio_addr=9223372036854776818
986 ret_data32=4294967295
987 ret_data64=18446744073709551615
992 pio=system.iobus.master[17]
994 [system.pc.i_dont_exist]
996 clk_domain=system.clk_domain
999 pio_addr=9223372036854775936
1004 ret_data32=4294967295
1005 ret_data64=18446744073709551615
1010 pio=system.iobus.master[11]
1012 [system.pc.pciconfig]
1015 clk_domain=system.clk_domain
1022 pio=system.iobus.default
1024 [system.pc.south_bridge]
1026 children=cmos dma1 ide int_lines0 int_lines1 int_lines2 int_lines3 int_lines4 int_lines5 int_lines6 io_apic keyboard pic1 pic2 pit speaker
1027 cmos=system.pc.south_bridge.cmos
1028 dma1=system.pc.south_bridge.dma1
1030 io_apic=system.pc.south_bridge.io_apic
1031 keyboard=system.pc.south_bridge.keyboard
1032 pic1=system.pc.south_bridge.pic1
1033 pic2=system.pc.south_bridge.pic2
1034 pit=system.pc.south_bridge.pit
1036 speaker=system.pc.south_bridge.speaker
1038 [system.pc.south_bridge.cmos]
1041 clk_domain=system.clk_domain
1043 int_pin=system.pc.south_bridge.cmos.int_pin
1044 pio_addr=9223372036854775920
1047 time=Sun Jan 1 00:00:00 2012
1048 pio=system.iobus.master[1]
1050 [system.pc.south_bridge.cmos.int_pin]
1051 type=X86IntSourcePin
1054 [system.pc.south_bridge.dma1]
1056 clk_domain=system.clk_domain
1058 pio_addr=9223372036854775808
1061 pio=system.iobus.master[2]
1063 [system.pc.south_bridge.ide]
1065 children=disks0 disks1
1102 MSICAPMsgUpperAddr=0
1103 MSICAPNextCapability=0
1107 MSIXCAPNextCapability=0
1117 PMCAPNextCapability=0
1122 PXCAPDevCapabilities=0
1129 PXCAPNextCapability=0
1137 clk_domain=system.clk_domain
1138 config_latency=20000
1140 disks=system.pc.south_bridge.ide.disks0 system.pc.south_bridge.ide.disks1
1149 config=system.iobus.master[4]
1150 dma=system.iobus.slave[1]
1151 pio=system.iobus.master[3]
1153 [system.pc.south_bridge.ide.disks0]
1159 image=system.pc.south_bridge.ide.disks0.image
1161 [system.pc.south_bridge.ide.disks0.image]
1164 child=system.pc.south_bridge.ide.disks0.image.child
1170 [system.pc.south_bridge.ide.disks0.image.child]
1173 image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img
1176 [system.pc.south_bridge.ide.disks1]
1182 image=system.pc.south_bridge.ide.disks1.image
1184 [system.pc.south_bridge.ide.disks1.image]
1187 child=system.pc.south_bridge.ide.disks1.image.child
1193 [system.pc.south_bridge.ide.disks1.image.child]
1196 image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
1199 [system.pc.south_bridge.int_lines0]
1203 sink=system.pc.south_bridge.int_lines0.sink
1204 source=system.pc.south_bridge.pic1.output
1206 [system.pc.south_bridge.int_lines0.sink]
1208 device=system.pc.south_bridge.io_apic
1212 [system.pc.south_bridge.int_lines1]
1216 sink=system.pc.south_bridge.int_lines1.sink
1217 source=system.pc.south_bridge.pic2.output
1219 [system.pc.south_bridge.int_lines1.sink]
1221 device=system.pc.south_bridge.pic1
1225 [system.pc.south_bridge.int_lines2]
1229 sink=system.pc.south_bridge.int_lines2.sink
1230 source=system.pc.south_bridge.cmos.int_pin
1232 [system.pc.south_bridge.int_lines2.sink]
1234 device=system.pc.south_bridge.pic2
1238 [system.pc.south_bridge.int_lines3]
1242 sink=system.pc.south_bridge.int_lines3.sink
1243 source=system.pc.south_bridge.pit.int_pin
1245 [system.pc.south_bridge.int_lines3.sink]
1247 device=system.pc.south_bridge.pic1
1251 [system.pc.south_bridge.int_lines4]
1255 sink=system.pc.south_bridge.int_lines4.sink
1256 source=system.pc.south_bridge.pit.int_pin
1258 [system.pc.south_bridge.int_lines4.sink]
1260 device=system.pc.south_bridge.io_apic
1264 [system.pc.south_bridge.int_lines5]
1268 sink=system.pc.south_bridge.int_lines5.sink
1269 source=system.pc.south_bridge.keyboard.keyboard_int_pin
1271 [system.pc.south_bridge.int_lines5.sink]
1273 device=system.pc.south_bridge.io_apic
1277 [system.pc.south_bridge.int_lines6]
1281 sink=system.pc.south_bridge.int_lines6.sink
1282 source=system.pc.south_bridge.keyboard.mouse_int_pin
1284 [system.pc.south_bridge.int_lines6.sink]
1286 device=system.pc.south_bridge.io_apic
1290 [system.pc.south_bridge.io_apic]
1293 clk_domain=system.clk_domain
1295 external_int_pic=system.pc.south_bridge.pic1
1300 int_master=system.iobus.slave[2]
1301 pio=system.iobus.master[10]
1303 [system.pc.south_bridge.keyboard]
1305 children=keyboard_int_pin mouse_int_pin
1306 clk_domain=system.clk_domain
1307 command_port=9223372036854775908
1308 data_port=9223372036854775904
1310 keyboard_int_pin=system.pc.south_bridge.keyboard.keyboard_int_pin
1311 mouse_int_pin=system.pc.south_bridge.keyboard.mouse_int_pin
1315 pio=system.iobus.master[5]
1317 [system.pc.south_bridge.keyboard.keyboard_int_pin]
1318 type=X86IntSourcePin
1321 [system.pc.south_bridge.keyboard.mouse_int_pin]
1322 type=X86IntSourcePin
1325 [system.pc.south_bridge.pic1]
1328 clk_domain=system.clk_domain
1331 output=system.pc.south_bridge.pic1.output
1332 pio_addr=9223372036854775840
1334 slave=system.pc.south_bridge.pic2
1336 pio=system.iobus.master[6]
1338 [system.pc.south_bridge.pic1.output]
1339 type=X86IntSourcePin
1342 [system.pc.south_bridge.pic2]
1345 clk_domain=system.clk_domain
1348 output=system.pc.south_bridge.pic2.output
1349 pio_addr=9223372036854775968
1353 pio=system.iobus.master[7]
1355 [system.pc.south_bridge.pic2.output]
1356 type=X86IntSourcePin
1359 [system.pc.south_bridge.pit]
1362 clk_domain=system.clk_domain
1364 int_pin=system.pc.south_bridge.pit.int_pin
1365 pio_addr=9223372036854775872
1368 pio=system.iobus.master[8]
1370 [system.pc.south_bridge.pit.int_pin]
1371 type=X86IntSourcePin
1374 [system.pc.south_bridge.speaker]
1376 clk_domain=system.clk_domain
1378 i8254=system.pc.south_bridge.pit
1379 pio_addr=9223372036854775905
1382 pio=system.iobus.master[9]
1387 addr_mapping=RoRaBaChCo
1391 clk_domain=system.clk_domain
1392 conf_table_reported=true
1394 device_rowbuffer_size=1024
1398 max_accesses_per_row=16
1399 mem_sched_policy=frfcfs
1400 min_writes_per_switch=16
1402 page_policy=open_adaptive
1406 static_backend_latency=10000
1407 static_frontend_latency=10000
1422 write_buffer_size=64
1423 write_high_thresh_perc=85
1424 write_low_thresh_perc=50
1425 port=system.membus.master[3]
1427 [system.smbios_table]
1428 type=X86SMBiosSMBiosTable
1433 structures=system.smbios_table.structures
1435 [system.smbios_table.structures]
1436 type=X86SMBiosBiosInformation
1437 characteristic_ext_bytes=
1439 emb_cont_firmware_major=0
1440 emb_cont_firmware_minor=0
1444 release_date=06/08/2008
1446 starting_addr_segment=0
1450 [system.voltage_domain]