2 ---------- Begin Simulation Statistics ----------
3 sim_seconds 0.000107 # Number of seconds simulated
4 sim_ticks 107210 # Number of ticks simulated
5 final_tick 107210 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6 sim_freq 1000000000 # Frequency of simulated ticks
7 host_inst_rate 30588 # Simulator instruction rate (inst/s)
8 host_op_rate 30584 # Simulator op (including micro ops) rate (op/s)
9 host_tick_rate 513061 # Simulator tick rate (ticks/s)
10 host_mem_usage 388380 # Number of bytes of host memory used
11 host_seconds 0.21 # Real time elapsed on the host
12 sim_insts 6390 # Number of instructions simulated
13 sim_ops 6390 # Number of ops (including micro ops) simulated
14 system.voltage_domain.voltage 1 # Voltage in Volts
15 system.clk_domain.clock 1 # Clock period in ticks
16 system.mem_ctrls.bytes_read::ruby.dir_cntrl0 110720 # Number of bytes read from this memory
17 system.mem_ctrls.bytes_read::total 110720 # Number of bytes read from this memory
18 system.mem_ctrls.bytes_written::ruby.dir_cntrl0 110464 # Number of bytes written to this memory
19 system.mem_ctrls.bytes_written::total 110464 # Number of bytes written to this memory
20 system.mem_ctrls.num_reads::ruby.dir_cntrl0 1730 # Number of read requests responded to by this memory
21 system.mem_ctrls.num_reads::total 1730 # Number of read requests responded to by this memory
22 system.mem_ctrls.num_writes::ruby.dir_cntrl0 1726 # Number of write requests responded to by this memory
23 system.mem_ctrls.num_writes::total 1726 # Number of write requests responded to by this memory
24 system.mem_ctrls.bw_read::ruby.dir_cntrl0 1032739483 # Total read bandwidth from this memory (bytes/s)
25 system.mem_ctrls.bw_read::total 1032739483 # Total read bandwidth from this memory (bytes/s)
26 system.mem_ctrls.bw_write::ruby.dir_cntrl0 1030351646 # Write bandwidth from this memory (bytes/s)
27 system.mem_ctrls.bw_write::total 1030351646 # Write bandwidth from this memory (bytes/s)
28 system.mem_ctrls.bw_total::ruby.dir_cntrl0 2063091130 # Total bandwidth to/from this memory (bytes/s)
29 system.mem_ctrls.bw_total::total 2063091130 # Total bandwidth to/from this memory (bytes/s)
30 system.mem_ctrls.readReqs 1730 # Number of read requests accepted
31 system.mem_ctrls.writeReqs 1726 # Number of write requests accepted
32 system.mem_ctrls.readBursts 1730 # Number of DRAM read bursts, including those serviced by the write queue
33 system.mem_ctrls.writeBursts 1726 # Number of DRAM write bursts, including those merged in the write queue
34 system.mem_ctrls.bytesReadDRAM 56896 # Total number of bytes read from DRAM
35 system.mem_ctrls.bytesReadWrQ 53824 # Total number of bytes read from write queue
36 system.mem_ctrls.bytesWritten 56448 # Total number of bytes written to DRAM
37 system.mem_ctrls.bytesReadSys 110720 # Total read bytes from the system interface side
38 system.mem_ctrls.bytesWrittenSys 110464 # Total written bytes from the system interface side
39 system.mem_ctrls.servicedByWrQ 841 # Number of DRAM read bursts serviced by the write queue
40 system.mem_ctrls.mergedWrBursts 814 # Number of DRAM write bursts merged with an existing one
41 system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write
42 system.mem_ctrls.perBankRdBursts::0 82 # Per bank write bursts
43 system.mem_ctrls.perBankRdBursts::1 48 # Per bank write bursts
44 system.mem_ctrls.perBankRdBursts::2 85 # Per bank write bursts
45 system.mem_ctrls.perBankRdBursts::3 66 # Per bank write bursts
46 system.mem_ctrls.perBankRdBursts::4 116 # Per bank write bursts
47 system.mem_ctrls.perBankRdBursts::5 24 # Per bank write bursts
48 system.mem_ctrls.perBankRdBursts::6 1 # Per bank write bursts
49 system.mem_ctrls.perBankRdBursts::7 3 # Per bank write bursts
50 system.mem_ctrls.perBankRdBursts::8 0 # Per bank write bursts
51 system.mem_ctrls.perBankRdBursts::9 1 # Per bank write bursts
52 system.mem_ctrls.perBankRdBursts::10 49 # Per bank write bursts
53 system.mem_ctrls.perBankRdBursts::11 31 # Per bank write bursts
54 system.mem_ctrls.perBankRdBursts::12 19 # Per bank write bursts
55 system.mem_ctrls.perBankRdBursts::13 266 # Per bank write bursts
56 system.mem_ctrls.perBankRdBursts::14 79 # Per bank write bursts
57 system.mem_ctrls.perBankRdBursts::15 19 # Per bank write bursts
58 system.mem_ctrls.perBankWrBursts::0 81 # Per bank write bursts
59 system.mem_ctrls.perBankWrBursts::1 49 # Per bank write bursts
60 system.mem_ctrls.perBankWrBursts::2 85 # Per bank write bursts
61 system.mem_ctrls.perBankWrBursts::3 62 # Per bank write bursts
62 system.mem_ctrls.perBankWrBursts::4 126 # Per bank write bursts
63 system.mem_ctrls.perBankWrBursts::5 27 # Per bank write bursts
64 system.mem_ctrls.perBankWrBursts::6 1 # Per bank write bursts
65 system.mem_ctrls.perBankWrBursts::7 3 # Per bank write bursts
66 system.mem_ctrls.perBankWrBursts::8 0 # Per bank write bursts
67 system.mem_ctrls.perBankWrBursts::9 1 # Per bank write bursts
68 system.mem_ctrls.perBankWrBursts::10 44 # Per bank write bursts
69 system.mem_ctrls.perBankWrBursts::11 29 # Per bank write bursts
70 system.mem_ctrls.perBankWrBursts::12 13 # Per bank write bursts
71 system.mem_ctrls.perBankWrBursts::13 262 # Per bank write bursts
72 system.mem_ctrls.perBankWrBursts::14 79 # Per bank write bursts
73 system.mem_ctrls.perBankWrBursts::15 20 # Per bank write bursts
74 system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry
75 system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry
76 system.mem_ctrls.totGap 107138 # Total gap between requests
77 system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2)
78 system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2)
79 system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2)
80 system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2)
81 system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2)
82 system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2)
83 system.mem_ctrls.readPktSize::6 1730 # Read request sizes (log2)
84 system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2)
85 system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2)
86 system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2)
87 system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2)
88 system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2)
89 system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2)
90 system.mem_ctrls.writePktSize::6 1726 # Write request sizes (log2)
91 system.mem_ctrls.rdQLenPdf::0 889 # What read queue length does an incoming req see
92 system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see
93 system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see
94 system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see
95 system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see
96 system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see
97 system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see
98 system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see
99 system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see
100 system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see
101 system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see
102 system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see
103 system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see
104 system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see
105 system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see
106 system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see
107 system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see
108 system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see
109 system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see
110 system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see
111 system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see
112 system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see
113 system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see
114 system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see
115 system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see
116 system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see
117 system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see
118 system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see
119 system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see
120 system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see
121 system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see
122 system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see
123 system.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see
124 system.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see
125 system.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see
126 system.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see
127 system.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see
128 system.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see
129 system.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see
130 system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see
131 system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see
132 system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see
133 system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see
134 system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see
135 system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see
136 system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see
137 system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see
138 system.mem_ctrls.wrQLenPdf::15 8 # What write queue length does an incoming req see
139 system.mem_ctrls.wrQLenPdf::16 8 # What write queue length does an incoming req see
140 system.mem_ctrls.wrQLenPdf::17 52 # What write queue length does an incoming req see
141 system.mem_ctrls.wrQLenPdf::18 56 # What write queue length does an incoming req see
142 system.mem_ctrls.wrQLenPdf::19 57 # What write queue length does an incoming req see
143 system.mem_ctrls.wrQLenPdf::20 57 # What write queue length does an incoming req see
144 system.mem_ctrls.wrQLenPdf::21 57 # What write queue length does an incoming req see
145 system.mem_ctrls.wrQLenPdf::22 55 # What write queue length does an incoming req see
146 system.mem_ctrls.wrQLenPdf::23 55 # What write queue length does an incoming req see
147 system.mem_ctrls.wrQLenPdf::24 55 # What write queue length does an incoming req see
148 system.mem_ctrls.wrQLenPdf::25 55 # What write queue length does an incoming req see
149 system.mem_ctrls.wrQLenPdf::26 55 # What write queue length does an incoming req see
150 system.mem_ctrls.wrQLenPdf::27 55 # What write queue length does an incoming req see
151 system.mem_ctrls.wrQLenPdf::28 55 # What write queue length does an incoming req see
152 system.mem_ctrls.wrQLenPdf::29 55 # What write queue length does an incoming req see
153 system.mem_ctrls.wrQLenPdf::30 54 # What write queue length does an incoming req see
154 system.mem_ctrls.wrQLenPdf::31 54 # What write queue length does an incoming req see
155 system.mem_ctrls.wrQLenPdf::32 54 # What write queue length does an incoming req see
156 system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see
157 system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see
158 system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see
159 system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see
160 system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see
161 system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see
162 system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see
163 system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see
164 system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see
165 system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see
166 system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see
167 system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see
168 system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see
169 system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see
170 system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see
171 system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see
172 system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see
173 system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see
174 system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see
175 system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see
176 system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see
177 system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see
178 system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see
179 system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see
180 system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see
181 system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see
182 system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see
183 system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see
184 system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see
185 system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see
186 system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see
187 system.mem_ctrls.bytesPerActivate::samples 253 # Bytes accessed per row activation
188 system.mem_ctrls.bytesPerActivate::mean 437.122530 # Bytes accessed per row activation
189 system.mem_ctrls.bytesPerActivate::gmean 269.105572 # Bytes accessed per row activation
190 system.mem_ctrls.bytesPerActivate::stdev 371.515393 # Bytes accessed per row activation
191 system.mem_ctrls.bytesPerActivate::0-127 63 24.90% 24.90% # Bytes accessed per row activation
192 system.mem_ctrls.bytesPerActivate::128-255 51 20.16% 45.06% # Bytes accessed per row activation
193 system.mem_ctrls.bytesPerActivate::256-383 24 9.49% 54.55% # Bytes accessed per row activation
194 system.mem_ctrls.bytesPerActivate::384-511 18 7.11% 61.66% # Bytes accessed per row activation
195 system.mem_ctrls.bytesPerActivate::512-639 14 5.53% 67.19% # Bytes accessed per row activation
196 system.mem_ctrls.bytesPerActivate::640-767 10 3.95% 71.15% # Bytes accessed per row activation
197 system.mem_ctrls.bytesPerActivate::768-895 18 7.11% 78.26% # Bytes accessed per row activation
198 system.mem_ctrls.bytesPerActivate::896-1023 10 3.95% 82.21% # Bytes accessed per row activation
199 system.mem_ctrls.bytesPerActivate::1024-1151 45 17.79% 100.00% # Bytes accessed per row activation
200 system.mem_ctrls.bytesPerActivate::total 253 # Bytes accessed per row activation
201 system.mem_ctrls.rdPerTurnAround::samples 54 # Reads before turning the bus around for writes
202 system.mem_ctrls.rdPerTurnAround::mean 16.203704 # Reads before turning the bus around for writes
203 system.mem_ctrls.rdPerTurnAround::gmean 16.028046 # Reads before turning the bus around for writes
204 system.mem_ctrls.rdPerTurnAround::stdev 2.999243 # Reads before turning the bus around for writes
205 system.mem_ctrls.rdPerTurnAround::12-13 1 1.85% 1.85% # Reads before turning the bus around for writes
206 system.mem_ctrls.rdPerTurnAround::14-15 20 37.04% 38.89% # Reads before turning the bus around for writes
207 system.mem_ctrls.rdPerTurnAround::16-17 27 50.00% 88.89% # Reads before turning the bus around for writes
208 system.mem_ctrls.rdPerTurnAround::18-19 4 7.41% 96.30% # Reads before turning the bus around for writes
209 system.mem_ctrls.rdPerTurnAround::20-21 1 1.85% 98.15% # Reads before turning the bus around for writes
210 system.mem_ctrls.rdPerTurnAround::36-37 1 1.85% 100.00% # Reads before turning the bus around for writes
211 system.mem_ctrls.rdPerTurnAround::total 54 # Reads before turning the bus around for writes
212 system.mem_ctrls.wrPerTurnAround::samples 54 # Writes before turning the bus around for reads
213 system.mem_ctrls.wrPerTurnAround::mean 16.333333 # Writes before turning the bus around for reads
214 system.mem_ctrls.wrPerTurnAround::gmean 16.311361 # Writes before turning the bus around for reads
215 system.mem_ctrls.wrPerTurnAround::stdev 0.890198 # Writes before turning the bus around for reads
216 system.mem_ctrls.wrPerTurnAround::16 47 87.04% 87.04% # Writes before turning the bus around for reads
217 system.mem_ctrls.wrPerTurnAround::18 3 5.56% 92.59% # Writes before turning the bus around for reads
218 system.mem_ctrls.wrPerTurnAround::19 4 7.41% 100.00% # Writes before turning the bus around for reads
219 system.mem_ctrls.wrPerTurnAround::total 54 # Writes before turning the bus around for reads
220 system.mem_ctrls.totQLat 10919 # Total ticks spent queuing
221 system.mem_ctrls.totMemAccLat 27810 # Total ticks spent from burst creation until serviced by the DRAM
222 system.mem_ctrls.totBusLat 4445 # Total ticks spent in databus transfers
223 system.mem_ctrls.avgQLat 12.28 # Average queueing delay per DRAM burst
224 system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst
225 system.mem_ctrls.avgMemAccLat 31.28 # Average memory access latency per DRAM burst
226 system.mem_ctrls.avgRdBW 530.70 # Average DRAM read bandwidth in MiByte/s
227 system.mem_ctrls.avgWrBW 526.52 # Average achieved write bandwidth in MiByte/s
228 system.mem_ctrls.avgRdBWSys 1032.74 # Average system read bandwidth in MiByte/s
229 system.mem_ctrls.avgWrBWSys 1030.35 # Average system write bandwidth in MiByte/s
230 system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
231 system.mem_ctrls.busUtil 8.26 # Data bus utilization in percentage
232 system.mem_ctrls.busUtilRead 4.15 # Data bus utilization in percentage for reads
233 system.mem_ctrls.busUtilWrite 4.11 # Data bus utilization in percentage for writes
234 system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing
235 system.mem_ctrls.avgWrQLen 25.52 # Average write queue length when enqueuing
236 system.mem_ctrls.readRowHits 682 # Number of row buffer hits during reads
237 system.mem_ctrls.writeRowHits 829 # Number of row buffer hits during writes
238 system.mem_ctrls.readRowHitRate 76.72 # Row buffer hit rate for reads
239 system.mem_ctrls.writeRowHitRate 90.90 # Row buffer hit rate for writes
240 system.mem_ctrls.avgGap 31.00 # Average gap between requests
241 system.mem_ctrls.pageHitRate 83.90 # Row buffer hit rate, read and write combined
242 system.mem_ctrls_0.actEnergy 748440 # Energy for activate commands per rank (pJ)
243 system.mem_ctrls_0.preEnergy 415800 # Energy for precharge commands per rank (pJ)
244 system.mem_ctrls_0.readEnergy 5166720 # Energy for read commands per rank (pJ)
245 system.mem_ctrls_0.writeEnergy 4447872 # Energy for write commands per rank (pJ)
246 system.mem_ctrls_0.refreshEnergy 6611280 # Energy for refresh commands per rank (pJ)
247 system.mem_ctrls_0.actBackEnergy 64735128 # Energy for active background per rank (pJ)
248 system.mem_ctrls_0.preBackEnergy 4101600 # Energy for precharge background per rank (pJ)
249 system.mem_ctrls_0.totalEnergy 86226840 # Total energy per rank (pJ)
250 system.mem_ctrls_0.averagePower 849.709691 # Core power per rank (mW)
251 system.mem_ctrls_0.memoryStateTime::IDLE 7218 # Time in different power states
252 system.mem_ctrls_0.memoryStateTime::REF 3380 # Time in different power states
253 system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states
254 system.mem_ctrls_0.memoryStateTime::ACT 91640 # Time in different power states
255 system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states
256 system.mem_ctrls_1.actEnergy 1088640 # Energy for activate commands per rank (pJ)
257 system.mem_ctrls_1.preEnergy 604800 # Energy for precharge commands per rank (pJ)
258 system.mem_ctrls_1.readEnergy 5241600 # Energy for read commands per rank (pJ)
259 system.mem_ctrls_1.writeEnergy 4167936 # Energy for write commands per rank (pJ)
260 system.mem_ctrls_1.refreshEnergy 6611280 # Energy for refresh commands per rank (pJ)
261 system.mem_ctrls_1.actBackEnergy 64577808 # Energy for active background per rank (pJ)
262 system.mem_ctrls_1.preBackEnergy 4239600 # Energy for precharge background per rank (pJ)
263 system.mem_ctrls_1.totalEnergy 86531664 # Total energy per rank (pJ)
264 system.mem_ctrls_1.averagePower 852.713534 # Core power per rank (mW)
265 system.mem_ctrls_1.memoryStateTime::IDLE 6460 # Time in different power states
266 system.mem_ctrls_1.memoryStateTime::REF 3380 # Time in different power states
267 system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states
268 system.mem_ctrls_1.memoryStateTime::ACT 91652 # Time in different power states
269 system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states
270 system.cpu.clk_domain.clock 1 # Clock period in ticks
271 system.cpu.dtb.fetch_hits 0 # ITB hits
272 system.cpu.dtb.fetch_misses 0 # ITB misses
273 system.cpu.dtb.fetch_acv 0 # ITB acv
274 system.cpu.dtb.fetch_accesses 0 # ITB accesses
275 system.cpu.dtb.read_hits 1183 # DTB read hits
276 system.cpu.dtb.read_misses 7 # DTB read misses
277 system.cpu.dtb.read_acv 0 # DTB read access violations
278 system.cpu.dtb.read_accesses 1190 # DTB read accesses
279 system.cpu.dtb.write_hits 865 # DTB write hits
280 system.cpu.dtb.write_misses 3 # DTB write misses
281 system.cpu.dtb.write_acv 0 # DTB write access violations
282 system.cpu.dtb.write_accesses 868 # DTB write accesses
283 system.cpu.dtb.data_hits 2048 # DTB hits
284 system.cpu.dtb.data_misses 10 # DTB misses
285 system.cpu.dtb.data_acv 0 # DTB access violations
286 system.cpu.dtb.data_accesses 2058 # DTB accesses
287 system.cpu.itb.fetch_hits 6401 # ITB hits
288 system.cpu.itb.fetch_misses 17 # ITB misses
289 system.cpu.itb.fetch_acv 0 # ITB acv
290 system.cpu.itb.fetch_accesses 6418 # ITB accesses
291 system.cpu.itb.read_hits 0 # DTB read hits
292 system.cpu.itb.read_misses 0 # DTB read misses
293 system.cpu.itb.read_acv 0 # DTB read access violations
294 system.cpu.itb.read_accesses 0 # DTB read accesses
295 system.cpu.itb.write_hits 0 # DTB write hits
296 system.cpu.itb.write_misses 0 # DTB write misses
297 system.cpu.itb.write_acv 0 # DTB write access violations
298 system.cpu.itb.write_accesses 0 # DTB write accesses
299 system.cpu.itb.data_hits 0 # DTB hits
300 system.cpu.itb.data_misses 0 # DTB misses
301 system.cpu.itb.data_acv 0 # DTB access violations
302 system.cpu.itb.data_accesses 0 # DTB accesses
303 system.cpu.workload.num_syscalls 17 # Number of system calls
304 system.cpu.numCycles 107210 # number of cpu cycles simulated
305 system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
306 system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
307 system.cpu.committedInsts 6390 # Number of instructions committed
308 system.cpu.committedOps 6390 # Number of ops (including micro ops) committed
309 system.cpu.num_int_alu_accesses 6317 # Number of integer alu accesses
310 system.cpu.num_fp_alu_accesses 10 # Number of float alu accesses
311 system.cpu.num_func_calls 251 # number of times a function call or return occured
312 system.cpu.num_conditional_control_insts 749 # number of instructions that are conditional controls
313 system.cpu.num_int_insts 6317 # number of integer instructions
314 system.cpu.num_fp_insts 10 # number of float instructions
315 system.cpu.num_int_register_reads 8285 # number of times the integer registers were read
316 system.cpu.num_int_register_writes 4568 # number of times the integer registers were written
317 system.cpu.num_fp_register_reads 8 # number of times the floating registers were read
318 system.cpu.num_fp_register_writes 2 # number of times the floating registers were written
319 system.cpu.num_mem_refs 2058 # number of memory refs
320 system.cpu.num_load_insts 1190 # Number of load instructions
321 system.cpu.num_store_insts 868 # Number of store instructions
322 system.cpu.num_idle_cycles 0 # Number of idle cycles
323 system.cpu.num_busy_cycles 107210 # Number of busy cycles
324 system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
325 system.cpu.idle_fraction 0 # Percentage of idle cycles
326 system.cpu.Branches 1050 # Number of branches fetched
327 system.cpu.op_class::No_OpClass 19 0.30% 0.30% # Class of executed instruction
328 system.cpu.op_class::IntAlu 4320 67.50% 67.80% # Class of executed instruction
329 system.cpu.op_class::IntMult 1 0.02% 67.81% # Class of executed instruction
330 system.cpu.op_class::IntDiv 0 0.00% 67.81% # Class of executed instruction
331 system.cpu.op_class::FloatAdd 2 0.03% 67.84% # Class of executed instruction
332 system.cpu.op_class::FloatCmp 0 0.00% 67.84% # Class of executed instruction
333 system.cpu.op_class::FloatCvt 0 0.00% 67.84% # Class of executed instruction
334 system.cpu.op_class::FloatMult 0 0.00% 67.84% # Class of executed instruction
335 system.cpu.op_class::FloatDiv 0 0.00% 67.84% # Class of executed instruction
336 system.cpu.op_class::FloatSqrt 0 0.00% 67.84% # Class of executed instruction
337 system.cpu.op_class::SimdAdd 0 0.00% 67.84% # Class of executed instruction
338 system.cpu.op_class::SimdAddAcc 0 0.00% 67.84% # Class of executed instruction
339 system.cpu.op_class::SimdAlu 0 0.00% 67.84% # Class of executed instruction
340 system.cpu.op_class::SimdCmp 0 0.00% 67.84% # Class of executed instruction
341 system.cpu.op_class::SimdCvt 0 0.00% 67.84% # Class of executed instruction
342 system.cpu.op_class::SimdMisc 0 0.00% 67.84% # Class of executed instruction
343 system.cpu.op_class::SimdMult 0 0.00% 67.84% # Class of executed instruction
344 system.cpu.op_class::SimdMultAcc 0 0.00% 67.84% # Class of executed instruction
345 system.cpu.op_class::SimdShift 0 0.00% 67.84% # Class of executed instruction
346 system.cpu.op_class::SimdShiftAcc 0 0.00% 67.84% # Class of executed instruction
347 system.cpu.op_class::SimdSqrt 0 0.00% 67.84% # Class of executed instruction
348 system.cpu.op_class::SimdFloatAdd 0 0.00% 67.84% # Class of executed instruction
349 system.cpu.op_class::SimdFloatAlu 0 0.00% 67.84% # Class of executed instruction
350 system.cpu.op_class::SimdFloatCmp 0 0.00% 67.84% # Class of executed instruction
351 system.cpu.op_class::SimdFloatCvt 0 0.00% 67.84% # Class of executed instruction
352 system.cpu.op_class::SimdFloatDiv 0 0.00% 67.84% # Class of executed instruction
353 system.cpu.op_class::SimdFloatMisc 0 0.00% 67.84% # Class of executed instruction
354 system.cpu.op_class::SimdFloatMult 0 0.00% 67.84% # Class of executed instruction
355 system.cpu.op_class::SimdFloatMultAcc 0 0.00% 67.84% # Class of executed instruction
356 system.cpu.op_class::SimdFloatSqrt 0 0.00% 67.84% # Class of executed instruction
357 system.cpu.op_class::MemRead 1190 18.59% 86.44% # Class of executed instruction
358 system.cpu.op_class::MemWrite 868 13.56% 100.00% # Class of executed instruction
359 system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
360 system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
361 system.cpu.op_class::total 6400 # Class of executed instruction
362 system.ruby.clk_domain.clock 1 # Clock period in ticks
363 system.ruby.delayHist::bucket_size 1 # delay histogram for all message
364 system.ruby.delayHist::max_bucket 9 # delay histogram for all message
365 system.ruby.delayHist::samples 3456 # delay histogram for all message
366 system.ruby.delayHist | 3456 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message
367 system.ruby.delayHist::total 3456 # delay histogram for all message
368 system.ruby.outstanding_req_hist::bucket_size 1
369 system.ruby.outstanding_req_hist::max_bucket 9
370 system.ruby.outstanding_req_hist::samples 8449
371 system.ruby.outstanding_req_hist::mean 1
372 system.ruby.outstanding_req_hist::gmean 1
373 system.ruby.outstanding_req_hist | 0 0.00% 0.00% | 8449 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
374 system.ruby.outstanding_req_hist::total 8449
375 system.ruby.latency_hist::bucket_size 64
376 system.ruby.latency_hist::max_bucket 639
377 system.ruby.latency_hist::samples 8448
378 system.ruby.latency_hist::mean 11.690578
379 system.ruby.latency_hist::gmean 2.205273
380 system.ruby.latency_hist::stdev 25.830363
381 system.ruby.latency_hist | 8209 97.17% 97.17% | 184 2.18% 99.35% | 38 0.45% 99.80% | 7 0.08% 99.88% | 6 0.07% 99.95% | 3 0.04% 99.99% | 0 0.00% 99.99% | 1 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
382 system.ruby.latency_hist::total 8448
383 system.ruby.hit_latency_hist::bucket_size 1
384 system.ruby.hit_latency_hist::max_bucket 9
385 system.ruby.hit_latency_hist::samples 6718
386 system.ruby.hit_latency_hist::mean 1
387 system.ruby.hit_latency_hist::gmean 1
388 system.ruby.hit_latency_hist | 0 0.00% 0.00% | 6718 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
389 system.ruby.hit_latency_hist::total 6718
390 system.ruby.miss_latency_hist::bucket_size 64
391 system.ruby.miss_latency_hist::max_bucket 639
392 system.ruby.miss_latency_hist::samples 1730
393 system.ruby.miss_latency_hist::mean 53.204624
394 system.ruby.miss_latency_hist::gmean 47.556283
395 system.ruby.miss_latency_hist::stdev 33.032605
396 system.ruby.miss_latency_hist | 1491 86.18% 86.18% | 184 10.64% 96.82% | 38 2.20% 99.02% | 7 0.40% 99.42% | 6 0.35% 99.77% | 3 0.17% 99.94% | 0 0.00% 99.94% | 1 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
397 system.ruby.miss_latency_hist::total 1730
398 system.ruby.Directory.incomplete_times 1729
399 system.ruby.l1_cntrl0.cacheMemory.demand_hits 6718 # Number of cache demand hits
400 system.ruby.l1_cntrl0.cacheMemory.demand_misses 1730 # Number of cache demand misses
401 system.ruby.l1_cntrl0.cacheMemory.demand_accesses 8448 # Number of cache demand accesses
402 system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks
403 system.ruby.network.routers0.percent_links_utilized 8.058950
404 system.ruby.network.routers0.msg_count.Control::2 1730
405 system.ruby.network.routers0.msg_count.Data::2 1726
406 system.ruby.network.routers0.msg_count.Response_Data::4 1730
407 system.ruby.network.routers0.msg_count.Writeback_Control::3 1726
408 system.ruby.network.routers0.msg_bytes.Control::2 13840
409 system.ruby.network.routers0.msg_bytes.Data::2 124272
410 system.ruby.network.routers0.msg_bytes.Response_Data::4 124560
411 system.ruby.network.routers0.msg_bytes.Writeback_Control::3 13808
412 system.ruby.network.routers1.percent_links_utilized 8.058950
413 system.ruby.network.routers1.msg_count.Control::2 1730
414 system.ruby.network.routers1.msg_count.Data::2 1726
415 system.ruby.network.routers1.msg_count.Response_Data::4 1730
416 system.ruby.network.routers1.msg_count.Writeback_Control::3 1726
417 system.ruby.network.routers1.msg_bytes.Control::2 13840
418 system.ruby.network.routers1.msg_bytes.Data::2 124272
419 system.ruby.network.routers1.msg_bytes.Response_Data::4 124560
420 system.ruby.network.routers1.msg_bytes.Writeback_Control::3 13808
421 system.ruby.network.routers2.percent_links_utilized 8.058950
422 system.ruby.network.routers2.msg_count.Control::2 1730
423 system.ruby.network.routers2.msg_count.Data::2 1726
424 system.ruby.network.routers2.msg_count.Response_Data::4 1730
425 system.ruby.network.routers2.msg_count.Writeback_Control::3 1726
426 system.ruby.network.routers2.msg_bytes.Control::2 13840
427 system.ruby.network.routers2.msg_bytes.Data::2 124272
428 system.ruby.network.routers2.msg_bytes.Response_Data::4 124560
429 system.ruby.network.routers2.msg_bytes.Writeback_Control::3 13808
430 system.ruby.network.msg_count.Control 5190
431 system.ruby.network.msg_count.Data 5178
432 system.ruby.network.msg_count.Response_Data 5190
433 system.ruby.network.msg_count.Writeback_Control 5178
434 system.ruby.network.msg_byte.Control 41520
435 system.ruby.network.msg_byte.Data 372816
436 system.ruby.network.msg_byte.Response_Data 373680
437 system.ruby.network.msg_byte.Writeback_Control 41424
438 system.ruby.network.routers0.throttle0.link_utilization 8.066412
439 system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1730
440 system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1726
441 system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 124560
442 system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 13808
443 system.ruby.network.routers0.throttle1.link_utilization 8.051488
444 system.ruby.network.routers0.throttle1.msg_count.Control::2 1730
445 system.ruby.network.routers0.throttle1.msg_count.Data::2 1726
446 system.ruby.network.routers0.throttle1.msg_bytes.Control::2 13840
447 system.ruby.network.routers0.throttle1.msg_bytes.Data::2 124272
448 system.ruby.network.routers1.throttle0.link_utilization 8.051488
449 system.ruby.network.routers1.throttle0.msg_count.Control::2 1730
450 system.ruby.network.routers1.throttle0.msg_count.Data::2 1726
451 system.ruby.network.routers1.throttle0.msg_bytes.Control::2 13840
452 system.ruby.network.routers1.throttle0.msg_bytes.Data::2 124272
453 system.ruby.network.routers1.throttle1.link_utilization 8.066412
454 system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 1730
455 system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 1726
456 system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 124560
457 system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 13808
458 system.ruby.network.routers2.throttle0.link_utilization 8.066412
459 system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 1730
460 system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 1726
461 system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 124560
462 system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 13808
463 system.ruby.network.routers2.throttle1.link_utilization 8.051488
464 system.ruby.network.routers2.throttle1.msg_count.Control::2 1730
465 system.ruby.network.routers2.throttle1.msg_count.Data::2 1726
466 system.ruby.network.routers2.throttle1.msg_bytes.Control::2 13840
467 system.ruby.network.routers2.throttle1.msg_bytes.Data::2 124272
468 system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1
469 system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1
470 system.ruby.delayVCHist.vnet_1::samples 1730 # delay histogram for vnet_1
471 system.ruby.delayVCHist.vnet_1 | 1730 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1
472 system.ruby.delayVCHist.vnet_1::total 1730 # delay histogram for vnet_1
473 system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2
474 system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2
475 system.ruby.delayVCHist.vnet_2::samples 1726 # delay histogram for vnet_2
476 system.ruby.delayVCHist.vnet_2 | 1726 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2
477 system.ruby.delayVCHist.vnet_2::total 1726 # delay histogram for vnet_2
478 system.ruby.LD.latency_hist::bucket_size 64
479 system.ruby.LD.latency_hist::max_bucket 639
480 system.ruby.LD.latency_hist::samples 1183
481 system.ruby.LD.latency_hist::mean 31.638208
482 system.ruby.LD.latency_hist::gmean 10.419015
483 system.ruby.LD.latency_hist::stdev 35.065266
484 system.ruby.LD.latency_hist | 1085 91.72% 91.72% | 74 6.26% 97.97% | 18 1.52% 99.49% | 2 0.17% 99.66% | 3 0.25% 99.92% | 1 0.08% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
485 system.ruby.LD.latency_hist::total 1183
486 system.ruby.LD.hit_latency_hist::bucket_size 1
487 system.ruby.LD.hit_latency_hist::max_bucket 9
488 system.ruby.LD.hit_latency_hist::samples 456
489 system.ruby.LD.hit_latency_hist::mean 1
490 system.ruby.LD.hit_latency_hist::gmean 1
491 system.ruby.LD.hit_latency_hist | 0 0.00% 0.00% | 456 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
492 system.ruby.LD.hit_latency_hist::total 456
493 system.ruby.LD.miss_latency_hist::bucket_size 64
494 system.ruby.LD.miss_latency_hist::max_bucket 639
495 system.ruby.LD.miss_latency_hist::samples 727
496 system.ruby.LD.miss_latency_hist::mean 50.855571
497 system.ruby.LD.miss_latency_hist::gmean 45.315147
498 system.ruby.LD.miss_latency_hist::stdev 32.287061
499 system.ruby.LD.miss_latency_hist | 629 86.52% 86.52% | 74 10.18% 96.70% | 18 2.48% 99.17% | 2 0.28% 99.45% | 3 0.41% 99.86% | 1 0.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
500 system.ruby.LD.miss_latency_hist::total 727
501 system.ruby.ST.latency_hist::bucket_size 32
502 system.ruby.ST.latency_hist::max_bucket 319
503 system.ruby.ST.latency_hist::samples 865
504 system.ruby.ST.latency_hist::mean 16.483237
505 system.ruby.ST.latency_hist::gmean 3.324735
506 system.ruby.ST.latency_hist::stdev 28.016571
507 system.ruby.ST.latency_hist | 592 68.44% 68.44% | 244 28.21% 96.65% | 18 2.08% 98.73% | 2 0.23% 98.96% | 5 0.58% 99.54% | 2 0.23% 99.77% | 1 0.12% 99.88% | 0 0.00% 99.88% | 1 0.12% 100.00% | 0 0.00% 100.00%
508 system.ruby.ST.latency_hist::total 865
509 system.ruby.ST.hit_latency_hist::bucket_size 1
510 system.ruby.ST.hit_latency_hist::max_bucket 9
511 system.ruby.ST.hit_latency_hist::samples 592
512 system.ruby.ST.hit_latency_hist::mean 1
513 system.ruby.ST.hit_latency_hist::gmean 1
514 system.ruby.ST.hit_latency_hist | 0 0.00% 0.00% | 592 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
515 system.ruby.ST.hit_latency_hist::total 592
516 system.ruby.ST.miss_latency_hist::bucket_size 32
517 system.ruby.ST.miss_latency_hist::max_bucket 319
518 system.ruby.ST.miss_latency_hist::samples 273
519 system.ruby.ST.miss_latency_hist::mean 50.058608
520 system.ruby.ST.miss_latency_hist::gmean 44.997273
521 system.ruby.ST.miss_latency_hist::stdev 28.984216
522 system.ruby.ST.miss_latency_hist | 0 0.00% 0.00% | 244 89.38% 89.38% | 18 6.59% 95.97% | 2 0.73% 96.70% | 5 1.83% 98.53% | 2 0.73% 99.27% | 1 0.37% 99.63% | 0 0.00% 99.63% | 1 0.37% 100.00% | 0 0.00% 100.00%
523 system.ruby.ST.miss_latency_hist::total 273
524 system.ruby.IFETCH.latency_hist::bucket_size 64
525 system.ruby.IFETCH.latency_hist::max_bucket 639
526 system.ruby.IFETCH.latency_hist::samples 6400
527 system.ruby.IFETCH.latency_hist::mean 7.355625
528 system.ruby.IFETCH.latency_hist::gmean 1.565715
529 system.ruby.IFETCH.latency_hist::stdev 21.264557
530 system.ruby.IFETCH.latency_hist | 6288 98.25% 98.25% | 90 1.41% 99.66% | 13 0.20% 99.86% | 4 0.06% 99.92% | 2 0.03% 99.95% | 2 0.03% 99.98% | 0 0.00% 99.98% | 1 0.02% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
531 system.ruby.IFETCH.latency_hist::total 6400
532 system.ruby.IFETCH.hit_latency_hist::bucket_size 1
533 system.ruby.IFETCH.hit_latency_hist::max_bucket 9
534 system.ruby.IFETCH.hit_latency_hist::samples 5670
535 system.ruby.IFETCH.hit_latency_hist::mean 1
536 system.ruby.IFETCH.hit_latency_hist::gmean 1
537 system.ruby.IFETCH.hit_latency_hist | 0 0.00% 0.00% | 5670 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
538 system.ruby.IFETCH.hit_latency_hist::total 5670
539 system.ruby.IFETCH.miss_latency_hist::bucket_size 64
540 system.ruby.IFETCH.miss_latency_hist::max_bucket 639
541 system.ruby.IFETCH.miss_latency_hist::samples 730
542 system.ruby.IFETCH.miss_latency_hist::mean 56.720548
543 system.ruby.IFETCH.miss_latency_hist::gmean 50.941265
544 system.ruby.IFETCH.miss_latency_hist::stdev 34.853032
545 system.ruby.IFETCH.miss_latency_hist | 618 84.66% 84.66% | 90 12.33% 96.99% | 13 1.78% 98.77% | 4 0.55% 99.32% | 2 0.27% 99.59% | 2 0.27% 99.86% | 0 0.00% 99.86% | 1 0.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
546 system.ruby.IFETCH.miss_latency_hist::total 730
547 system.ruby.Directory.miss_mach_latency_hist::bucket_size 64
548 system.ruby.Directory.miss_mach_latency_hist::max_bucket 639
549 system.ruby.Directory.miss_mach_latency_hist::samples 1730
550 system.ruby.Directory.miss_mach_latency_hist::mean 53.204624
551 system.ruby.Directory.miss_mach_latency_hist::gmean 47.556283
552 system.ruby.Directory.miss_mach_latency_hist::stdev 33.032605
553 system.ruby.Directory.miss_mach_latency_hist | 1491 86.18% 86.18% | 184 10.64% 96.82% | 38 2.20% 99.02% | 7 0.40% 99.42% | 6 0.35% 99.77% | 3 0.17% 99.94% | 0 0.00% 99.94% | 1 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
554 system.ruby.Directory.miss_mach_latency_hist::total 1730
555 system.ruby.Directory.miss_latency_hist.issue_to_initial_request::bucket_size 1
556 system.ruby.Directory.miss_latency_hist.issue_to_initial_request::max_bucket 9
557 system.ruby.Directory.miss_latency_hist.issue_to_initial_request::samples 1
558 system.ruby.Directory.miss_latency_hist.issue_to_initial_request::stdev nan
559 system.ruby.Directory.miss_latency_hist.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
560 system.ruby.Directory.miss_latency_hist.issue_to_initial_request::total 1
561 system.ruby.Directory.miss_latency_hist.initial_to_forward::bucket_size 1
562 system.ruby.Directory.miss_latency_hist.initial_to_forward::max_bucket 9
563 system.ruby.Directory.miss_latency_hist.initial_to_forward::samples 1
564 system.ruby.Directory.miss_latency_hist.initial_to_forward::stdev nan
565 system.ruby.Directory.miss_latency_hist.initial_to_forward | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
566 system.ruby.Directory.miss_latency_hist.initial_to_forward::total 1
567 system.ruby.Directory.miss_latency_hist.forward_to_first_response::bucket_size 1
568 system.ruby.Directory.miss_latency_hist.forward_to_first_response::max_bucket 9
569 system.ruby.Directory.miss_latency_hist.forward_to_first_response::samples 1
570 system.ruby.Directory.miss_latency_hist.forward_to_first_response::stdev nan
571 system.ruby.Directory.miss_latency_hist.forward_to_first_response | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
572 system.ruby.Directory.miss_latency_hist.forward_to_first_response::total 1
573 system.ruby.Directory.miss_latency_hist.first_response_to_completion::bucket_size 8
574 system.ruby.Directory.miss_latency_hist.first_response_to_completion::max_bucket 79
575 system.ruby.Directory.miss_latency_hist.first_response_to_completion::samples 1
576 system.ruby.Directory.miss_latency_hist.first_response_to_completion::mean 75
577 system.ruby.Directory.miss_latency_hist.first_response_to_completion::gmean 75.000000
578 system.ruby.Directory.miss_latency_hist.first_response_to_completion::stdev nan
579 system.ruby.Directory.miss_latency_hist.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00%
580 system.ruby.Directory.miss_latency_hist.first_response_to_completion::total 1
581 system.ruby.LD.Directory.miss_type_mach_latency_hist::bucket_size 64
582 system.ruby.LD.Directory.miss_type_mach_latency_hist::max_bucket 639
583 system.ruby.LD.Directory.miss_type_mach_latency_hist::samples 727
584 system.ruby.LD.Directory.miss_type_mach_latency_hist::mean 50.855571
585 system.ruby.LD.Directory.miss_type_mach_latency_hist::gmean 45.315147
586 system.ruby.LD.Directory.miss_type_mach_latency_hist::stdev 32.287061
587 system.ruby.LD.Directory.miss_type_mach_latency_hist | 629 86.52% 86.52% | 74 10.18% 96.70% | 18 2.48% 99.17% | 2 0.28% 99.45% | 3 0.41% 99.86% | 1 0.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
588 system.ruby.LD.Directory.miss_type_mach_latency_hist::total 727
589 system.ruby.ST.Directory.miss_type_mach_latency_hist::bucket_size 32
590 system.ruby.ST.Directory.miss_type_mach_latency_hist::max_bucket 319
591 system.ruby.ST.Directory.miss_type_mach_latency_hist::samples 273
592 system.ruby.ST.Directory.miss_type_mach_latency_hist::mean 50.058608
593 system.ruby.ST.Directory.miss_type_mach_latency_hist::gmean 44.997273
594 system.ruby.ST.Directory.miss_type_mach_latency_hist::stdev 28.984216
595 system.ruby.ST.Directory.miss_type_mach_latency_hist | 0 0.00% 0.00% | 244 89.38% 89.38% | 18 6.59% 95.97% | 2 0.73% 96.70% | 5 1.83% 98.53% | 2 0.73% 99.27% | 1 0.37% 99.63% | 0 0.00% 99.63% | 1 0.37% 100.00% | 0 0.00% 100.00%
596 system.ruby.ST.Directory.miss_type_mach_latency_hist::total 273
597 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::bucket_size 64
598 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::max_bucket 639
599 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::samples 730
600 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::mean 56.720548
601 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::gmean 50.941265
602 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::stdev 34.853032
603 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist | 618 84.66% 84.66% | 90 12.33% 96.99% | 13 1.78% 98.77% | 4 0.55% 99.32% | 2 0.27% 99.59% | 2 0.27% 99.86% | 0 0.00% 99.86% | 1 0.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
604 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::total 730
605 system.ruby.Directory_Controller.GETX 1730 0.00% 0.00%
606 system.ruby.Directory_Controller.PUTX 1726 0.00% 0.00%
607 system.ruby.Directory_Controller.Memory_Data 1730 0.00% 0.00%
608 system.ruby.Directory_Controller.Memory_Ack 1726 0.00% 0.00%
609 system.ruby.Directory_Controller.I.GETX 1730 0.00% 0.00%
610 system.ruby.Directory_Controller.M.PUTX 1726 0.00% 0.00%
611 system.ruby.Directory_Controller.IM.Memory_Data 1730 0.00% 0.00%
612 system.ruby.Directory_Controller.MI.Memory_Ack 1726 0.00% 0.00%
613 system.ruby.L1Cache_Controller.Load 1183 0.00% 0.00%
614 system.ruby.L1Cache_Controller.Ifetch 6400 0.00% 0.00%
615 system.ruby.L1Cache_Controller.Store 865 0.00% 0.00%
616 system.ruby.L1Cache_Controller.Data 1730 0.00% 0.00%
617 system.ruby.L1Cache_Controller.Replacement 1726 0.00% 0.00%
618 system.ruby.L1Cache_Controller.Writeback_Ack 1726 0.00% 0.00%
619 system.ruby.L1Cache_Controller.I.Load 727 0.00% 0.00%
620 system.ruby.L1Cache_Controller.I.Ifetch 730 0.00% 0.00%
621 system.ruby.L1Cache_Controller.I.Store 273 0.00% 0.00%
622 system.ruby.L1Cache_Controller.M.Load 456 0.00% 0.00%
623 system.ruby.L1Cache_Controller.M.Ifetch 5670 0.00% 0.00%
624 system.ruby.L1Cache_Controller.M.Store 592 0.00% 0.00%
625 system.ruby.L1Cache_Controller.M.Replacement 1726 0.00% 0.00%
626 system.ruby.L1Cache_Controller.MI.Writeback_Ack 1726 0.00% 0.00%
627 system.ruby.L1Cache_Controller.IS.Data 1457 0.00% 0.00%
628 system.ruby.L1Cache_Controller.IM.Data 273 0.00% 0.00%
630 ---------- End Simulation Statistics ----------
projects / gem5.git / blob