6 time_sync_period=100000000000
7 time_sync_spin_threshold=100000000
11 children=cpu membus physmem
16 load_addr_mask=1099511627775
19 memories=system.physmem
23 work_begin_ckpt_count=0
24 work_begin_cpu_id_exit=-1
25 work_begin_exit_count=0
26 work_cpus_ckpt_count=0
30 system_port=system.membus.slave[0]
34 children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload
43 branchPred=system.cpu.branchPred
57 do_checkpoint_insts=true
59 do_statistics_insts=true
65 fuPool=system.cpu.fuPool
67 function_trace_start=0
72 interrupts=system.cpu.interrupts
77 max_insts_all_threads=0
78 max_insts_any_thread=0
79 max_loads_all_threads=0
80 max_loads_any_thread=0
95 smtCommitPolicy=RoundRobin
96 smtFetchPolicy=SingleThread
97 smtIQPolicy=Partitioned
99 smtLSQPolicy=Partitioned
101 smtNumFetchingThreads=1
102 smtROBPolicy=Partitioned
105 store_set_clear_period=250000
108 tracer=system.cpu.tracer
112 workload=system.cpu.workload
113 dcache_port=system.cpu.dcache.cpu_side
114 icache_port=system.cpu.icache.cpu_side
116 [system.cpu.branchPred]
122 choicePredictorSize=8192
125 globalPredictorSize=8192
129 localHistoryTableSize=2048
130 localPredictorSize=2048
136 addr_ranges=0:18446744073709551615
145 prefetch_on_access=false
153 cpu_side=system.cpu.dcache_port
154 mem_side=system.cpu.toL2Bus.slave[1]
160 walker=system.cpu.dtb.walker
162 [system.cpu.dtb.walker]
165 num_squash_per_cycle=2
167 port=system.cpu.toL2Bus.slave[3]
171 children=FUList0 FUList1 FUList2 FUList3 FUList4 FUList5 FUList6 FUList7 FUList8
172 FUList=system.cpu.fuPool.FUList0 system.cpu.fuPool.FUList1 system.cpu.fuPool.FUList2 system.cpu.fuPool.FUList3 system.cpu.fuPool.FUList4 system.cpu.fuPool.FUList5 system.cpu.fuPool.FUList6 system.cpu.fuPool.FUList7 system.cpu.fuPool.FUList8
174 [system.cpu.fuPool.FUList0]
178 opList=system.cpu.fuPool.FUList0.opList
180 [system.cpu.fuPool.FUList0.opList]
186 [system.cpu.fuPool.FUList1]
188 children=opList0 opList1
190 opList=system.cpu.fuPool.FUList1.opList0 system.cpu.fuPool.FUList1.opList1
192 [system.cpu.fuPool.FUList1.opList0]
198 [system.cpu.fuPool.FUList1.opList1]
204 [system.cpu.fuPool.FUList2]
206 children=opList0 opList1 opList2
208 opList=system.cpu.fuPool.FUList2.opList0 system.cpu.fuPool.FUList2.opList1 system.cpu.fuPool.FUList2.opList2
210 [system.cpu.fuPool.FUList2.opList0]
216 [system.cpu.fuPool.FUList2.opList1]
222 [system.cpu.fuPool.FUList2.opList2]
228 [system.cpu.fuPool.FUList3]
230 children=opList0 opList1 opList2
232 opList=system.cpu.fuPool.FUList3.opList0 system.cpu.fuPool.FUList3.opList1 system.cpu.fuPool.FUList3.opList2
234 [system.cpu.fuPool.FUList3.opList0]
240 [system.cpu.fuPool.FUList3.opList1]
246 [system.cpu.fuPool.FUList3.opList2]
252 [system.cpu.fuPool.FUList4]
256 opList=system.cpu.fuPool.FUList4.opList
258 [system.cpu.fuPool.FUList4.opList]
264 [system.cpu.fuPool.FUList5]
266 children=opList00 opList01 opList02 opList03 opList04 opList05 opList06 opList07 opList08 opList09 opList10 opList11 opList12 opList13 opList14 opList15 opList16 opList17 opList18 opList19
268 opList=system.cpu.fuPool.FUList5.opList00 system.cpu.fuPool.FUList5.opList01 system.cpu.fuPool.FUList5.opList02 system.cpu.fuPool.FUList5.opList03 system.cpu.fuPool.FUList5.opList04 system.cpu.fuPool.FUList5.opList05 system.cpu.fuPool.FUList5.opList06 system.cpu.fuPool.FUList5.opList07 system.cpu.fuPool.FUList5.opList08 system.cpu.fuPool.FUList5.opList09 system.cpu.fuPool.FUList5.opList10 system.cpu.fuPool.FUList5.opList11 system.cpu.fuPool.FUList5.opList12 system.cpu.fuPool.FUList5.opList13 system.cpu.fuPool.FUList5.opList14 system.cpu.fuPool.FUList5.opList15 system.cpu.fuPool.FUList5.opList16 system.cpu.fuPool.FUList5.opList17 system.cpu.fuPool.FUList5.opList18 system.cpu.fuPool.FUList5.opList19
270 [system.cpu.fuPool.FUList5.opList00]
276 [system.cpu.fuPool.FUList5.opList01]
282 [system.cpu.fuPool.FUList5.opList02]
288 [system.cpu.fuPool.FUList5.opList03]
294 [system.cpu.fuPool.FUList5.opList04]
300 [system.cpu.fuPool.FUList5.opList05]
306 [system.cpu.fuPool.FUList5.opList06]
312 [system.cpu.fuPool.FUList5.opList07]
318 [system.cpu.fuPool.FUList5.opList08]
324 [system.cpu.fuPool.FUList5.opList09]
330 [system.cpu.fuPool.FUList5.opList10]
336 [system.cpu.fuPool.FUList5.opList11]
342 [system.cpu.fuPool.FUList5.opList12]
348 [system.cpu.fuPool.FUList5.opList13]
354 [system.cpu.fuPool.FUList5.opList14]
360 [system.cpu.fuPool.FUList5.opList15]
366 [system.cpu.fuPool.FUList5.opList16]
369 opClass=SimdFloatMisc
372 [system.cpu.fuPool.FUList5.opList17]
375 opClass=SimdFloatMult
378 [system.cpu.fuPool.FUList5.opList18]
381 opClass=SimdFloatMultAcc
384 [system.cpu.fuPool.FUList5.opList19]
387 opClass=SimdFloatSqrt
390 [system.cpu.fuPool.FUList6]
394 opList=system.cpu.fuPool.FUList6.opList
396 [system.cpu.fuPool.FUList6.opList]
402 [system.cpu.fuPool.FUList7]
404 children=opList0 opList1
406 opList=system.cpu.fuPool.FUList7.opList0 system.cpu.fuPool.FUList7.opList1
408 [system.cpu.fuPool.FUList7.opList0]
414 [system.cpu.fuPool.FUList7.opList1]
420 [system.cpu.fuPool.FUList8]
424 opList=system.cpu.fuPool.FUList8.opList
426 [system.cpu.fuPool.FUList8.opList]
434 addr_ranges=0:18446744073709551615
443 prefetch_on_access=false
451 cpu_side=system.cpu.icache_port
452 mem_side=system.cpu.toL2Bus.slave[0]
454 [system.cpu.interrupts]
478 walker=system.cpu.itb.walker
480 [system.cpu.itb.walker]
483 num_squash_per_cycle=2
485 port=system.cpu.toL2Bus.slave[2]
489 addr_ranges=0:18446744073709551615
498 prefetch_on_access=false
506 cpu_side=system.cpu.toL2Bus.master[0]
507 mem_side=system.membus.slave[1]
514 use_default_range=false
516 master=system.cpu.l2cache.cpu_side
517 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
522 [system.cpu.workload]
530 executable=tests/test-progs/hello/bin/arm/linux/hello
533 max_stack_size=67108864
546 use_default_range=false
548 master=system.physmem.port
549 slave=system.system_port system.cpu.l2cache.mem_side
557 conf_table_reported=false
559 lines_per_rowbuffer=32
560 mem_sched_policy=frfcfs
577 port=system.membus.master[0]