tests/quick/se/00.hello/ref/arm/linux/simple-atomic/config.ini

   1 [root]
   2 type=Root
   3 children=system
   4 eventq_index=0
   5 full_system=false
   6 sim_quantum=0
   7 time_sync_enable=false
   8 time_sync_period=100000000000
   9 time_sync_spin_threshold=100000000
  10
  11 [system]
  12 type=System
  13 children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
  14 boot_osflags=a
  15 cache_line_size=64
  16 clk_domain=system.clk_domain
  17 eventq_index=0
  18 init_param=0
  19 kernel=
  20 kernel_addr_check=true
  21 load_addr_mask=1099511627775
  22 load_offset=0
  23 mem_mode=atomic
  24 mem_ranges=
  25 memories=system.physmem
  26 num_work_ids=16
  27 readfile=
  28 symbolfile=
  29 work_begin_ckpt_count=0
  30 work_begin_cpu_id_exit=-1
  31 work_begin_exit_count=0
  32 work_cpus_ckpt_count=0
  33 work_end_ckpt_count=0
  34 work_end_exit_count=0
  35 work_item_id=-1
  36 system_port=system.membus.slave[0]
  37
  38 [system.clk_domain]
  39 type=SrcClockDomain
  40 clock=1000
  41 domain_id=-1
  42 eventq_index=0
  43 init_perf_level=0
  44 voltage_domain=system.voltage_domain
  45
  46 [system.cpu]
  47 type=AtomicSimpleCPU
  48 children=dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload
  49 branchPred=Null
  50 checker=Null
  51 clk_domain=system.cpu_clk_domain
  52 cpu_id=0
  53 do_checkpoint_insts=true
  54 do_quiesce=true
  55 do_statistics_insts=true
  56 dstage2_mmu=system.cpu.dstage2_mmu
  57 dtb=system.cpu.dtb
  58 eventq_index=0
  59 fastmem=false
  60 function_trace=false
  61 function_trace_start=0
  62 interrupts=system.cpu.interrupts
  63 isa=system.cpu.isa
  64 istage2_mmu=system.cpu.istage2_mmu
  65 itb=system.cpu.itb
  66 max_insts_all_threads=0
  67 max_insts_any_thread=0
  68 max_loads_all_threads=0
  69 max_loads_any_thread=0
  70 numThreads=1
  71 profile=0
  72 progress_interval=0
  73 simpoint_interval=100000000
  74 simpoint_profile=false
  75 simpoint_profile_file=simpoint.bb.gz
  76 simpoint_start_insts=
  77 simulate_data_stalls=false
  78 simulate_inst_stalls=false
  79 socket_id=0
  80 switched_out=false
  81 system=system
  82 tracer=system.cpu.tracer
  83 width=1
  84 workload=system.cpu.workload
  85 dcache_port=system.membus.slave[2]
  86 icache_port=system.membus.slave[1]
  87
  88 [system.cpu.dstage2_mmu]
  89 type=ArmStage2MMU
  90 children=stage2_tlb
  91 eventq_index=0
  92 stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
  93 tlb=system.cpu.dtb
  94
  95 [system.cpu.dstage2_mmu.stage2_tlb]
  96 type=ArmTLB
  97 children=walker
  98 eventq_index=0
  99 is_stage2=true
 100 size=32
 101 walker=system.cpu.dstage2_mmu.stage2_tlb.walker
 102
 103 [system.cpu.dstage2_mmu.stage2_tlb.walker]
 104 type=ArmTableWalker
 105 clk_domain=system.cpu_clk_domain
 106 eventq_index=0
 107 is_stage2=true
 108 num_squash_per_cycle=2
 109 sys=system
 110 port=system.membus.slave[6]
 111
 112 [system.cpu.dtb]
 113 type=ArmTLB
 114 children=walker
 115 eventq_index=0
 116 is_stage2=false
 117 size=64
 118 walker=system.cpu.dtb.walker
 119
 120 [system.cpu.dtb.walker]
 121 type=ArmTableWalker
 122 clk_domain=system.cpu_clk_domain
 123 eventq_index=0
 124 is_stage2=false
 125 num_squash_per_cycle=2
 126 sys=system
 127 port=system.membus.slave[4]
 128
 129 [system.cpu.interrupts]
 130 type=ArmInterrupts
 131 eventq_index=0
 132
 133 [system.cpu.isa]
 134 type=ArmISA
 135 eventq_index=0
 136 fpsid=1090793632
 137 id_aa64afr0_el1=0
 138 id_aa64afr1_el1=0
 139 id_aa64dfr0_el1=1052678
 140 id_aa64dfr1_el1=0
 141 id_aa64isar0_el1=0
 142 id_aa64isar1_el1=0
 143 id_aa64mmfr0_el1=15728642
 144 id_aa64mmfr1_el1=0
 145 id_aa64pfr0_el1=17
 146 id_aa64pfr1_el1=0
 147 id_isar0=34607377
 148 id_isar1=34677009
 149 id_isar2=555950401
 150 id_isar3=17899825
 151 id_isar4=268501314
 152 id_isar5=0
 153 id_mmfr0=270536963
 154 id_mmfr1=0
 155 id_mmfr2=19070976
 156 id_mmfr3=34611729
 157 id_pfr0=49
 158 id_pfr1=4113
 159 midr=1091551472
 160 system=system
 161
 162 [system.cpu.istage2_mmu]
 163 type=ArmStage2MMU
 164 children=stage2_tlb
 165 eventq_index=0
 166 stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
 167 tlb=system.cpu.itb
 168
 169 [system.cpu.istage2_mmu.stage2_tlb]
 170 type=ArmTLB
 171 children=walker
 172 eventq_index=0
 173 is_stage2=true
 174 size=32
 175 walker=system.cpu.istage2_mmu.stage2_tlb.walker
 176
 177 [system.cpu.istage2_mmu.stage2_tlb.walker]
 178 type=ArmTableWalker
 179 clk_domain=system.cpu_clk_domain
 180 eventq_index=0
 181 is_stage2=true
 182 num_squash_per_cycle=2
 183 sys=system
 184 port=system.membus.slave[5]
 185
 186 [system.cpu.itb]
 187 type=ArmTLB
 188 children=walker
 189 eventq_index=0
 190 is_stage2=false
 191 size=64
 192 walker=system.cpu.itb.walker
 193
 194 [system.cpu.itb.walker]
 195 type=ArmTableWalker
 196 clk_domain=system.cpu_clk_domain
 197 eventq_index=0
 198 is_stage2=false
 199 num_squash_per_cycle=2
 200 sys=system
 201 port=system.membus.slave[3]
 202
 203 [system.cpu.tracer]
 204 type=ExeTracer
 205 eventq_index=0
 206
 207 [system.cpu.workload]
 208 type=LiveProcess
 209 cmd=hello
 210 cwd=
 211 egid=100
 212 env=
 213 errout=cerr
 214 euid=100
 215 eventq_index=0
 216 executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/arm/linux/hello
 217 gid=100
 218 input=cin
 219 max_stack_size=67108864
 220 output=cout
 221 pid=100
 222 ppid=99
 223 simpoint=0
 224 system=system
 225 uid=100
 226
 227 [system.cpu_clk_domain]
 228 type=SrcClockDomain
 229 clock=500
 230 domain_id=-1
 231 eventq_index=0
 232 init_perf_level=0
 233 voltage_domain=system.voltage_domain
 234
 235 [system.dvfs_handler]
 236 type=DVFSHandler
 237 domains=
 238 enable=false
 239 eventq_index=0
 240 sys_clk_domain=system.clk_domain
 241 transition_latency=100000000
 242
 243 [system.membus]
 244 type=CoherentBus
 245 clk_domain=system.clk_domain
 246 eventq_index=0
 247 header_cycles=1
 248 system=system
 249 use_default_range=false
 250 width=8
 251 master=system.physmem.port
 252 slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port
 253
 254 [system.physmem]
 255 type=SimpleMemory
 256 bandwidth=73.000000
 257 clk_domain=system.clk_domain
 258 conf_table_reported=true
 259 eventq_index=0
 260 in_addr_map=true
 261 latency=30000
 262 latency_var=0
 263 null=false
 264 range=0:134217727
 265 port=system.membus.master[0]
 266
 267 [system.voltage_domain]
 268 type=VoltageDomain
 269 eventq_index=0
 270 voltage=1.000000
 271