tests: Update RISC-V hello test and stats
[gem5.git] / tests / quick / se / 00.hello / ref / riscv / linux / simple-atomic / simout
1 Redirecting stdout to build/RISCV/tests/debug/quick/se/00.hello/riscv/linux/simple-atomic/simout
2 Redirecting stderr to build/RISCV/tests/debug/quick/se/00.hello/riscv/linux/simple-atomic/simerr
3 gem5 Simulator System. http://gem5.org
4 gem5 is copyrighted software; use the --copyright option for details.
5
6 gem5 compiled May 31 2017 18:33:59
7 gem5 started May 31 2017 18:34:14
8 gem5 executing on boldrock, pid 15724
9 command line: /home/ar4jc/gem5/build/RISCV/gem5.debug -d build/RISCV/tests/debug/quick/se/00.hello/riscv/linux/simple-atomic --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/00.hello/riscv/linux/simple-atomic
10
11 Global frequency set at 1000000000000 ticks per second
12 Hello world!
13 Exiting @ tick 2783000 because exiting with last active thread context