stats: Bump stats for the fixes, and mostly DRAM controller changes
[gem5.git] / tests / quick / se / 00.hello / ref / sparc / linux / simple-timing-ruby / simout
1 Redirecting stdout to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby/simout
2 Redirecting stderr to build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby/simerr
3 gem5 Simulator System. http://gem5.org
4 gem5 is copyrighted software; use the --copyright option for details.
5
6 gem5 compiled Feb 15 2014 16:11:41
7 gem5 started Feb 15 2014 16:12:47
8 gem5 executing on ribera.cs.wisc.edu
9 command line: build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby -re tests/run.py build/SPARC/tests/opt/quick/se/00.hello/sparc/linux/simple-timing-ruby
10 Global frequency set at 1000000000 ticks per second
11 info: Entering event queue @ 0. Starting simulation...
12 Hello World!Exiting @ tick 107952 because target called exit()