8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
13 children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
16 clk_domain=system.clk_domain
18 exit_on_work_items=false
21 kernel_addr_check=true
22 load_addr_mask=1099511627775
26 memories=system.physmem
27 mmap_using_noreserve=false
32 work_begin_ckpt_count=0
33 work_begin_cpu_id_exit=-1
34 work_begin_exit_count=0
35 work_cpus_ckpt_count=0
39 system_port=system.membus.slave[0]
47 voltage_domain=system.voltage_domain
51 children=apic_clk_domain dtb interrupts isa itb tracer workload
54 clk_domain=system.cpu_clk_domain
56 do_checkpoint_insts=true
58 do_statistics_insts=true
63 function_trace_start=0
64 interrupts=system.cpu.interrupts
67 max_insts_all_threads=0
68 max_insts_any_thread=0
69 max_loads_all_threads=0
70 max_loads_any_thread=0
75 simulate_data_stalls=false
76 simulate_inst_stalls=false
80 tracer=system.cpu.tracer
82 workload=system.cpu.workload
83 dcache_port=system.membus.slave[2]
84 icache_port=system.membus.slave[1]
86 [system.cpu.apic_clk_domain]
87 type=DerivedClockDomain
89 clk_domain=system.cpu_clk_domain
97 walker=system.cpu.dtb.walker
99 [system.cpu.dtb.walker]
100 type=X86PagetableWalker
101 clk_domain=system.cpu_clk_domain
103 num_squash_per_cycle=4
105 port=system.membus.slave[4]
107 [system.cpu.interrupts]
109 clk_domain=system.cpu.apic_clk_domain
112 pio_addr=2305843009213693952
115 int_master=system.membus.slave[5]
116 int_slave=system.membus.master[2]
117 pio=system.membus.master[1]
128 walker=system.cpu.itb.walker
130 [system.cpu.itb.walker]
131 type=X86PagetableWalker
132 clk_domain=system.cpu_clk_domain
134 num_squash_per_cycle=4
136 port=system.membus.slave[3]
142 [system.cpu.workload]
152 executable=/dist/m5/regression/test-progs/hello/bin/x86/linux/hello
156 max_stack_size=67108864
165 [system.cpu_clk_domain]
171 voltage_domain=system.voltage_domain
173 [system.dvfs_handler]
178 sys_clk_domain=system.clk_domain
179 transition_latency=100000000
183 clk_domain=system.clk_domain
189 snoop_response_latency=4
191 use_default_range=false
193 master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
194 slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.interrupts.int_master
199 clk_domain=system.clk_domain
200 conf_table_reported=true
207 port=system.membus.master[0]
209 [system.voltage_domain]