2 ---------- Begin Simulation Statistics ----------
3 sim_seconds 0.000088 # Number of seconds simulated
4 sim_ticks 87948 # Number of ticks simulated
5 final_tick 87948 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6 sim_freq 1000000000 # Frequency of simulated ticks
7 host_inst_rate 29086 # Simulator instruction rate (inst/s)
8 host_op_rate 52683 # Simulator op (including micro ops) rate (op/s)
9 host_tick_rate 475254 # Simulator tick rate (ticks/s)
10 host_mem_usage 405352 # Number of bytes of host memory used
11 host_seconds 0.19 # Real time elapsed on the host
12 sim_insts 5381 # Number of instructions simulated
13 sim_ops 9748 # Number of ops (including micro ops) simulated
14 system.voltage_domain.voltage 1 # Voltage in Volts
15 system.clk_domain.clock 1 # Clock period in ticks
16 system.mem_ctrls.bytes_read::ruby.dir_cntrl0 88128 # Number of bytes read from this memory
17 system.mem_ctrls.bytes_read::total 88128 # Number of bytes read from this memory
18 system.mem_ctrls.bytes_written::ruby.dir_cntrl0 87872 # Number of bytes written to this memory
19 system.mem_ctrls.bytes_written::total 87872 # Number of bytes written to this memory
20 system.mem_ctrls.num_reads::ruby.dir_cntrl0 1377 # Number of read requests responded to by this memory
21 system.mem_ctrls.num_reads::total 1377 # Number of read requests responded to by this memory
22 system.mem_ctrls.num_writes::ruby.dir_cntrl0 1373 # Number of write requests responded to by this memory
23 system.mem_ctrls.num_writes::total 1373 # Number of write requests responded to by this memory
24 system.mem_ctrls.bw_read::ruby.dir_cntrl0 1002046664 # Total read bandwidth from this memory (bytes/s)
25 system.mem_ctrls.bw_read::total 1002046664 # Total read bandwidth from this memory (bytes/s)
26 system.mem_ctrls.bw_write::ruby.dir_cntrl0 999135853 # Write bandwidth from this memory (bytes/s)
27 system.mem_ctrls.bw_write::total 999135853 # Write bandwidth from this memory (bytes/s)
28 system.mem_ctrls.bw_total::ruby.dir_cntrl0 2001182517 # Total bandwidth to/from this memory (bytes/s)
29 system.mem_ctrls.bw_total::total 2001182517 # Total bandwidth to/from this memory (bytes/s)
30 system.mem_ctrls.readReqs 1377 # Number of read requests accepted
31 system.mem_ctrls.writeReqs 1373 # Number of write requests accepted
32 system.mem_ctrls.readBursts 1377 # Number of DRAM read bursts, including those serviced by the write queue
33 system.mem_ctrls.writeBursts 1373 # Number of DRAM write bursts, including those merged in the write queue
34 system.mem_ctrls.bytesReadDRAM 40320 # Total number of bytes read from DRAM
35 system.mem_ctrls.bytesReadWrQ 47808 # Total number of bytes read from write queue
36 system.mem_ctrls.bytesWritten 39936 # Total number of bytes written to DRAM
37 system.mem_ctrls.bytesReadSys 88128 # Total read bytes from the system interface side
38 system.mem_ctrls.bytesWrittenSys 87872 # Total written bytes from the system interface side
39 system.mem_ctrls.servicedByWrQ 747 # Number of DRAM read bursts serviced by the write queue
40 system.mem_ctrls.mergedWrBursts 722 # Number of DRAM write bursts merged with an existing one
41 system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write
42 system.mem_ctrls.perBankRdBursts::0 59 # Per bank write bursts
43 system.mem_ctrls.perBankRdBursts::1 1 # Per bank write bursts
44 system.mem_ctrls.perBankRdBursts::2 6 # Per bank write bursts
45 system.mem_ctrls.perBankRdBursts::3 9 # Per bank write bursts
46 system.mem_ctrls.perBankRdBursts::4 52 # Per bank write bursts
47 system.mem_ctrls.perBankRdBursts::5 55 # Per bank write bursts
48 system.mem_ctrls.perBankRdBursts::6 37 # Per bank write bursts
49 system.mem_ctrls.perBankRdBursts::7 64 # Per bank write bursts
50 system.mem_ctrls.perBankRdBursts::8 25 # Per bank write bursts
51 system.mem_ctrls.perBankRdBursts::9 119 # Per bank write bursts
52 system.mem_ctrls.perBankRdBursts::10 121 # Per bank write bursts
53 system.mem_ctrls.perBankRdBursts::11 21 # Per bank write bursts
54 system.mem_ctrls.perBankRdBursts::12 2 # Per bank write bursts
55 system.mem_ctrls.perBankRdBursts::13 21 # Per bank write bursts
56 system.mem_ctrls.perBankRdBursts::14 8 # Per bank write bursts
57 system.mem_ctrls.perBankRdBursts::15 30 # Per bank write bursts
58 system.mem_ctrls.perBankWrBursts::0 51 # Per bank write bursts
59 system.mem_ctrls.perBankWrBursts::1 1 # Per bank write bursts
60 system.mem_ctrls.perBankWrBursts::2 6 # Per bank write bursts
61 system.mem_ctrls.perBankWrBursts::3 7 # Per bank write bursts
62 system.mem_ctrls.perBankWrBursts::4 52 # Per bank write bursts
63 system.mem_ctrls.perBankWrBursts::5 50 # Per bank write bursts
64 system.mem_ctrls.perBankWrBursts::6 36 # Per bank write bursts
65 system.mem_ctrls.perBankWrBursts::7 66 # Per bank write bursts
66 system.mem_ctrls.perBankWrBursts::8 25 # Per bank write bursts
67 system.mem_ctrls.perBankWrBursts::9 120 # Per bank write bursts
68 system.mem_ctrls.perBankWrBursts::10 125 # Per bank write bursts
69 system.mem_ctrls.perBankWrBursts::11 23 # Per bank write bursts
70 system.mem_ctrls.perBankWrBursts::12 2 # Per bank write bursts
71 system.mem_ctrls.perBankWrBursts::13 21 # Per bank write bursts
72 system.mem_ctrls.perBankWrBursts::14 8 # Per bank write bursts
73 system.mem_ctrls.perBankWrBursts::15 31 # Per bank write bursts
74 system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry
75 system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry
76 system.mem_ctrls.totGap 87868 # Total gap between requests
77 system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2)
78 system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2)
79 system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2)
80 system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2)
81 system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2)
82 system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2)
83 system.mem_ctrls.readPktSize::6 1377 # Read request sizes (log2)
84 system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2)
85 system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2)
86 system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2)
87 system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2)
88 system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2)
89 system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2)
90 system.mem_ctrls.writePktSize::6 1373 # Write request sizes (log2)
91 system.mem_ctrls.rdQLenPdf::0 630 # What read queue length does an incoming req see
92 system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see
93 system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see
94 system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see
95 system.mem_ctrls.rdQLenPdf::4 0 # What read queue length does an incoming req see
96 system.mem_ctrls.rdQLenPdf::5 0 # What read queue length does an incoming req see
97 system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see
98 system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see
99 system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see
100 system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see
101 system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see
102 system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see
103 system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see
104 system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see
105 system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see
106 system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see
107 system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see
108 system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see
109 system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see
110 system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see
111 system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see
112 system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see
113 system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see
114 system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see
115 system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see
116 system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see
117 system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see
118 system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see
119 system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see
120 system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see
121 system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see
122 system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see
123 system.mem_ctrls.wrQLenPdf::0 1 # What write queue length does an incoming req see
124 system.mem_ctrls.wrQLenPdf::1 1 # What write queue length does an incoming req see
125 system.mem_ctrls.wrQLenPdf::2 1 # What write queue length does an incoming req see
126 system.mem_ctrls.wrQLenPdf::3 1 # What write queue length does an incoming req see
127 system.mem_ctrls.wrQLenPdf::4 1 # What write queue length does an incoming req see
128 system.mem_ctrls.wrQLenPdf::5 1 # What write queue length does an incoming req see
129 system.mem_ctrls.wrQLenPdf::6 1 # What write queue length does an incoming req see
130 system.mem_ctrls.wrQLenPdf::7 1 # What write queue length does an incoming req see
131 system.mem_ctrls.wrQLenPdf::8 1 # What write queue length does an incoming req see
132 system.mem_ctrls.wrQLenPdf::9 1 # What write queue length does an incoming req see
133 system.mem_ctrls.wrQLenPdf::10 1 # What write queue length does an incoming req see
134 system.mem_ctrls.wrQLenPdf::11 1 # What write queue length does an incoming req see
135 system.mem_ctrls.wrQLenPdf::12 1 # What write queue length does an incoming req see
136 system.mem_ctrls.wrQLenPdf::13 1 # What write queue length does an incoming req see
137 system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see
138 system.mem_ctrls.wrQLenPdf::15 6 # What write queue length does an incoming req see
139 system.mem_ctrls.wrQLenPdf::16 8 # What write queue length does an incoming req see
140 system.mem_ctrls.wrQLenPdf::17 41 # What write queue length does an incoming req see
141 system.mem_ctrls.wrQLenPdf::18 40 # What write queue length does an incoming req see
142 system.mem_ctrls.wrQLenPdf::19 39 # What write queue length does an incoming req see
143 system.mem_ctrls.wrQLenPdf::20 40 # What write queue length does an incoming req see
144 system.mem_ctrls.wrQLenPdf::21 39 # What write queue length does an incoming req see
145 system.mem_ctrls.wrQLenPdf::22 39 # What write queue length does an incoming req see
146 system.mem_ctrls.wrQLenPdf::23 39 # What write queue length does an incoming req see
147 system.mem_ctrls.wrQLenPdf::24 39 # What write queue length does an incoming req see
148 system.mem_ctrls.wrQLenPdf::25 39 # What write queue length does an incoming req see
149 system.mem_ctrls.wrQLenPdf::26 39 # What write queue length does an incoming req see
150 system.mem_ctrls.wrQLenPdf::27 38 # What write queue length does an incoming req see
151 system.mem_ctrls.wrQLenPdf::28 38 # What write queue length does an incoming req see
152 system.mem_ctrls.wrQLenPdf::29 38 # What write queue length does an incoming req see
153 system.mem_ctrls.wrQLenPdf::30 38 # What write queue length does an incoming req see
154 system.mem_ctrls.wrQLenPdf::31 38 # What write queue length does an incoming req see
155 system.mem_ctrls.wrQLenPdf::32 38 # What write queue length does an incoming req see
156 system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see
157 system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see
158 system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see
159 system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see
160 system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see
161 system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see
162 system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see
163 system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see
164 system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see
165 system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see
166 system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see
167 system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see
168 system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see
169 system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see
170 system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see
171 system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see
172 system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see
173 system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see
174 system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see
175 system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see
176 system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see
177 system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see
178 system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see
179 system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see
180 system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see
181 system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see
182 system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see
183 system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see
184 system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see
185 system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see
186 system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see
187 system.mem_ctrls.bytesPerActivate::samples 271 # Bytes accessed per row activation
188 system.mem_ctrls.bytesPerActivate::mean 293.313653 # Bytes accessed per row activation
189 system.mem_ctrls.bytesPerActivate::gmean 193.377642 # Bytes accessed per row activation
190 system.mem_ctrls.bytesPerActivate::stdev 283.497497 # Bytes accessed per row activation
191 system.mem_ctrls.bytesPerActivate::0-127 72 26.57% 26.57% # Bytes accessed per row activation
192 system.mem_ctrls.bytesPerActivate::128-255 83 30.63% 57.20% # Bytes accessed per row activation
193 system.mem_ctrls.bytesPerActivate::256-383 37 13.65% 70.85% # Bytes accessed per row activation
194 system.mem_ctrls.bytesPerActivate::384-511 23 8.49% 79.34% # Bytes accessed per row activation
195 system.mem_ctrls.bytesPerActivate::512-639 21 7.75% 87.08% # Bytes accessed per row activation
196 system.mem_ctrls.bytesPerActivate::640-767 5 1.85% 88.93% # Bytes accessed per row activation
197 system.mem_ctrls.bytesPerActivate::768-895 7 2.58% 91.51% # Bytes accessed per row activation
198 system.mem_ctrls.bytesPerActivate::896-1023 3 1.11% 92.62% # Bytes accessed per row activation
199 system.mem_ctrls.bytesPerActivate::1024-1151 20 7.38% 100.00% # Bytes accessed per row activation
200 system.mem_ctrls.bytesPerActivate::total 271 # Bytes accessed per row activation
201 system.mem_ctrls.rdPerTurnAround::samples 38 # Reads before turning the bus around for writes
202 system.mem_ctrls.rdPerTurnAround::mean 16.289474 # Reads before turning the bus around for writes
203 system.mem_ctrls.rdPerTurnAround::gmean 16.048466 # Reads before turning the bus around for writes
204 system.mem_ctrls.rdPerTurnAround::stdev 3.463383 # Reads before turning the bus around for writes
205 system.mem_ctrls.rdPerTurnAround::12-13 1 2.63% 2.63% # Reads before turning the bus around for writes
206 system.mem_ctrls.rdPerTurnAround::14-15 15 39.47% 42.11% # Reads before turning the bus around for writes
207 system.mem_ctrls.rdPerTurnAround::16-17 16 42.11% 84.21% # Reads before turning the bus around for writes
208 system.mem_ctrls.rdPerTurnAround::18-19 4 10.53% 94.74% # Reads before turning the bus around for writes
209 system.mem_ctrls.rdPerTurnAround::20-21 1 2.63% 97.37% # Reads before turning the bus around for writes
210 system.mem_ctrls.rdPerTurnAround::34-35 1 2.63% 100.00% # Reads before turning the bus around for writes
211 system.mem_ctrls.rdPerTurnAround::total 38 # Reads before turning the bus around for writes
212 system.mem_ctrls.wrPerTurnAround::samples 38 # Writes before turning the bus around for reads
213 system.mem_ctrls.wrPerTurnAround::mean 16.421053 # Writes before turning the bus around for reads
214 system.mem_ctrls.wrPerTurnAround::gmean 16.397539 # Writes before turning the bus around for reads
215 system.mem_ctrls.wrPerTurnAround::stdev 0.919212 # Writes before turning the bus around for reads
216 system.mem_ctrls.wrPerTurnAround::16 31 81.58% 81.58% # Writes before turning the bus around for reads
217 system.mem_ctrls.wrPerTurnAround::18 5 13.16% 94.74% # Writes before turning the bus around for reads
218 system.mem_ctrls.wrPerTurnAround::19 2 5.26% 100.00% # Writes before turning the bus around for reads
219 system.mem_ctrls.wrPerTurnAround::total 38 # Writes before turning the bus around for reads
220 system.mem_ctrls.totQLat 9303 # Total ticks spent queuing
221 system.mem_ctrls.totMemAccLat 21273 # Total ticks spent from burst creation until serviced by the DRAM
222 system.mem_ctrls.totBusLat 3150 # Total ticks spent in databus transfers
223 system.mem_ctrls.avgQLat 14.77 # Average queueing delay per DRAM burst
224 system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst
225 system.mem_ctrls.avgMemAccLat 33.77 # Average memory access latency per DRAM burst
226 system.mem_ctrls.avgRdBW 458.45 # Average DRAM read bandwidth in MiByte/s
227 system.mem_ctrls.avgWrBW 454.09 # Average achieved write bandwidth in MiByte/s
228 system.mem_ctrls.avgRdBWSys 1002.05 # Average system read bandwidth in MiByte/s
229 system.mem_ctrls.avgWrBWSys 999.14 # Average system write bandwidth in MiByte/s
230 system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
231 system.mem_ctrls.busUtil 7.13 # Data bus utilization in percentage
232 system.mem_ctrls.busUtilRead 3.58 # Data bus utilization in percentage for reads
233 system.mem_ctrls.busUtilWrite 3.55 # Data bus utilization in percentage for writes
234 system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing
235 system.mem_ctrls.avgWrQLen 25.04 # Average write queue length when enqueuing
236 system.mem_ctrls.readRowHits 420 # Number of row buffer hits during reads
237 system.mem_ctrls.writeRowHits 556 # Number of row buffer hits during writes
238 system.mem_ctrls.readRowHitRate 66.67 # Row buffer hit rate for reads
239 system.mem_ctrls.writeRowHitRate 85.41 # Row buffer hit rate for writes
240 system.mem_ctrls.avgGap 31.95 # Average gap between requests
241 system.mem_ctrls.pageHitRate 76.19 # Row buffer hit rate, read and write combined
242 system.mem_ctrls_0.actEnergy 657720 # Energy for activate commands per rank (pJ)
243 system.mem_ctrls_0.preEnergy 365400 # Energy for precharge commands per rank (pJ)
244 system.mem_ctrls_0.readEnergy 3407040 # Energy for read commands per rank (pJ)
245 system.mem_ctrls_0.writeEnergy 2623104 # Energy for write commands per rank (pJ)
246 system.mem_ctrls_0.refreshEnergy 5594160 # Energy for refresh commands per rank (pJ)
247 system.mem_ctrls_0.actBackEnergy 51093432 # Energy for active background per rank (pJ)
248 system.mem_ctrls_0.preBackEnergy 6724800 # Energy for precharge background per rank (pJ)
249 system.mem_ctrls_0.totalEnergy 70465656 # Total energy per rank (pJ)
250 system.mem_ctrls_0.averagePower 820.264661 # Core power per rank (mW)
251 system.mem_ctrls_0.memoryStateTime::IDLE 10886 # Time in different power states
252 system.mem_ctrls_0.memoryStateTime::REF 2860 # Time in different power states
253 system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states
254 system.mem_ctrls_0.memoryStateTime::ACT 72174 # Time in different power states
255 system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states
256 system.mem_ctrls_1.actEnergy 1368360 # Energy for activate commands per rank (pJ)
257 system.mem_ctrls_1.preEnergy 760200 # Energy for precharge commands per rank (pJ)
258 system.mem_ctrls_1.readEnergy 4268160 # Energy for read commands per rank (pJ)
259 system.mem_ctrls_1.writeEnergy 3680640 # Energy for write commands per rank (pJ)
260 system.mem_ctrls_1.refreshEnergy 5594160 # Energy for refresh commands per rank (pJ)
261 system.mem_ctrls_1.actBackEnergy 54919728 # Energy for active background per rank (pJ)
262 system.mem_ctrls_1.preBackEnergy 3368400 # Energy for precharge background per rank (pJ)
263 system.mem_ctrls_1.totalEnergy 73959648 # Total energy per rank (pJ)
264 system.mem_ctrls_1.averagePower 860.936931 # Core power per rank (mW)
265 system.mem_ctrls_1.memoryStateTime::IDLE 5575 # Time in different power states
266 system.mem_ctrls_1.memoryStateTime::REF 2860 # Time in different power states
267 system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states
268 system.mem_ctrls_1.memoryStateTime::ACT 77782 # Time in different power states
269 system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states
270 system.cpu.clk_domain.clock 1 # Clock period in ticks
271 system.cpu.apic_clk_domain.clock 16 # Clock period in ticks
272 system.cpu.workload.num_syscalls 11 # Number of system calls
273 system.cpu.numCycles 87948 # number of cpu cycles simulated
274 system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
275 system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
276 system.cpu.committedInsts 5381 # Number of instructions committed
277 system.cpu.committedOps 9748 # Number of ops (including micro ops) committed
278 system.cpu.num_int_alu_accesses 9654 # Number of integer alu accesses
279 system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
280 system.cpu.num_func_calls 209 # number of times a function call or return occured
281 system.cpu.num_conditional_control_insts 899 # number of instructions that are conditional controls
282 system.cpu.num_int_insts 9654 # number of integer instructions
283 system.cpu.num_fp_insts 0 # number of float instructions
284 system.cpu.num_int_register_reads 18335 # number of times the integer registers were read
285 system.cpu.num_int_register_writes 7527 # number of times the integer registers were written
286 system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
287 system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
288 system.cpu.num_cc_register_reads 6487 # number of times the CC registers were read
289 system.cpu.num_cc_register_writes 3536 # number of times the CC registers were written
290 system.cpu.num_mem_refs 1988 # number of memory refs
291 system.cpu.num_load_insts 1053 # Number of load instructions
292 system.cpu.num_store_insts 935 # Number of store instructions
293 system.cpu.num_idle_cycles 0.999989 # Number of idle cycles
294 system.cpu.num_busy_cycles 87947.000011 # Number of busy cycles
295 system.cpu.not_idle_fraction 0.999989 # Percentage of non-idle cycles
296 system.cpu.idle_fraction 0.000011 # Percentage of idle cycles
297 system.cpu.Branches 1208 # Number of branches fetched
298 system.cpu.op_class::No_OpClass 1 0.01% 0.01% # Class of executed instruction
299 system.cpu.op_class::IntAlu 7749 79.49% 79.50% # Class of executed instruction
300 system.cpu.op_class::IntMult 3 0.03% 79.53% # Class of executed instruction
301 system.cpu.op_class::IntDiv 7 0.07% 79.61% # Class of executed instruction
302 system.cpu.op_class::FloatAdd 0 0.00% 79.61% # Class of executed instruction
303 system.cpu.op_class::FloatCmp 0 0.00% 79.61% # Class of executed instruction
304 system.cpu.op_class::FloatCvt 0 0.00% 79.61% # Class of executed instruction
305 system.cpu.op_class::FloatMult 0 0.00% 79.61% # Class of executed instruction
306 system.cpu.op_class::FloatDiv 0 0.00% 79.61% # Class of executed instruction
307 system.cpu.op_class::FloatSqrt 0 0.00% 79.61% # Class of executed instruction
308 system.cpu.op_class::SimdAdd 0 0.00% 79.61% # Class of executed instruction
309 system.cpu.op_class::SimdAddAcc 0 0.00% 79.61% # Class of executed instruction
310 system.cpu.op_class::SimdAlu 0 0.00% 79.61% # Class of executed instruction
311 system.cpu.op_class::SimdCmp 0 0.00% 79.61% # Class of executed instruction
312 system.cpu.op_class::SimdCvt 0 0.00% 79.61% # Class of executed instruction
313 system.cpu.op_class::SimdMisc 0 0.00% 79.61% # Class of executed instruction
314 system.cpu.op_class::SimdMult 0 0.00% 79.61% # Class of executed instruction
315 system.cpu.op_class::SimdMultAcc 0 0.00% 79.61% # Class of executed instruction
316 system.cpu.op_class::SimdShift 0 0.00% 79.61% # Class of executed instruction
317 system.cpu.op_class::SimdShiftAcc 0 0.00% 79.61% # Class of executed instruction
318 system.cpu.op_class::SimdSqrt 0 0.00% 79.61% # Class of executed instruction
319 system.cpu.op_class::SimdFloatAdd 0 0.00% 79.61% # Class of executed instruction
320 system.cpu.op_class::SimdFloatAlu 0 0.00% 79.61% # Class of executed instruction
321 system.cpu.op_class::SimdFloatCmp 0 0.00% 79.61% # Class of executed instruction
322 system.cpu.op_class::SimdFloatCvt 0 0.00% 79.61% # Class of executed instruction
323 system.cpu.op_class::SimdFloatDiv 0 0.00% 79.61% # Class of executed instruction
324 system.cpu.op_class::SimdFloatMisc 0 0.00% 79.61% # Class of executed instruction
325 system.cpu.op_class::SimdFloatMult 0 0.00% 79.61% # Class of executed instruction
326 system.cpu.op_class::SimdFloatMultAcc 0 0.00% 79.61% # Class of executed instruction
327 system.cpu.op_class::SimdFloatSqrt 0 0.00% 79.61% # Class of executed instruction
328 system.cpu.op_class::MemRead 1053 10.80% 90.41% # Class of executed instruction
329 system.cpu.op_class::MemWrite 935 9.59% 100.00% # Class of executed instruction
330 system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
331 system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
332 system.cpu.op_class::total 9748 # Class of executed instruction
333 system.ruby.clk_domain.clock 1 # Clock period in ticks
334 system.ruby.delayHist::bucket_size 1 # delay histogram for all message
335 system.ruby.delayHist::max_bucket 9 # delay histogram for all message
336 system.ruby.delayHist::samples 2750 # delay histogram for all message
337 system.ruby.delayHist | 2750 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for all message
338 system.ruby.delayHist::total 2750 # delay histogram for all message
339 system.ruby.outstanding_req_hist::bucket_size 1
340 system.ruby.outstanding_req_hist::max_bucket 9
341 system.ruby.outstanding_req_hist::samples 8852
342 system.ruby.outstanding_req_hist::mean 1
343 system.ruby.outstanding_req_hist::gmean 1
344 system.ruby.outstanding_req_hist | 0 0.00% 0.00% | 8852 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
345 system.ruby.outstanding_req_hist::total 8852
346 system.ruby.latency_hist::bucket_size 64
347 system.ruby.latency_hist::max_bucket 639
348 system.ruby.latency_hist::samples 8852
349 system.ruby.latency_hist::mean 8.935382
350 system.ruby.latency_hist::gmean 1.815175
351 system.ruby.latency_hist::stdev 22.675647
352 system.ruby.latency_hist | 8624 97.42% 97.42% | 191 2.16% 99.58% | 24 0.27% 99.85% | 5 0.06% 99.91% | 2 0.02% 99.93% | 6 0.07% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
353 system.ruby.latency_hist::total 8852
354 system.ruby.hit_latency_hist::bucket_size 1
355 system.ruby.hit_latency_hist::max_bucket 9
356 system.ruby.hit_latency_hist::samples 7475
357 system.ruby.hit_latency_hist::mean 1
358 system.ruby.hit_latency_hist::gmean 1
359 system.ruby.hit_latency_hist | 0 0.00% 0.00% | 7475 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
360 system.ruby.hit_latency_hist::total 7475
361 system.ruby.miss_latency_hist::bucket_size 64
362 system.ruby.miss_latency_hist::max_bucket 639
363 system.ruby.miss_latency_hist::samples 1377
364 system.ruby.miss_latency_hist::mean 52.012346
365 system.ruby.miss_latency_hist::gmean 46.179478
366 system.ruby.miss_latency_hist::stdev 33.292581
367 system.ruby.miss_latency_hist | 1149 83.44% 83.44% | 191 13.87% 97.31% | 24 1.74% 99.06% | 5 0.36% 99.42% | 2 0.15% 99.56% | 6 0.44% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
368 system.ruby.miss_latency_hist::total 1377
369 system.ruby.Directory.incomplete_times 1376
370 system.ruby.l1_cntrl0.cacheMemory.demand_hits 7475 # Number of cache demand hits
371 system.ruby.l1_cntrl0.cacheMemory.demand_misses 1377 # Number of cache demand misses
372 system.ruby.l1_cntrl0.cacheMemory.demand_accesses 8852 # Number of cache demand accesses
373 system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks
374 system.ruby.network.routers0.percent_links_utilized 7.817119
375 system.ruby.network.routers0.msg_count.Control::2 1377
376 system.ruby.network.routers0.msg_count.Data::2 1373
377 system.ruby.network.routers0.msg_count.Response_Data::4 1377
378 system.ruby.network.routers0.msg_count.Writeback_Control::3 1373
379 system.ruby.network.routers0.msg_bytes.Control::2 11016
380 system.ruby.network.routers0.msg_bytes.Data::2 98856
381 system.ruby.network.routers0.msg_bytes.Response_Data::4 99144
382 system.ruby.network.routers0.msg_bytes.Writeback_Control::3 10984
383 system.ruby.network.routers1.percent_links_utilized 7.817119
384 system.ruby.network.routers1.msg_count.Control::2 1377
385 system.ruby.network.routers1.msg_count.Data::2 1373
386 system.ruby.network.routers1.msg_count.Response_Data::4 1377
387 system.ruby.network.routers1.msg_count.Writeback_Control::3 1373
388 system.ruby.network.routers1.msg_bytes.Control::2 11016
389 system.ruby.network.routers1.msg_bytes.Data::2 98856
390 system.ruby.network.routers1.msg_bytes.Response_Data::4 99144
391 system.ruby.network.routers1.msg_bytes.Writeback_Control::3 10984
392 system.ruby.network.routers2.percent_links_utilized 7.817119
393 system.ruby.network.routers2.msg_count.Control::2 1377
394 system.ruby.network.routers2.msg_count.Data::2 1373
395 system.ruby.network.routers2.msg_count.Response_Data::4 1377
396 system.ruby.network.routers2.msg_count.Writeback_Control::3 1373
397 system.ruby.network.routers2.msg_bytes.Control::2 11016
398 system.ruby.network.routers2.msg_bytes.Data::2 98856
399 system.ruby.network.routers2.msg_bytes.Response_Data::4 99144
400 system.ruby.network.routers2.msg_bytes.Writeback_Control::3 10984
401 system.ruby.network.msg_count.Control 4131
402 system.ruby.network.msg_count.Data 4119
403 system.ruby.network.msg_count.Response_Data 4131
404 system.ruby.network.msg_count.Writeback_Control 4119
405 system.ruby.network.msg_byte.Control 33048
406 system.ruby.network.msg_byte.Data 296568
407 system.ruby.network.msg_byte.Response_Data 297432
408 system.ruby.network.msg_byte.Writeback_Control 32952
409 system.ruby.network.routers0.throttle0.link_utilization 7.826215
410 system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1377
411 system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 1373
412 system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 99144
413 system.ruby.network.routers0.throttle0.msg_bytes.Writeback_Control::3 10984
414 system.ruby.network.routers0.throttle1.link_utilization 7.808023
415 system.ruby.network.routers0.throttle1.msg_count.Control::2 1377
416 system.ruby.network.routers0.throttle1.msg_count.Data::2 1373
417 system.ruby.network.routers0.throttle1.msg_bytes.Control::2 11016
418 system.ruby.network.routers0.throttle1.msg_bytes.Data::2 98856
419 system.ruby.network.routers1.throttle0.link_utilization 7.808023
420 system.ruby.network.routers1.throttle0.msg_count.Control::2 1377
421 system.ruby.network.routers1.throttle0.msg_count.Data::2 1373
422 system.ruby.network.routers1.throttle0.msg_bytes.Control::2 11016
423 system.ruby.network.routers1.throttle0.msg_bytes.Data::2 98856
424 system.ruby.network.routers1.throttle1.link_utilization 7.826215
425 system.ruby.network.routers1.throttle1.msg_count.Response_Data::4 1377
426 system.ruby.network.routers1.throttle1.msg_count.Writeback_Control::3 1373
427 system.ruby.network.routers1.throttle1.msg_bytes.Response_Data::4 99144
428 system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::3 10984
429 system.ruby.network.routers2.throttle0.link_utilization 7.826215
430 system.ruby.network.routers2.throttle0.msg_count.Response_Data::4 1377
431 system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::3 1373
432 system.ruby.network.routers2.throttle0.msg_bytes.Response_Data::4 99144
433 system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::3 10984
434 system.ruby.network.routers2.throttle1.link_utilization 7.808023
435 system.ruby.network.routers2.throttle1.msg_count.Control::2 1377
436 system.ruby.network.routers2.throttle1.msg_count.Data::2 1373
437 system.ruby.network.routers2.throttle1.msg_bytes.Control::2 11016
438 system.ruby.network.routers2.throttle1.msg_bytes.Data::2 98856
439 system.ruby.delayVCHist.vnet_1::bucket_size 1 # delay histogram for vnet_1
440 system.ruby.delayVCHist.vnet_1::max_bucket 9 # delay histogram for vnet_1
441 system.ruby.delayVCHist.vnet_1::samples 1377 # delay histogram for vnet_1
442 system.ruby.delayVCHist.vnet_1 | 1377 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_1
443 system.ruby.delayVCHist.vnet_1::total 1377 # delay histogram for vnet_1
444 system.ruby.delayVCHist.vnet_2::bucket_size 1 # delay histogram for vnet_2
445 system.ruby.delayVCHist.vnet_2::max_bucket 9 # delay histogram for vnet_2
446 system.ruby.delayVCHist.vnet_2::samples 1373 # delay histogram for vnet_2
447 system.ruby.delayVCHist.vnet_2 | 1373 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% # delay histogram for vnet_2
448 system.ruby.delayVCHist.vnet_2::total 1373 # delay histogram for vnet_2
449 system.ruby.LD.latency_hist::bucket_size 32
450 system.ruby.LD.latency_hist::max_bucket 319
451 system.ruby.LD.latency_hist::samples 1045
452 system.ruby.LD.latency_hist::mean 22.607656
453 system.ruby.LD.latency_hist::gmean 5.952637
454 system.ruby.LD.latency_hist::stdev 28.358291
455 system.ruby.LD.latency_hist | 546 52.25% 52.25% | 420 40.19% 92.44% | 70 6.70% 99.14% | 2 0.19% 99.33% | 2 0.19% 99.52% | 4 0.38% 99.90% | 0 0.00% 99.90% | 1 0.10% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
456 system.ruby.LD.latency_hist::total 1045
457 system.ruby.LD.hit_latency_hist::bucket_size 1
458 system.ruby.LD.hit_latency_hist::max_bucket 9
459 system.ruby.LD.hit_latency_hist::samples 546
460 system.ruby.LD.hit_latency_hist::mean 1
461 system.ruby.LD.hit_latency_hist::gmean 1
462 system.ruby.LD.hit_latency_hist | 0 0.00% 0.00% | 546 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
463 system.ruby.LD.hit_latency_hist::total 546
464 system.ruby.LD.miss_latency_hist::bucket_size 32
465 system.ruby.LD.miss_latency_hist::max_bucket 319
466 system.ruby.LD.miss_latency_hist::samples 499
467 system.ruby.LD.miss_latency_hist::mean 46.250501
468 system.ruby.LD.miss_latency_hist::gmean 41.916728
469 system.ruby.LD.miss_latency_hist::stdev 24.776985
470 system.ruby.LD.miss_latency_hist | 0 0.00% 0.00% | 420 84.17% 84.17% | 70 14.03% 98.20% | 2 0.40% 98.60% | 2 0.40% 99.00% | 4 0.80% 99.80% | 0 0.00% 99.80% | 1 0.20% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
471 system.ruby.LD.miss_latency_hist::total 499
472 system.ruby.ST.latency_hist::bucket_size 64
473 system.ruby.ST.latency_hist::max_bucket 639
474 system.ruby.ST.latency_hist::samples 935
475 system.ruby.ST.latency_hist::mean 15.124064
476 system.ruby.ST.latency_hist::gmean 2.829099
477 system.ruby.ST.latency_hist::stdev 31.003309
478 system.ruby.ST.latency_hist | 897 95.94% 95.94% | 28 2.99% 98.93% | 5 0.53% 99.47% | 3 0.32% 99.79% | 0 0.00% 99.79% | 2 0.21% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
479 system.ruby.ST.latency_hist::total 935
480 system.ruby.ST.hit_latency_hist::bucket_size 1
481 system.ruby.ST.hit_latency_hist::max_bucket 9
482 system.ruby.ST.hit_latency_hist::samples 681
483 system.ruby.ST.hit_latency_hist::mean 1
484 system.ruby.ST.hit_latency_hist::gmean 1
485 system.ruby.ST.hit_latency_hist | 0 0.00% 0.00% | 681 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
486 system.ruby.ST.hit_latency_hist::total 681
487 system.ruby.ST.miss_latency_hist::bucket_size 64
488 system.ruby.ST.miss_latency_hist::max_bucket 639
489 system.ruby.ST.miss_latency_hist::samples 254
490 system.ruby.ST.miss_latency_hist::mean 52.992126
491 system.ruby.ST.miss_latency_hist::gmean 45.979346
492 system.ruby.ST.miss_latency_hist::stdev 39.646660
493 system.ruby.ST.miss_latency_hist | 216 85.04% 85.04% | 28 11.02% 96.06% | 5 1.97% 98.03% | 3 1.18% 99.21% | 0 0.00% 99.21% | 2 0.79% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
494 system.ruby.ST.miss_latency_hist::total 254
495 system.ruby.IFETCH.latency_hist::bucket_size 64
496 system.ruby.IFETCH.latency_hist::max_bucket 639
497 system.ruby.IFETCH.latency_hist::samples 6864
498 system.ruby.IFETCH.latency_hist::mean 6.015589
499 system.ruby.IFETCH.latency_hist::gmean 1.426336
500 system.ruby.IFETCH.latency_hist::stdev 19.173758
501 system.ruby.IFETCH.latency_hist | 6753 98.38% 98.38% | 91 1.33% 99.71% | 13 0.19% 99.90% | 1 0.01% 99.91% | 2 0.03% 99.94% | 4 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
502 system.ruby.IFETCH.latency_hist::total 6864
503 system.ruby.IFETCH.hit_latency_hist::bucket_size 1
504 system.ruby.IFETCH.hit_latency_hist::max_bucket 9
505 system.ruby.IFETCH.hit_latency_hist::samples 6241
506 system.ruby.IFETCH.hit_latency_hist::mean 1
507 system.ruby.IFETCH.hit_latency_hist::gmean 1
508 system.ruby.IFETCH.hit_latency_hist | 0 0.00% 0.00% | 6241 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
509 system.ruby.IFETCH.hit_latency_hist::total 6241
510 system.ruby.IFETCH.miss_latency_hist::bucket_size 64
511 system.ruby.IFETCH.miss_latency_hist::max_bucket 639
512 system.ruby.IFETCH.miss_latency_hist::samples 623
513 system.ruby.IFETCH.miss_latency_hist::mean 56.260032
514 system.ruby.IFETCH.miss_latency_hist::gmean 50.022291
515 system.ruby.IFETCH.miss_latency_hist::stdev 35.712767
516 system.ruby.IFETCH.miss_latency_hist | 512 82.18% 82.18% | 91 14.61% 96.79% | 13 2.09% 98.88% | 1 0.16% 99.04% | 2 0.32% 99.36% | 4 0.64% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
517 system.ruby.IFETCH.miss_latency_hist::total 623
518 system.ruby.RMW_Read.latency_hist::bucket_size 4
519 system.ruby.RMW_Read.latency_hist::max_bucket 39
520 system.ruby.RMW_Read.latency_hist::samples 8
521 system.ruby.RMW_Read.latency_hist::mean 4.875000
522 system.ruby.RMW_Read.latency_hist::gmean 1.542211
523 system.ruby.RMW_Read.latency_hist::stdev 10.960155
524 system.ruby.RMW_Read.latency_hist | 7 87.50% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 0 0.00% 87.50% | 1 12.50% 100.00% | 0 0.00% 100.00%
525 system.ruby.RMW_Read.latency_hist::total 8
526 system.ruby.RMW_Read.hit_latency_hist::bucket_size 1
527 system.ruby.RMW_Read.hit_latency_hist::max_bucket 9
528 system.ruby.RMW_Read.hit_latency_hist::samples 7
529 system.ruby.RMW_Read.hit_latency_hist::mean 1
530 system.ruby.RMW_Read.hit_latency_hist::gmean 1
531 system.ruby.RMW_Read.hit_latency_hist | 0 0.00% 0.00% | 7 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
532 system.ruby.RMW_Read.hit_latency_hist::total 7
533 system.ruby.RMW_Read.miss_latency_hist::bucket_size 4
534 system.ruby.RMW_Read.miss_latency_hist::max_bucket 39
535 system.ruby.RMW_Read.miss_latency_hist::samples 1
536 system.ruby.RMW_Read.miss_latency_hist::mean 32
537 system.ruby.RMW_Read.miss_latency_hist::gmean 32
538 system.ruby.RMW_Read.miss_latency_hist::stdev nan
539 system.ruby.RMW_Read.miss_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00%
540 system.ruby.RMW_Read.miss_latency_hist::total 1
541 system.ruby.Directory.miss_mach_latency_hist::bucket_size 64
542 system.ruby.Directory.miss_mach_latency_hist::max_bucket 639
543 system.ruby.Directory.miss_mach_latency_hist::samples 1377
544 system.ruby.Directory.miss_mach_latency_hist::mean 52.012346
545 system.ruby.Directory.miss_mach_latency_hist::gmean 46.179478
546 system.ruby.Directory.miss_mach_latency_hist::stdev 33.292581
547 system.ruby.Directory.miss_mach_latency_hist | 1149 83.44% 83.44% | 191 13.87% 97.31% | 24 1.74% 99.06% | 5 0.36% 99.42% | 2 0.15% 99.56% | 6 0.44% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
548 system.ruby.Directory.miss_mach_latency_hist::total 1377
549 system.ruby.Directory.miss_latency_hist.issue_to_initial_request::bucket_size 1
550 system.ruby.Directory.miss_latency_hist.issue_to_initial_request::max_bucket 9
551 system.ruby.Directory.miss_latency_hist.issue_to_initial_request::samples 1
552 system.ruby.Directory.miss_latency_hist.issue_to_initial_request::stdev nan
553 system.ruby.Directory.miss_latency_hist.issue_to_initial_request | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
554 system.ruby.Directory.miss_latency_hist.issue_to_initial_request::total 1
555 system.ruby.Directory.miss_latency_hist.initial_to_forward::bucket_size 1
556 system.ruby.Directory.miss_latency_hist.initial_to_forward::max_bucket 9
557 system.ruby.Directory.miss_latency_hist.initial_to_forward::samples 1
558 system.ruby.Directory.miss_latency_hist.initial_to_forward::stdev nan
559 system.ruby.Directory.miss_latency_hist.initial_to_forward | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
560 system.ruby.Directory.miss_latency_hist.initial_to_forward::total 1
561 system.ruby.Directory.miss_latency_hist.forward_to_first_response::bucket_size 1
562 system.ruby.Directory.miss_latency_hist.forward_to_first_response::max_bucket 9
563 system.ruby.Directory.miss_latency_hist.forward_to_first_response::samples 1
564 system.ruby.Directory.miss_latency_hist.forward_to_first_response::stdev nan
565 system.ruby.Directory.miss_latency_hist.forward_to_first_response | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
566 system.ruby.Directory.miss_latency_hist.forward_to_first_response::total 1
567 system.ruby.Directory.miss_latency_hist.first_response_to_completion::bucket_size 8
568 system.ruby.Directory.miss_latency_hist.first_response_to_completion::max_bucket 79
569 system.ruby.Directory.miss_latency_hist.first_response_to_completion::samples 1
570 system.ruby.Directory.miss_latency_hist.first_response_to_completion::mean 75
571 system.ruby.Directory.miss_latency_hist.first_response_to_completion::gmean 75.000000
572 system.ruby.Directory.miss_latency_hist.first_response_to_completion::stdev nan
573 system.ruby.Directory.miss_latency_hist.first_response_to_completion | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00%
574 system.ruby.Directory.miss_latency_hist.first_response_to_completion::total 1
575 system.ruby.LD.Directory.miss_type_mach_latency_hist::bucket_size 32
576 system.ruby.LD.Directory.miss_type_mach_latency_hist::max_bucket 319
577 system.ruby.LD.Directory.miss_type_mach_latency_hist::samples 499
578 system.ruby.LD.Directory.miss_type_mach_latency_hist::mean 46.250501
579 system.ruby.LD.Directory.miss_type_mach_latency_hist::gmean 41.916728
580 system.ruby.LD.Directory.miss_type_mach_latency_hist::stdev 24.776985
581 system.ruby.LD.Directory.miss_type_mach_latency_hist | 0 0.00% 0.00% | 420 84.17% 84.17% | 70 14.03% 98.20% | 2 0.40% 98.60% | 2 0.40% 99.00% | 4 0.80% 99.80% | 0 0.00% 99.80% | 1 0.20% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
582 system.ruby.LD.Directory.miss_type_mach_latency_hist::total 499
583 system.ruby.ST.Directory.miss_type_mach_latency_hist::bucket_size 64
584 system.ruby.ST.Directory.miss_type_mach_latency_hist::max_bucket 639
585 system.ruby.ST.Directory.miss_type_mach_latency_hist::samples 254
586 system.ruby.ST.Directory.miss_type_mach_latency_hist::mean 52.992126
587 system.ruby.ST.Directory.miss_type_mach_latency_hist::gmean 45.979346
588 system.ruby.ST.Directory.miss_type_mach_latency_hist::stdev 39.646660
589 system.ruby.ST.Directory.miss_type_mach_latency_hist | 216 85.04% 85.04% | 28 11.02% 96.06% | 5 1.97% 98.03% | 3 1.18% 99.21% | 0 0.00% 99.21% | 2 0.79% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
590 system.ruby.ST.Directory.miss_type_mach_latency_hist::total 254
591 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::bucket_size 64
592 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::max_bucket 639
593 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::samples 623
594 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::mean 56.260032
595 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::gmean 50.022291
596 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::stdev 35.712767
597 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist | 512 82.18% 82.18% | 91 14.61% 96.79% | 13 2.09% 98.88% | 1 0.16% 99.04% | 2 0.32% 99.36% | 4 0.64% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
598 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::total 623
599 system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::bucket_size 4
600 system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::max_bucket 39
601 system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::samples 1
602 system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::mean 32
603 system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::gmean 32
604 system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::stdev nan
605 system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00%
606 system.ruby.RMW_Read.Directory.miss_type_mach_latency_hist::total 1
607 system.ruby.Directory_Controller.GETX 1377 0.00% 0.00%
608 system.ruby.Directory_Controller.PUTX 1373 0.00% 0.00%
609 system.ruby.Directory_Controller.Memory_Data 1377 0.00% 0.00%
610 system.ruby.Directory_Controller.Memory_Ack 1373 0.00% 0.00%
611 system.ruby.Directory_Controller.I.GETX 1377 0.00% 0.00%
612 system.ruby.Directory_Controller.M.PUTX 1373 0.00% 0.00%
613 system.ruby.Directory_Controller.IM.Memory_Data 1377 0.00% 0.00%
614 system.ruby.Directory_Controller.MI.Memory_Ack 1373 0.00% 0.00%
615 system.ruby.L1Cache_Controller.Load 1045 0.00% 0.00%
616 system.ruby.L1Cache_Controller.Ifetch 6864 0.00% 0.00%
617 system.ruby.L1Cache_Controller.Store 943 0.00% 0.00%
618 system.ruby.L1Cache_Controller.Data 1377 0.00% 0.00%
619 system.ruby.L1Cache_Controller.Replacement 1373 0.00% 0.00%
620 system.ruby.L1Cache_Controller.Writeback_Ack 1373 0.00% 0.00%
621 system.ruby.L1Cache_Controller.I.Load 499 0.00% 0.00%
622 system.ruby.L1Cache_Controller.I.Ifetch 623 0.00% 0.00%
623 system.ruby.L1Cache_Controller.I.Store 255 0.00% 0.00%
624 system.ruby.L1Cache_Controller.M.Load 546 0.00% 0.00%
625 system.ruby.L1Cache_Controller.M.Ifetch 6241 0.00% 0.00%
626 system.ruby.L1Cache_Controller.M.Store 688 0.00% 0.00%
627 system.ruby.L1Cache_Controller.M.Replacement 1373 0.00% 0.00%
628 system.ruby.L1Cache_Controller.MI.Writeback_Ack 1373 0.00% 0.00%
629 system.ruby.L1Cache_Controller.IS.Data 1122 0.00% 0.00%
630 system.ruby.L1Cache_Controller.IM.Data 255 0.00% 0.00%
632 ---------- End Simulation Statistics ----------
projects / gem5.git / blob