1 Redirecting stdout to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/o3-timing/simout
2 Redirecting stderr to build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/o3-timing/simerr
3 gem5 Simulator System. http://gem5.org
4 gem5 is copyrighted software; use the --copyright option for details.
6 gem5 compiled Jul 13 2017 17:09:45
7 gem5 started Jul 13 2017 17:25:07
8 gem5 executing on boldrock, pid 6007
9 command line: /home/ar4jc/gem5/build/RISCV/gem5.opt -d build/RISCV/tests/opt/quick/se/02.insttest/riscv/linux-rv64c/o3-timing --stats-file 'text://stats.txt?desc=False' -re /home/ar4jc/gem5/tests/testing/../run.py quick/se/02.insttest/riscv/linux-rv64c/o3-timing
11 Global frequency set at 1000000000000 ticks per second
29 c.beqz, not zero: PASS
30 c.bnez, not zero: PASS
33 c.li, sign extend: PASS
37 c.addiw, overflow: PASS
38 c.addiw, truncate: PASS
42 c.slli, overflow: PASS
44 c.srli, overflow: PASS
47 c.srai, overflow: PASS
61 c.addw, overflow: PASS
62 c.addw, truncate: PASS
64 c.subw, "overflow": PASS
65 c.subw, truncate: PASS
66 Exiting @ tick 141034000 because exiting with last active thread context