2 ---------- Begin Simulation Statistics ----------
3 sim_seconds 0.000663 # Number of seconds simulated
4 sim_ticks 663454500 # Number of ticks simulated
5 final_tick 663454500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6 sim_freq 1000000000000 # Frequency of simulated ticks
7 host_inst_rate 74039 # Simulator instruction rate (inst/s)
8 host_op_rate 152254 # Simulator op (including micro ops) rate (op/s)
9 host_tick_rate 733530611 # Simulator tick rate (ticks/s)
10 host_mem_usage 1301780 # Number of bytes of host memory used
11 host_seconds 0.90 # Real time elapsed on the host
12 sim_insts 66963 # Number of instructions simulated
13 sim_ops 137705 # Number of ops (including micro ops) simulated
14 system.voltage_domain.voltage 1 # Voltage in Volts
15 system.clk_domain.clock 1000 # Clock period in ticks
16 system.mem_ctrls.bytes_read::dir_cntrl0 99264 # Number of bytes read from this memory
17 system.mem_ctrls.bytes_read::total 99264 # Number of bytes read from this memory
18 system.mem_ctrls.num_reads::dir_cntrl0 1551 # Number of read requests responded to by this memory
19 system.mem_ctrls.num_reads::total 1551 # Number of read requests responded to by this memory
20 system.mem_ctrls.bw_read::dir_cntrl0 149616892 # Total read bandwidth from this memory (bytes/s)
21 system.mem_ctrls.bw_read::total 149616892 # Total read bandwidth from this memory (bytes/s)
22 system.mem_ctrls.bw_total::dir_cntrl0 149616892 # Total bandwidth to/from this memory (bytes/s)
23 system.mem_ctrls.bw_total::total 149616892 # Total bandwidth to/from this memory (bytes/s)
24 system.mem_ctrls.readReqs 1551 # Number of read requests accepted
25 system.mem_ctrls.writeReqs 0 # Number of write requests accepted
26 system.mem_ctrls.readBursts 1551 # Number of DRAM read bursts, including those serviced by the write queue
27 system.mem_ctrls.writeBursts 0 # Number of DRAM write bursts, including those merged in the write queue
28 system.mem_ctrls.bytesReadDRAM 99264 # Total number of bytes read from DRAM
29 system.mem_ctrls.bytesReadWrQ 0 # Total number of bytes read from write queue
30 system.mem_ctrls.bytesWritten 0 # Total number of bytes written to DRAM
31 system.mem_ctrls.bytesReadSys 99264 # Total read bytes from the system interface side
32 system.mem_ctrls.bytesWrittenSys 0 # Total written bytes from the system interface side
33 system.mem_ctrls.servicedByWrQ 0 # Number of DRAM read bursts serviced by the write queue
34 system.mem_ctrls.mergedWrBursts 0 # Number of DRAM write bursts merged with an existing one
35 system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write
36 system.mem_ctrls.perBankRdBursts::0 122 # Per bank write bursts
37 system.mem_ctrls.perBankRdBursts::1 192 # Per bank write bursts
38 system.mem_ctrls.perBankRdBursts::2 93 # Per bank write bursts
39 system.mem_ctrls.perBankRdBursts::3 44 # Per bank write bursts
40 system.mem_ctrls.perBankRdBursts::4 61 # Per bank write bursts
41 system.mem_ctrls.perBankRdBursts::5 79 # Per bank write bursts
42 system.mem_ctrls.perBankRdBursts::6 52 # Per bank write bursts
43 system.mem_ctrls.perBankRdBursts::7 42 # Per bank write bursts
44 system.mem_ctrls.perBankRdBursts::8 54 # Per bank write bursts
45 system.mem_ctrls.perBankRdBursts::9 56 # Per bank write bursts
46 system.mem_ctrls.perBankRdBursts::10 174 # Per bank write bursts
47 system.mem_ctrls.perBankRdBursts::11 90 # Per bank write bursts
48 system.mem_ctrls.perBankRdBursts::12 222 # Per bank write bursts
49 system.mem_ctrls.perBankRdBursts::13 125 # Per bank write bursts
50 system.mem_ctrls.perBankRdBursts::14 51 # Per bank write bursts
51 system.mem_ctrls.perBankRdBursts::15 94 # Per bank write bursts
52 system.mem_ctrls.perBankWrBursts::0 0 # Per bank write bursts
53 system.mem_ctrls.perBankWrBursts::1 0 # Per bank write bursts
54 system.mem_ctrls.perBankWrBursts::2 0 # Per bank write bursts
55 system.mem_ctrls.perBankWrBursts::3 0 # Per bank write bursts
56 system.mem_ctrls.perBankWrBursts::4 0 # Per bank write bursts
57 system.mem_ctrls.perBankWrBursts::5 0 # Per bank write bursts
58 system.mem_ctrls.perBankWrBursts::6 0 # Per bank write bursts
59 system.mem_ctrls.perBankWrBursts::7 0 # Per bank write bursts
60 system.mem_ctrls.perBankWrBursts::8 0 # Per bank write bursts
61 system.mem_ctrls.perBankWrBursts::9 0 # Per bank write bursts
62 system.mem_ctrls.perBankWrBursts::10 0 # Per bank write bursts
63 system.mem_ctrls.perBankWrBursts::11 0 # Per bank write bursts
64 system.mem_ctrls.perBankWrBursts::12 0 # Per bank write bursts
65 system.mem_ctrls.perBankWrBursts::13 0 # Per bank write bursts
66 system.mem_ctrls.perBankWrBursts::14 0 # Per bank write bursts
67 system.mem_ctrls.perBankWrBursts::15 0 # Per bank write bursts
68 system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry
69 system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry
70 system.mem_ctrls.totGap 663221000 # Total gap between requests
71 system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2)
72 system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2)
73 system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2)
74 system.mem_ctrls.readPktSize::3 0 # Read request sizes (log2)
75 system.mem_ctrls.readPktSize::4 0 # Read request sizes (log2)
76 system.mem_ctrls.readPktSize::5 0 # Read request sizes (log2)
77 system.mem_ctrls.readPktSize::6 1551 # Read request sizes (log2)
78 system.mem_ctrls.writePktSize::0 0 # Write request sizes (log2)
79 system.mem_ctrls.writePktSize::1 0 # Write request sizes (log2)
80 system.mem_ctrls.writePktSize::2 0 # Write request sizes (log2)
81 system.mem_ctrls.writePktSize::3 0 # Write request sizes (log2)
82 system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2)
83 system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2)
84 system.mem_ctrls.writePktSize::6 0 # Write request sizes (log2)
85 system.mem_ctrls.rdQLenPdf::0 1542 # What read queue length does an incoming req see
86 system.mem_ctrls.rdQLenPdf::1 2 # What read queue length does an incoming req see
87 system.mem_ctrls.rdQLenPdf::2 1 # What read queue length does an incoming req see
88 system.mem_ctrls.rdQLenPdf::3 1 # What read queue length does an incoming req see
89 system.mem_ctrls.rdQLenPdf::4 2 # What read queue length does an incoming req see
90 system.mem_ctrls.rdQLenPdf::5 3 # What read queue length does an incoming req see
91 system.mem_ctrls.rdQLenPdf::6 0 # What read queue length does an incoming req see
92 system.mem_ctrls.rdQLenPdf::7 0 # What read queue length does an incoming req see
93 system.mem_ctrls.rdQLenPdf::8 0 # What read queue length does an incoming req see
94 system.mem_ctrls.rdQLenPdf::9 0 # What read queue length does an incoming req see
95 system.mem_ctrls.rdQLenPdf::10 0 # What read queue length does an incoming req see
96 system.mem_ctrls.rdQLenPdf::11 0 # What read queue length does an incoming req see
97 system.mem_ctrls.rdQLenPdf::12 0 # What read queue length does an incoming req see
98 system.mem_ctrls.rdQLenPdf::13 0 # What read queue length does an incoming req see
99 system.mem_ctrls.rdQLenPdf::14 0 # What read queue length does an incoming req see
100 system.mem_ctrls.rdQLenPdf::15 0 # What read queue length does an incoming req see
101 system.mem_ctrls.rdQLenPdf::16 0 # What read queue length does an incoming req see
102 system.mem_ctrls.rdQLenPdf::17 0 # What read queue length does an incoming req see
103 system.mem_ctrls.rdQLenPdf::18 0 # What read queue length does an incoming req see
104 system.mem_ctrls.rdQLenPdf::19 0 # What read queue length does an incoming req see
105 system.mem_ctrls.rdQLenPdf::20 0 # What read queue length does an incoming req see
106 system.mem_ctrls.rdQLenPdf::21 0 # What read queue length does an incoming req see
107 system.mem_ctrls.rdQLenPdf::22 0 # What read queue length does an incoming req see
108 system.mem_ctrls.rdQLenPdf::23 0 # What read queue length does an incoming req see
109 system.mem_ctrls.rdQLenPdf::24 0 # What read queue length does an incoming req see
110 system.mem_ctrls.rdQLenPdf::25 0 # What read queue length does an incoming req see
111 system.mem_ctrls.rdQLenPdf::26 0 # What read queue length does an incoming req see
112 system.mem_ctrls.rdQLenPdf::27 0 # What read queue length does an incoming req see
113 system.mem_ctrls.rdQLenPdf::28 0 # What read queue length does an incoming req see
114 system.mem_ctrls.rdQLenPdf::29 0 # What read queue length does an incoming req see
115 system.mem_ctrls.rdQLenPdf::30 0 # What read queue length does an incoming req see
116 system.mem_ctrls.rdQLenPdf::31 0 # What read queue length does an incoming req see
117 system.mem_ctrls.wrQLenPdf::0 0 # What write queue length does an incoming req see
118 system.mem_ctrls.wrQLenPdf::1 0 # What write queue length does an incoming req see
119 system.mem_ctrls.wrQLenPdf::2 0 # What write queue length does an incoming req see
120 system.mem_ctrls.wrQLenPdf::3 0 # What write queue length does an incoming req see
121 system.mem_ctrls.wrQLenPdf::4 0 # What write queue length does an incoming req see
122 system.mem_ctrls.wrQLenPdf::5 0 # What write queue length does an incoming req see
123 system.mem_ctrls.wrQLenPdf::6 0 # What write queue length does an incoming req see
124 system.mem_ctrls.wrQLenPdf::7 0 # What write queue length does an incoming req see
125 system.mem_ctrls.wrQLenPdf::8 0 # What write queue length does an incoming req see
126 system.mem_ctrls.wrQLenPdf::9 0 # What write queue length does an incoming req see
127 system.mem_ctrls.wrQLenPdf::10 0 # What write queue length does an incoming req see
128 system.mem_ctrls.wrQLenPdf::11 0 # What write queue length does an incoming req see
129 system.mem_ctrls.wrQLenPdf::12 0 # What write queue length does an incoming req see
130 system.mem_ctrls.wrQLenPdf::13 0 # What write queue length does an incoming req see
131 system.mem_ctrls.wrQLenPdf::14 0 # What write queue length does an incoming req see
132 system.mem_ctrls.wrQLenPdf::15 0 # What write queue length does an incoming req see
133 system.mem_ctrls.wrQLenPdf::16 0 # What write queue length does an incoming req see
134 system.mem_ctrls.wrQLenPdf::17 0 # What write queue length does an incoming req see
135 system.mem_ctrls.wrQLenPdf::18 0 # What write queue length does an incoming req see
136 system.mem_ctrls.wrQLenPdf::19 0 # What write queue length does an incoming req see
137 system.mem_ctrls.wrQLenPdf::20 0 # What write queue length does an incoming req see
138 system.mem_ctrls.wrQLenPdf::21 0 # What write queue length does an incoming req see
139 system.mem_ctrls.wrQLenPdf::22 0 # What write queue length does an incoming req see
140 system.mem_ctrls.wrQLenPdf::23 0 # What write queue length does an incoming req see
141 system.mem_ctrls.wrQLenPdf::24 0 # What write queue length does an incoming req see
142 system.mem_ctrls.wrQLenPdf::25 0 # What write queue length does an incoming req see
143 system.mem_ctrls.wrQLenPdf::26 0 # What write queue length does an incoming req see
144 system.mem_ctrls.wrQLenPdf::27 0 # What write queue length does an incoming req see
145 system.mem_ctrls.wrQLenPdf::28 0 # What write queue length does an incoming req see
146 system.mem_ctrls.wrQLenPdf::29 0 # What write queue length does an incoming req see
147 system.mem_ctrls.wrQLenPdf::30 0 # What write queue length does an incoming req see
148 system.mem_ctrls.wrQLenPdf::31 0 # What write queue length does an incoming req see
149 system.mem_ctrls.wrQLenPdf::32 0 # What write queue length does an incoming req see
150 system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see
151 system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see
152 system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see
153 system.mem_ctrls.wrQLenPdf::36 0 # What write queue length does an incoming req see
154 system.mem_ctrls.wrQLenPdf::37 0 # What write queue length does an incoming req see
155 system.mem_ctrls.wrQLenPdf::38 0 # What write queue length does an incoming req see
156 system.mem_ctrls.wrQLenPdf::39 0 # What write queue length does an incoming req see
157 system.mem_ctrls.wrQLenPdf::40 0 # What write queue length does an incoming req see
158 system.mem_ctrls.wrQLenPdf::41 0 # What write queue length does an incoming req see
159 system.mem_ctrls.wrQLenPdf::42 0 # What write queue length does an incoming req see
160 system.mem_ctrls.wrQLenPdf::43 0 # What write queue length does an incoming req see
161 system.mem_ctrls.wrQLenPdf::44 0 # What write queue length does an incoming req see
162 system.mem_ctrls.wrQLenPdf::45 0 # What write queue length does an incoming req see
163 system.mem_ctrls.wrQLenPdf::46 0 # What write queue length does an incoming req see
164 system.mem_ctrls.wrQLenPdf::47 0 # What write queue length does an incoming req see
165 system.mem_ctrls.wrQLenPdf::48 0 # What write queue length does an incoming req see
166 system.mem_ctrls.wrQLenPdf::49 0 # What write queue length does an incoming req see
167 system.mem_ctrls.wrQLenPdf::50 0 # What write queue length does an incoming req see
168 system.mem_ctrls.wrQLenPdf::51 0 # What write queue length does an incoming req see
169 system.mem_ctrls.wrQLenPdf::52 0 # What write queue length does an incoming req see
170 system.mem_ctrls.wrQLenPdf::53 0 # What write queue length does an incoming req see
171 system.mem_ctrls.wrQLenPdf::54 0 # What write queue length does an incoming req see
172 system.mem_ctrls.wrQLenPdf::55 0 # What write queue length does an incoming req see
173 system.mem_ctrls.wrQLenPdf::56 0 # What write queue length does an incoming req see
174 system.mem_ctrls.wrQLenPdf::57 0 # What write queue length does an incoming req see
175 system.mem_ctrls.wrQLenPdf::58 0 # What write queue length does an incoming req see
176 system.mem_ctrls.wrQLenPdf::59 0 # What write queue length does an incoming req see
177 system.mem_ctrls.wrQLenPdf::60 0 # What write queue length does an incoming req see
178 system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see
179 system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see
180 system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see
181 system.mem_ctrls.bytesPerActivate::samples 485 # Bytes accessed per row activation
182 system.mem_ctrls.bytesPerActivate::mean 204.008247 # Bytes accessed per row activation
183 system.mem_ctrls.bytesPerActivate::gmean 145.772769 # Bytes accessed per row activation
184 system.mem_ctrls.bytesPerActivate::stdev 192.306659 # Bytes accessed per row activation
185 system.mem_ctrls.bytesPerActivate::0-127 178 36.70% 36.70% # Bytes accessed per row activation
186 system.mem_ctrls.bytesPerActivate::128-255 156 32.16% 68.87% # Bytes accessed per row activation
187 system.mem_ctrls.bytesPerActivate::256-383 70 14.43% 83.30% # Bytes accessed per row activation
188 system.mem_ctrls.bytesPerActivate::384-511 40 8.25% 91.55% # Bytes accessed per row activation
189 system.mem_ctrls.bytesPerActivate::512-639 15 3.09% 94.64% # Bytes accessed per row activation
190 system.mem_ctrls.bytesPerActivate::640-767 10 2.06% 96.70% # Bytes accessed per row activation
191 system.mem_ctrls.bytesPerActivate::768-895 9 1.86% 98.56% # Bytes accessed per row activation
192 system.mem_ctrls.bytesPerActivate::896-1023 2 0.41% 98.97% # Bytes accessed per row activation
193 system.mem_ctrls.bytesPerActivate::1024-1151 5 1.03% 100.00% # Bytes accessed per row activation
194 system.mem_ctrls.bytesPerActivate::total 485 # Bytes accessed per row activation
195 system.mem_ctrls.totQLat 15500500 # Total ticks spent queuing
196 system.mem_ctrls.totMemAccLat 44581750 # Total ticks spent from burst creation until serviced by the DRAM
197 system.mem_ctrls.totBusLat 7755000 # Total ticks spent in databus transfers
198 system.mem_ctrls.avgQLat 9993.87 # Average queueing delay per DRAM burst
199 system.mem_ctrls.avgBusLat 5000.00 # Average bus latency per DRAM burst
200 system.mem_ctrls.avgMemAccLat 28743.87 # Average memory access latency per DRAM burst
201 system.mem_ctrls.avgRdBW 149.62 # Average DRAM read bandwidth in MiByte/s
202 system.mem_ctrls.avgWrBW 0.00 # Average achieved write bandwidth in MiByte/s
203 system.mem_ctrls.avgRdBWSys 149.62 # Average system read bandwidth in MiByte/s
204 system.mem_ctrls.avgWrBWSys 0.00 # Average system write bandwidth in MiByte/s
205 system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
206 system.mem_ctrls.busUtil 1.17 # Data bus utilization in percentage
207 system.mem_ctrls.busUtilRead 1.17 # Data bus utilization in percentage for reads
208 system.mem_ctrls.busUtilWrite 0.00 # Data bus utilization in percentage for writes
209 system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing
210 system.mem_ctrls.avgWrQLen 0.00 # Average write queue length when enqueuing
211 system.mem_ctrls.readRowHits 1062 # Number of row buffer hits during reads
212 system.mem_ctrls.writeRowHits 0 # Number of row buffer hits during writes
213 system.mem_ctrls.readRowHitRate 68.47 # Row buffer hit rate for reads
214 system.mem_ctrls.writeRowHitRate nan # Row buffer hit rate for writes
215 system.mem_ctrls.avgGap 427608.64 # Average gap between requests
216 system.mem_ctrls.pageHitRate 68.47 # Row buffer hit rate, read and write combined
217 system.mem_ctrls_0.actEnergy 1391040 # Energy for activate commands per rank (pJ)
218 system.mem_ctrls_0.preEnergy 759000 # Energy for precharge commands per rank (pJ)
219 system.mem_ctrls_0.readEnergy 5335200 # Energy for read commands per rank (pJ)
220 system.mem_ctrls_0.writeEnergy 0 # Energy for write commands per rank (pJ)
221 system.mem_ctrls_0.refreshEnergy 43227600 # Energy for refresh commands per rank (pJ)
222 system.mem_ctrls_0.actBackEnergy 335485755 # Energy for active background per rank (pJ)
223 system.mem_ctrls_0.preBackEnergy 102969000 # Energy for precharge background per rank (pJ)
224 system.mem_ctrls_0.totalEnergy 489167595 # Total energy per rank (pJ)
225 system.mem_ctrls_0.averagePower 738.822020 # Core power per rank (mW)
226 system.mem_ctrls_0.memoryStateTime::IDLE 170399250 # Time in different power states
227 system.mem_ctrls_0.memoryStateTime::REF 22100000 # Time in different power states
228 system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states
229 system.mem_ctrls_0.memoryStateTime::ACT 470741750 # Time in different power states
230 system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states
231 system.mem_ctrls_1.actEnergy 2275560 # Energy for activate commands per rank (pJ)
232 system.mem_ctrls_1.preEnergy 1241625 # Energy for precharge commands per rank (pJ)
233 system.mem_ctrls_1.readEnergy 6723600 # Energy for read commands per rank (pJ)
234 system.mem_ctrls_1.writeEnergy 0 # Energy for write commands per rank (pJ)
235 system.mem_ctrls_1.refreshEnergy 43227600 # Energy for refresh commands per rank (pJ)
236 system.mem_ctrls_1.actBackEnergy 371983995 # Energy for active background per rank (pJ)
237 system.mem_ctrls_1.preBackEnergy 70953000 # Energy for precharge background per rank (pJ)
238 system.mem_ctrls_1.totalEnergy 496405380 # Total energy per rank (pJ)
239 system.mem_ctrls_1.averagePower 749.753724 # Core power per rank (mW)
240 system.mem_ctrls_1.memoryStateTime::IDLE 115859750 # Time in different power states
241 system.mem_ctrls_1.memoryStateTime::REF 22100000 # Time in different power states
242 system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states
243 system.mem_ctrls_1.memoryStateTime::ACT 524145250 # Time in different power states
244 system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states
245 system.ruby.clk_domain.clock 500 # Clock period in ticks
246 system.ruby.phys_mem.bytes_read::cpu0.inst 696760 # Number of bytes read from this memory
247 system.ruby.phys_mem.bytes_read::cpu0.data 119832 # Number of bytes read from this memory
248 system.ruby.phys_mem.bytes_read::cpu1.CUs0.ComputeUnit 3280 # Number of bytes read from this memory
249 system.ruby.phys_mem.bytes_read::cpu1.CUs1.ComputeUnit 3280 # Number of bytes read from this memory
250 system.ruby.phys_mem.bytes_read::total 823152 # Number of bytes read from this memory
251 system.ruby.phys_mem.bytes_inst_read::cpu0.inst 696760 # Number of instructions bytes read from this memory
252 system.ruby.phys_mem.bytes_inst_read::cpu1.CUs0.ComputeUnit 2000 # Number of instructions bytes read from this memory
253 system.ruby.phys_mem.bytes_inst_read::cpu1.CUs1.ComputeUnit 2000 # Number of instructions bytes read from this memory
254 system.ruby.phys_mem.bytes_inst_read::total 700760 # Number of instructions bytes read from this memory
255 system.ruby.phys_mem.bytes_written::cpu0.data 72767 # Number of bytes written to this memory
256 system.ruby.phys_mem.bytes_written::cpu1.CUs0.ComputeUnit 256 # Number of bytes written to this memory
257 system.ruby.phys_mem.bytes_written::cpu1.CUs1.ComputeUnit 256 # Number of bytes written to this memory
258 system.ruby.phys_mem.bytes_written::total 73279 # Number of bytes written to this memory
259 system.ruby.phys_mem.num_reads::cpu0.inst 87095 # Number of read requests responded to by this memory
260 system.ruby.phys_mem.num_reads::cpu0.data 16686 # Number of read requests responded to by this memory
261 system.ruby.phys_mem.num_reads::cpu1.CUs0.ComputeUnit 555 # Number of read requests responded to by this memory
262 system.ruby.phys_mem.num_reads::cpu1.CUs1.ComputeUnit 555 # Number of read requests responded to by this memory
263 system.ruby.phys_mem.num_reads::total 104891 # Number of read requests responded to by this memory
264 system.ruby.phys_mem.num_writes::cpu0.data 10422 # Number of write requests responded to by this memory
265 system.ruby.phys_mem.num_writes::cpu1.CUs0.ComputeUnit 256 # Number of write requests responded to by this memory
266 system.ruby.phys_mem.num_writes::cpu1.CUs1.ComputeUnit 256 # Number of write requests responded to by this memory
267 system.ruby.phys_mem.num_writes::total 10934 # Number of write requests responded to by this memory
268 system.ruby.phys_mem.bw_read::cpu0.inst 1050200127 # Total read bandwidth from this memory (bytes/s)
269 system.ruby.phys_mem.bw_read::cpu0.data 180618264 # Total read bandwidth from this memory (bytes/s)
270 system.ruby.phys_mem.bw_read::cpu1.CUs0.ComputeUnit 4943821 # Total read bandwidth from this memory (bytes/s)
271 system.ruby.phys_mem.bw_read::cpu1.CUs1.ComputeUnit 4943821 # Total read bandwidth from this memory (bytes/s)
272 system.ruby.phys_mem.bw_read::total 1240706032 # Total read bandwidth from this memory (bytes/s)
273 system.ruby.phys_mem.bw_inst_read::cpu0.inst 1050200127 # Instruction read bandwidth from this memory (bytes/s)
274 system.ruby.phys_mem.bw_inst_read::cpu1.CUs0.ComputeUnit 3014525 # Instruction read bandwidth from this memory (bytes/s)
275 system.ruby.phys_mem.bw_inst_read::cpu1.CUs1.ComputeUnit 3014525 # Instruction read bandwidth from this memory (bytes/s)
276 system.ruby.phys_mem.bw_inst_read::total 1056229176 # Instruction read bandwidth from this memory (bytes/s)
277 system.ruby.phys_mem.bw_write::cpu0.data 109678961 # Write bandwidth from this memory (bytes/s)
278 system.ruby.phys_mem.bw_write::cpu1.CUs0.ComputeUnit 385859 # Write bandwidth from this memory (bytes/s)
279 system.ruby.phys_mem.bw_write::cpu1.CUs1.ComputeUnit 385859 # Write bandwidth from this memory (bytes/s)
280 system.ruby.phys_mem.bw_write::total 110450679 # Write bandwidth from this memory (bytes/s)
281 system.ruby.phys_mem.bw_total::cpu0.inst 1050200127 # Total bandwidth to/from this memory (bytes/s)
282 system.ruby.phys_mem.bw_total::cpu0.data 290297225 # Total bandwidth to/from this memory (bytes/s)
283 system.ruby.phys_mem.bw_total::cpu1.CUs0.ComputeUnit 5329680 # Total bandwidth to/from this memory (bytes/s)
284 system.ruby.phys_mem.bw_total::cpu1.CUs1.ComputeUnit 5329680 # Total bandwidth to/from this memory (bytes/s)
285 system.ruby.phys_mem.bw_total::total 1351156711 # Total bandwidth to/from this memory (bytes/s)
286 system.ruby.outstanding_req_hist_seqr::bucket_size 1
287 system.ruby.outstanding_req_hist_seqr::max_bucket 9
288 system.ruby.outstanding_req_hist_seqr::samples 114203
289 system.ruby.outstanding_req_hist_seqr::mean 1.000035
290 system.ruby.outstanding_req_hist_seqr::gmean 1.000024
291 system.ruby.outstanding_req_hist_seqr::stdev 0.005918
292 system.ruby.outstanding_req_hist_seqr | 0 0.00% 0.00% | 114199 100.00% 100.00% | 4 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
293 system.ruby.outstanding_req_hist_seqr::total 114203
294 system.ruby.outstanding_req_hist_coalsr::bucket_size 1
295 system.ruby.outstanding_req_hist_coalsr::max_bucket 9
296 system.ruby.outstanding_req_hist_coalsr::samples 28
297 system.ruby.outstanding_req_hist_coalsr::mean 1.642857
298 system.ruby.outstanding_req_hist_coalsr::gmean 1.455771
299 system.ruby.outstanding_req_hist_coalsr::stdev 0.911421
300 system.ruby.outstanding_req_hist_coalsr | 0 0.00% 0.00% | 16 57.14% 57.14% | 8 28.57% 85.71% | 2 7.14% 92.86% | 2 7.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
301 system.ruby.outstanding_req_hist_coalsr::total 28
302 system.ruby.latency_hist_seqr::bucket_size 64
303 system.ruby.latency_hist_seqr::max_bucket 639
304 system.ruby.latency_hist_seqr::samples 114203
305 system.ruby.latency_hist_seqr::mean 4.784183
306 system.ruby.latency_hist_seqr::gmean 2.131364
307 system.ruby.latency_hist_seqr::stdev 23.846744
308 system.ruby.latency_hist_seqr | 112668 98.66% 98.66% | 0 0.00% 98.66% | 0 0.00% 98.66% | 1506 1.32% 99.97% | 19 0.02% 99.99% | 10 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
309 system.ruby.latency_hist_seqr::total 114203
310 system.ruby.latency_hist_coalsr::bucket_size 64
311 system.ruby.latency_hist_coalsr::max_bucket 639
312 system.ruby.latency_hist_coalsr::samples 28
313 system.ruby.latency_hist_coalsr::mean 136.285714
314 system.ruby.latency_hist_coalsr::gmean 19.975449
315 system.ruby.latency_hist_coalsr::stdev 139.699905
316 system.ruby.latency_hist_coalsr | 14 50.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 10 35.71% 85.71% | 1 3.57% 89.29% | 3 10.71% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
317 system.ruby.latency_hist_coalsr::total 28
318 system.ruby.hit_latency_hist_seqr::bucket_size 64
319 system.ruby.hit_latency_hist_seqr::max_bucket 639
320 system.ruby.hit_latency_hist_seqr::samples 1535
321 system.ruby.hit_latency_hist_seqr::mean 208.449511
322 system.ruby.hit_latency_hist_seqr::gmean 208.002927
323 system.ruby.hit_latency_hist_seqr::stdev 15.847049
324 system.ruby.hit_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1506 98.11% 98.11% | 19 1.24% 99.35% | 10 0.65% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
325 system.ruby.hit_latency_hist_seqr::total 1535
326 system.ruby.miss_latency_hist_seqr::bucket_size 4
327 system.ruby.miss_latency_hist_seqr::max_bucket 39
328 system.ruby.miss_latency_hist_seqr::samples 112668
329 system.ruby.miss_latency_hist_seqr::mean 2.009426
330 system.ruby.miss_latency_hist_seqr::gmean 2.002413
331 system.ruby.miss_latency_hist_seqr::stdev 0.411800
332 system.ruby.miss_latency_hist_seqr | 112609 99.95% 99.95% | 0 0.00% 99.95% | 0 0.00% 99.95% | 0 0.00% 99.95% | 0 0.00% 99.95% | 59 0.05% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
333 system.ruby.miss_latency_hist_seqr::total 112668
334 system.ruby.miss_latency_hist_coalsr::bucket_size 64
335 system.ruby.miss_latency_hist_coalsr::max_bucket 639
336 system.ruby.miss_latency_hist_coalsr::samples 28
337 system.ruby.miss_latency_hist_coalsr::mean 136.285714
338 system.ruby.miss_latency_hist_coalsr::gmean 19.975449
339 system.ruby.miss_latency_hist_coalsr::stdev 139.699905
340 system.ruby.miss_latency_hist_coalsr | 14 50.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 10 35.71% 85.71% | 1 3.57% 89.29% | 3 10.71% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
341 system.ruby.miss_latency_hist_coalsr::total 28
342 system.ruby.L1Cache.incomplete_times_seqr 112609
343 system.ruby.L2Cache.incomplete_times_seqr 59
344 system.cp_cntrl0.L1D0cache.demand_hits 0 # Number of cache demand hits
345 system.cp_cntrl0.L1D0cache.demand_misses 506 # Number of cache demand misses
346 system.cp_cntrl0.L1D0cache.demand_accesses 506 # Number of cache demand accesses
347 system.cp_cntrl0.L1D0cache.num_data_array_reads 16155 # number of data array reads
348 system.cp_cntrl0.L1D0cache.num_data_array_writes 11985 # number of data array writes
349 system.cp_cntrl0.L1D0cache.num_tag_array_reads 27132 # number of tag array reads
350 system.cp_cntrl0.L1D0cache.num_tag_array_writes 1584 # number of tag array writes
351 system.cp_cntrl0.L1D1cache.demand_hits 0 # Number of cache demand hits
352 system.cp_cntrl0.L1D1cache.demand_misses 0 # Number of cache demand misses
353 system.cp_cntrl0.L1D1cache.demand_accesses 0 # Number of cache demand accesses
354 system.cp_cntrl0.L1Icache.demand_hits 0 # Number of cache demand hits
355 system.cp_cntrl0.L1Icache.demand_misses 1088 # Number of cache demand misses
356 system.cp_cntrl0.L1Icache.demand_accesses 1088 # Number of cache demand accesses
357 system.cp_cntrl0.L1Icache.num_data_array_reads 86007 # number of data array reads
358 system.cp_cntrl0.L1Icache.num_data_array_writes 54 # number of data array writes
359 system.cp_cntrl0.L1Icache.num_tag_array_reads 87684 # number of tag array reads
360 system.cp_cntrl0.L1Icache.num_tag_array_writes 54 # number of tag array writes
361 system.cp_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits
362 system.cp_cntrl0.L2cache.demand_misses 1535 # Number of cache demand misses
363 system.cp_cntrl0.L2cache.demand_accesses 1535 # Number of cache demand accesses
364 system.cp_cntrl0.L2cache.num_data_array_reads 120 # number of data array reads
365 system.cp_cntrl0.L2cache.num_data_array_writes 11982 # number of data array writes
366 system.cp_cntrl0.L2cache.num_tag_array_reads 12059 # number of tag array reads
367 system.cp_cntrl0.L2cache.num_tag_array_writes 1649 # number of tag array writes
368 system.cpu0.clk_domain.clock 500 # Clock period in ticks
369 system.cpu0.apic_clk_domain.clock 8000 # Clock period in ticks
370 system.cpu0.workload.num_syscalls 21 # Number of system calls
371 system.cpu0.numCycles 1326909 # number of cpu cycles simulated
372 system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started
373 system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed
374 system.cpu0.committedInsts 66963 # Number of instructions committed
375 system.cpu0.committedOps 137705 # Number of ops (including micro ops) committed
376 system.cpu0.num_int_alu_accesses 136380 # Number of integer alu accesses
377 system.cpu0.num_fp_alu_accesses 1279 # Number of float alu accesses
378 system.cpu0.num_func_calls 3196 # number of times a function call or return occured
379 system.cpu0.num_conditional_control_insts 12151 # number of instructions that are conditional controls
380 system.cpu0.num_int_insts 136380 # number of integer instructions
381 system.cpu0.num_fp_insts 1279 # number of float instructions
382 system.cpu0.num_int_register_reads 257490 # number of times the integer registers were read
383 system.cpu0.num_int_register_writes 110039 # number of times the integer registers were written
384 system.cpu0.num_fp_register_reads 1981 # number of times the floating registers were read
385 system.cpu0.num_fp_register_writes 981 # number of times the floating registers were written
386 system.cpu0.num_cc_register_reads 78262 # number of times the CC registers were read
387 system.cpu0.num_cc_register_writes 42183 # number of times the CC registers were written
388 system.cpu0.num_mem_refs 27198 # number of memory refs
389 system.cpu0.num_load_insts 16684 # Number of load instructions
390 system.cpu0.num_store_insts 10514 # Number of store instructions
391 system.cpu0.num_idle_cycles 5227.003992 # Number of idle cycles
392 system.cpu0.num_busy_cycles 1321681.996008 # Number of busy cycles
393 system.cpu0.not_idle_fraction 0.996061 # Percentage of non-idle cycles
394 system.cpu0.idle_fraction 0.003939 # Percentage of idle cycles
395 system.cpu0.Branches 16199 # Number of branches fetched
396 system.cpu0.op_class::No_OpClass 615 0.45% 0.45% # Class of executed instruction
397 system.cpu0.op_class::IntAlu 108791 79.00% 79.45% # Class of executed instruction
398 system.cpu0.op_class::IntMult 13 0.01% 79.46% # Class of executed instruction
399 system.cpu0.op_class::IntDiv 138 0.10% 79.56% # Class of executed instruction
400 system.cpu0.op_class::FloatAdd 950 0.69% 80.25% # Class of executed instruction
401 system.cpu0.op_class::FloatCmp 0 0.00% 80.25% # Class of executed instruction
402 system.cpu0.op_class::FloatCvt 0 0.00% 80.25% # Class of executed instruction
403 system.cpu0.op_class::FloatMult 0 0.00% 80.25% # Class of executed instruction
404 system.cpu0.op_class::FloatDiv 0 0.00% 80.25% # Class of executed instruction
405 system.cpu0.op_class::FloatSqrt 0 0.00% 80.25% # Class of executed instruction
406 system.cpu0.op_class::SimdAdd 0 0.00% 80.25% # Class of executed instruction
407 system.cpu0.op_class::SimdAddAcc 0 0.00% 80.25% # Class of executed instruction
408 system.cpu0.op_class::SimdAlu 0 0.00% 80.25% # Class of executed instruction
409 system.cpu0.op_class::SimdCmp 0 0.00% 80.25% # Class of executed instruction
410 system.cpu0.op_class::SimdCvt 0 0.00% 80.25% # Class of executed instruction
411 system.cpu0.op_class::SimdMisc 0 0.00% 80.25% # Class of executed instruction
412 system.cpu0.op_class::SimdMult 0 0.00% 80.25% # Class of executed instruction
413 system.cpu0.op_class::SimdMultAcc 0 0.00% 80.25% # Class of executed instruction
414 system.cpu0.op_class::SimdShift 0 0.00% 80.25% # Class of executed instruction
415 system.cpu0.op_class::SimdShiftAcc 0 0.00% 80.25% # Class of executed instruction
416 system.cpu0.op_class::SimdSqrt 0 0.00% 80.25% # Class of executed instruction
417 system.cpu0.op_class::SimdFloatAdd 0 0.00% 80.25% # Class of executed instruction
418 system.cpu0.op_class::SimdFloatAlu 0 0.00% 80.25% # Class of executed instruction
419 system.cpu0.op_class::SimdFloatCmp 0 0.00% 80.25% # Class of executed instruction
420 system.cpu0.op_class::SimdFloatCvt 0 0.00% 80.25% # Class of executed instruction
421 system.cpu0.op_class::SimdFloatDiv 0 0.00% 80.25% # Class of executed instruction
422 system.cpu0.op_class::SimdFloatMisc 0 0.00% 80.25% # Class of executed instruction
423 system.cpu0.op_class::SimdFloatMult 0 0.00% 80.25% # Class of executed instruction
424 system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 80.25% # Class of executed instruction
425 system.cpu0.op_class::SimdFloatSqrt 0 0.00% 80.25% # Class of executed instruction
426 system.cpu0.op_class::MemRead 16684 12.12% 92.36% # Class of executed instruction
427 system.cpu0.op_class::MemWrite 10514 7.64% 100.00% # Class of executed instruction
428 system.cpu0.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
429 system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
430 system.cpu0.op_class::total 137705 # Class of executed instruction
431 system.cpu1.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
432 system.cpu1.clk_domain.clock 1000 # Clock period in ticks
433 system.cpu1.CUs0.wavefronts00.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
434 system.cpu1.CUs0.wavefronts00.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
435 system.cpu1.CUs0.wavefronts00.timesBlockedDueRAWDependencies 297 # number of times the wf's instructions are blocked due to RAW dependencies
436 system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::samples 39 # number of executed instructions with N source register operands
437 system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::mean 0.794872 # number of executed instructions with N source register operands
438 system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::stdev 0.863880 # number of executed instructions with N source register operands
439 system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
440 system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::0-1 28 71.79% 71.79% # number of executed instructions with N source register operands
441 system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::2-3 11 28.21% 100.00% # number of executed instructions with N source register operands
442 system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
443 system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
444 system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
445 system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
446 system.cpu1.CUs0.wavefronts00.src_reg_operand_dist::total 39 # number of executed instructions with N source register operands
447 system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::samples 39 # number of executed instructions with N destination register operands
448 system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::mean 0.589744 # number of executed instructions with N destination register operands
449 system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::stdev 0.498310 # number of executed instructions with N destination register operands
450 system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
451 system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::0-1 39 100.00% 100.00% # number of executed instructions with N destination register operands
452 system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
453 system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
454 system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
455 system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
456 system.cpu1.CUs0.wavefronts00.dst_reg_operand_dist::total 39 # number of executed instructions with N destination register operands
457 system.cpu1.CUs0.wavefronts01.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
458 system.cpu1.CUs0.wavefronts01.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
459 system.cpu1.CUs0.wavefronts01.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
460 system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
461 system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
462 system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
463 system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
464 system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
465 system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
466 system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
467 system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
468 system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
469 system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
470 system.cpu1.CUs0.wavefronts01.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
471 system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
472 system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
473 system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
474 system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
475 system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
476 system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
477 system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
478 system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
479 system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
480 system.cpu1.CUs0.wavefronts01.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
481 system.cpu1.CUs0.wavefronts02.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
482 system.cpu1.CUs0.wavefronts02.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
483 system.cpu1.CUs0.wavefronts02.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
484 system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
485 system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
486 system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
487 system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
488 system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
489 system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
490 system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
491 system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
492 system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
493 system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
494 system.cpu1.CUs0.wavefronts02.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
495 system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
496 system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
497 system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
498 system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
499 system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
500 system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
501 system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
502 system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
503 system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
504 system.cpu1.CUs0.wavefronts02.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
505 system.cpu1.CUs0.wavefronts03.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
506 system.cpu1.CUs0.wavefronts03.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
507 system.cpu1.CUs0.wavefronts03.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
508 system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
509 system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
510 system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
511 system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
512 system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
513 system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
514 system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
515 system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
516 system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
517 system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
518 system.cpu1.CUs0.wavefronts03.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
519 system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
520 system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
521 system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
522 system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
523 system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
524 system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
525 system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
526 system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
527 system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
528 system.cpu1.CUs0.wavefronts03.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
529 system.cpu1.CUs0.wavefronts04.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
530 system.cpu1.CUs0.wavefronts04.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
531 system.cpu1.CUs0.wavefronts04.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
532 system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
533 system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
534 system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
535 system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
536 system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
537 system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
538 system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
539 system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
540 system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
541 system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
542 system.cpu1.CUs0.wavefronts04.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
543 system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
544 system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
545 system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
546 system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
547 system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
548 system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
549 system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
550 system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
551 system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
552 system.cpu1.CUs0.wavefronts04.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
553 system.cpu1.CUs0.wavefronts05.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
554 system.cpu1.CUs0.wavefronts05.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
555 system.cpu1.CUs0.wavefronts05.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
556 system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
557 system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
558 system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
559 system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
560 system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
561 system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
562 system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
563 system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
564 system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
565 system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
566 system.cpu1.CUs0.wavefronts05.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
567 system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
568 system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
569 system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
570 system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
571 system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
572 system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
573 system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
574 system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
575 system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
576 system.cpu1.CUs0.wavefronts05.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
577 system.cpu1.CUs0.wavefronts06.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
578 system.cpu1.CUs0.wavefronts06.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
579 system.cpu1.CUs0.wavefronts06.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
580 system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
581 system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
582 system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
583 system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
584 system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
585 system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
586 system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
587 system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
588 system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
589 system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
590 system.cpu1.CUs0.wavefronts06.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
591 system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
592 system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
593 system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
594 system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
595 system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
596 system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
597 system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
598 system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
599 system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
600 system.cpu1.CUs0.wavefronts06.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
601 system.cpu1.CUs0.wavefronts07.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
602 system.cpu1.CUs0.wavefronts07.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
603 system.cpu1.CUs0.wavefronts07.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
604 system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
605 system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
606 system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
607 system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
608 system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
609 system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
610 system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
611 system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
612 system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
613 system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
614 system.cpu1.CUs0.wavefronts07.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
615 system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
616 system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
617 system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
618 system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
619 system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
620 system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
621 system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
622 system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
623 system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
624 system.cpu1.CUs0.wavefronts07.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
625 system.cpu1.CUs0.wavefronts08.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
626 system.cpu1.CUs0.wavefronts08.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
627 system.cpu1.CUs0.wavefronts08.timesBlockedDueRAWDependencies 273 # number of times the wf's instructions are blocked due to RAW dependencies
628 system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands
629 system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands
630 system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands
631 system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
632 system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands
633 system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands
634 system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
635 system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
636 system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
637 system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
638 system.cpu1.CUs0.wavefronts08.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands
639 system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands
640 system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands
641 system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands
642 system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
643 system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands
644 system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
645 system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
646 system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
647 system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
648 system.cpu1.CUs0.wavefronts08.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands
649 system.cpu1.CUs0.wavefronts09.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
650 system.cpu1.CUs0.wavefronts09.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
651 system.cpu1.CUs0.wavefronts09.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
652 system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
653 system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
654 system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
655 system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
656 system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
657 system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
658 system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
659 system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
660 system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
661 system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
662 system.cpu1.CUs0.wavefronts09.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
663 system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
664 system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
665 system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
666 system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
667 system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
668 system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
669 system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
670 system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
671 system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
672 system.cpu1.CUs0.wavefronts09.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
673 system.cpu1.CUs0.wavefronts10.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
674 system.cpu1.CUs0.wavefronts10.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
675 system.cpu1.CUs0.wavefronts10.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
676 system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
677 system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
678 system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
679 system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
680 system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
681 system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
682 system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
683 system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
684 system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
685 system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
686 system.cpu1.CUs0.wavefronts10.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
687 system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
688 system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
689 system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
690 system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
691 system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
692 system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
693 system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
694 system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
695 system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
696 system.cpu1.CUs0.wavefronts10.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
697 system.cpu1.CUs0.wavefronts11.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
698 system.cpu1.CUs0.wavefronts11.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
699 system.cpu1.CUs0.wavefronts11.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
700 system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
701 system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
702 system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
703 system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
704 system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
705 system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
706 system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
707 system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
708 system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
709 system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
710 system.cpu1.CUs0.wavefronts11.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
711 system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
712 system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
713 system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
714 system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
715 system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
716 system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
717 system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
718 system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
719 system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
720 system.cpu1.CUs0.wavefronts11.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
721 system.cpu1.CUs0.wavefronts12.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
722 system.cpu1.CUs0.wavefronts12.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
723 system.cpu1.CUs0.wavefronts12.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
724 system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
725 system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
726 system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
727 system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
728 system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
729 system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
730 system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
731 system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
732 system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
733 system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
734 system.cpu1.CUs0.wavefronts12.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
735 system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
736 system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
737 system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
738 system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
739 system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
740 system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
741 system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
742 system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
743 system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
744 system.cpu1.CUs0.wavefronts12.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
745 system.cpu1.CUs0.wavefronts13.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
746 system.cpu1.CUs0.wavefronts13.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
747 system.cpu1.CUs0.wavefronts13.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
748 system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
749 system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
750 system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
751 system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
752 system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
753 system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
754 system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
755 system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
756 system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
757 system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
758 system.cpu1.CUs0.wavefronts13.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
759 system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
760 system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
761 system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
762 system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
763 system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
764 system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
765 system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
766 system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
767 system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
768 system.cpu1.CUs0.wavefronts13.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
769 system.cpu1.CUs0.wavefronts14.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
770 system.cpu1.CUs0.wavefronts14.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
771 system.cpu1.CUs0.wavefronts14.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
772 system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
773 system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
774 system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
775 system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
776 system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
777 system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
778 system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
779 system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
780 system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
781 system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
782 system.cpu1.CUs0.wavefronts14.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
783 system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
784 system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
785 system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
786 system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
787 system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
788 system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
789 system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
790 system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
791 system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
792 system.cpu1.CUs0.wavefronts14.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
793 system.cpu1.CUs0.wavefronts15.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
794 system.cpu1.CUs0.wavefronts15.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
795 system.cpu1.CUs0.wavefronts15.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
796 system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
797 system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
798 system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
799 system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
800 system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
801 system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
802 system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
803 system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
804 system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
805 system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
806 system.cpu1.CUs0.wavefronts15.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
807 system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
808 system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
809 system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
810 system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
811 system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
812 system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
813 system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
814 system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
815 system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
816 system.cpu1.CUs0.wavefronts15.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
817 system.cpu1.CUs0.wavefronts16.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
818 system.cpu1.CUs0.wavefronts16.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
819 system.cpu1.CUs0.wavefronts16.timesBlockedDueRAWDependencies 272 # number of times the wf's instructions are blocked due to RAW dependencies
820 system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands
821 system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands
822 system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands
823 system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
824 system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands
825 system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands
826 system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
827 system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
828 system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
829 system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
830 system.cpu1.CUs0.wavefronts16.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands
831 system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands
832 system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands
833 system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands
834 system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
835 system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands
836 system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
837 system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
838 system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
839 system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
840 system.cpu1.CUs0.wavefronts16.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands
841 system.cpu1.CUs0.wavefronts17.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
842 system.cpu1.CUs0.wavefronts17.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
843 system.cpu1.CUs0.wavefronts17.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
844 system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
845 system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
846 system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
847 system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
848 system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
849 system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
850 system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
851 system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
852 system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
853 system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
854 system.cpu1.CUs0.wavefronts17.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
855 system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
856 system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
857 system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
858 system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
859 system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
860 system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
861 system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
862 system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
863 system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
864 system.cpu1.CUs0.wavefronts17.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
865 system.cpu1.CUs0.wavefronts18.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
866 system.cpu1.CUs0.wavefronts18.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
867 system.cpu1.CUs0.wavefronts18.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
868 system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
869 system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
870 system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
871 system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
872 system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
873 system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
874 system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
875 system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
876 system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
877 system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
878 system.cpu1.CUs0.wavefronts18.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
879 system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
880 system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
881 system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
882 system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
883 system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
884 system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
885 system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
886 system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
887 system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
888 system.cpu1.CUs0.wavefronts18.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
889 system.cpu1.CUs0.wavefronts19.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
890 system.cpu1.CUs0.wavefronts19.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
891 system.cpu1.CUs0.wavefronts19.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
892 system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
893 system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
894 system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
895 system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
896 system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
897 system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
898 system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
899 system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
900 system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
901 system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
902 system.cpu1.CUs0.wavefronts19.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
903 system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
904 system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
905 system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
906 system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
907 system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
908 system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
909 system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
910 system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
911 system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
912 system.cpu1.CUs0.wavefronts19.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
913 system.cpu1.CUs0.wavefronts20.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
914 system.cpu1.CUs0.wavefronts20.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
915 system.cpu1.CUs0.wavefronts20.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
916 system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
917 system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
918 system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
919 system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
920 system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
921 system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
922 system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
923 system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
924 system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
925 system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
926 system.cpu1.CUs0.wavefronts20.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
927 system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
928 system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
929 system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
930 system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
931 system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
932 system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
933 system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
934 system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
935 system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
936 system.cpu1.CUs0.wavefronts20.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
937 system.cpu1.CUs0.wavefronts21.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
938 system.cpu1.CUs0.wavefronts21.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
939 system.cpu1.CUs0.wavefronts21.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
940 system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
941 system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
942 system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
943 system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
944 system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
945 system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
946 system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
947 system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
948 system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
949 system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
950 system.cpu1.CUs0.wavefronts21.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
951 system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
952 system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
953 system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
954 system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
955 system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
956 system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
957 system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
958 system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
959 system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
960 system.cpu1.CUs0.wavefronts21.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
961 system.cpu1.CUs0.wavefronts22.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
962 system.cpu1.CUs0.wavefronts22.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
963 system.cpu1.CUs0.wavefronts22.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
964 system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
965 system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
966 system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
967 system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
968 system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
969 system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
970 system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
971 system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
972 system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
973 system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
974 system.cpu1.CUs0.wavefronts22.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
975 system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
976 system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
977 system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
978 system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
979 system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
980 system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
981 system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
982 system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
983 system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
984 system.cpu1.CUs0.wavefronts22.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
985 system.cpu1.CUs0.wavefronts23.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
986 system.cpu1.CUs0.wavefronts23.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
987 system.cpu1.CUs0.wavefronts23.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
988 system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
989 system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
990 system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
991 system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
992 system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
993 system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
994 system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
995 system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
996 system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
997 system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
998 system.cpu1.CUs0.wavefronts23.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
999 system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1000 system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1001 system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1002 system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1003 system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1004 system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1005 system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1006 system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1007 system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1008 system.cpu1.CUs0.wavefronts23.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1009 system.cpu1.CUs0.wavefronts24.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1010 system.cpu1.CUs0.wavefronts24.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1011 system.cpu1.CUs0.wavefronts24.timesBlockedDueRAWDependencies 256 # number of times the wf's instructions are blocked due to RAW dependencies
1012 system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands
1013 system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands
1014 system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands
1015 system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
1016 system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands
1017 system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands
1018 system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
1019 system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
1020 system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1021 system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
1022 system.cpu1.CUs0.wavefronts24.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands
1023 system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands
1024 system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands
1025 system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands
1026 system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
1027 system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands
1028 system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
1029 system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
1030 system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1031 system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
1032 system.cpu1.CUs0.wavefronts24.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands
1033 system.cpu1.CUs0.wavefronts25.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1034 system.cpu1.CUs0.wavefronts25.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1035 system.cpu1.CUs0.wavefronts25.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1036 system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1037 system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1038 system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1039 system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1040 system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1041 system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1042 system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1043 system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1044 system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1045 system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1046 system.cpu1.CUs0.wavefronts25.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1047 system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1048 system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1049 system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1050 system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1051 system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1052 system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1053 system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1054 system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1055 system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1056 system.cpu1.CUs0.wavefronts25.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1057 system.cpu1.CUs0.wavefronts26.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1058 system.cpu1.CUs0.wavefronts26.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1059 system.cpu1.CUs0.wavefronts26.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1060 system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1061 system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1062 system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1063 system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1064 system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1065 system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1066 system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1067 system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1068 system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1069 system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1070 system.cpu1.CUs0.wavefronts26.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1071 system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1072 system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1073 system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1074 system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1075 system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1076 system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1077 system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1078 system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1079 system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1080 system.cpu1.CUs0.wavefronts26.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1081 system.cpu1.CUs0.wavefronts27.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1082 system.cpu1.CUs0.wavefronts27.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1083 system.cpu1.CUs0.wavefronts27.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1084 system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1085 system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1086 system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1087 system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1088 system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1089 system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1090 system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1091 system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1092 system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1093 system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1094 system.cpu1.CUs0.wavefronts27.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1095 system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1096 system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1097 system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1098 system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1099 system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1100 system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1101 system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1102 system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1103 system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1104 system.cpu1.CUs0.wavefronts27.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1105 system.cpu1.CUs0.wavefronts28.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1106 system.cpu1.CUs0.wavefronts28.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1107 system.cpu1.CUs0.wavefronts28.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1108 system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1109 system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1110 system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1111 system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1112 system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1113 system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1114 system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1115 system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1116 system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1117 system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1118 system.cpu1.CUs0.wavefronts28.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1119 system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1120 system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1121 system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1122 system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1123 system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1124 system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1125 system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1126 system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1127 system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1128 system.cpu1.CUs0.wavefronts28.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1129 system.cpu1.CUs0.wavefronts29.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1130 system.cpu1.CUs0.wavefronts29.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1131 system.cpu1.CUs0.wavefronts29.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1132 system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1133 system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1134 system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1135 system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1136 system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1137 system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1138 system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1139 system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1140 system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1141 system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1142 system.cpu1.CUs0.wavefronts29.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1143 system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1144 system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1145 system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1146 system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1147 system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1148 system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1149 system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1150 system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1151 system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1152 system.cpu1.CUs0.wavefronts29.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1153 system.cpu1.CUs0.wavefronts30.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1154 system.cpu1.CUs0.wavefronts30.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1155 system.cpu1.CUs0.wavefronts30.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1156 system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1157 system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1158 system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1159 system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1160 system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1161 system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1162 system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1163 system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1164 system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1165 system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1166 system.cpu1.CUs0.wavefronts30.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1167 system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1168 system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1169 system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1170 system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1171 system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1172 system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1173 system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1174 system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1175 system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1176 system.cpu1.CUs0.wavefronts30.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1177 system.cpu1.CUs0.wavefronts31.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1178 system.cpu1.CUs0.wavefronts31.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1179 system.cpu1.CUs0.wavefronts31.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1180 system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1181 system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1182 system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1183 system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1184 system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1185 system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1186 system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1187 system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1188 system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1189 system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1190 system.cpu1.CUs0.wavefronts31.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1191 system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1192 system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1193 system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1194 system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1195 system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1196 system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1197 system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1198 system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1199 system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1200 system.cpu1.CUs0.wavefronts31.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1201 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::samples 43 # For each instruction fetch request recieved record how many instructions you got from it
1202 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::mean 5.813953 # For each instruction fetch request recieved record how many instructions you got from it
1203 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::stdev 2.683777 # For each instruction fetch request recieved record how many instructions you got from it
1204 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::underflows 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it
1205 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::1 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it
1206 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::2 8 18.60% 18.60% # For each instruction fetch request recieved record how many instructions you got from it
1207 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::3 8 18.60% 37.21% # For each instruction fetch request recieved record how many instructions you got from it
1208 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::4 1 2.33% 39.53% # For each instruction fetch request recieved record how many instructions you got from it
1209 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::5 0 0.00% 39.53% # For each instruction fetch request recieved record how many instructions you got from it
1210 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::6 1 2.33% 41.86% # For each instruction fetch request recieved record how many instructions you got from it
1211 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::7 0 0.00% 41.86% # For each instruction fetch request recieved record how many instructions you got from it
1212 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::8 25 58.14% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1213 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::9 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1214 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::10 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1215 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::11 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1216 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::12 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1217 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::13 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1218 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::14 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1219 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::15 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1220 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::16 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1221 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::17 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1222 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::18 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1223 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::19 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1224 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::20 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1225 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::21 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1226 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::22 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1227 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::23 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1228 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::24 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1229 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::25 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1230 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::26 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1231 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::27 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1232 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::28 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1233 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::29 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1234 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::30 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1235 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::31 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1236 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::32 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1237 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::overflows 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
1238 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::min_value 2 # For each instruction fetch request recieved record how many instructions you got from it
1239 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::max_value 8 # For each instruction fetch request recieved record how many instructions you got from it
1240 system.cpu1.CUs0.FetchStage.inst_fetch_instr_returned::total 43 # For each instruction fetch request recieved record how many instructions you got from it
1241 system.cpu1.CUs0.ExecStage.num_cycles_with_no_issue 3230 # number of cycles the CU issues nothing
1242 system.cpu1.CUs0.ExecStage.num_cycles_with_instr_issued 128 # number of cycles the CU issued at least one instruction
1243 system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU0 30 # Number of cycles at least one instruction of specific type issued
1244 system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU1 29 # Number of cycles at least one instruction of specific type issued
1245 system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU2 29 # Number of cycles at least one instruction of specific type issued
1246 system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::ALU3 29 # Number of cycles at least one instruction of specific type issued
1247 system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::GM 18 # Number of cycles at least one instruction of specific type issued
1248 system.cpu1.CUs0.ExecStage.num_cycles_with_instrtype_issue::LM 6 # Number of cycles at least one instruction of specific type issued
1249 system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU0 780 # Number of cycles no instruction of specific type issued
1250 system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU1 367 # Number of cycles no instruction of specific type issued
1251 system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU2 384 # Number of cycles no instruction of specific type issued
1252 system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::ALU3 327 # Number of cycles no instruction of specific type issued
1253 system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::GM 414 # Number of cycles no instruction of specific type issued
1254 system.cpu1.CUs0.ExecStage.num_cycles_with_instr_type_no_issue::LM 30 # Number of cycles no instruction of specific type issued
1255 system.cpu1.CUs0.ExecStage.spc::samples 3358 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
1256 system.cpu1.CUs0.ExecStage.spc::mean 0.041989 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
1257 system.cpu1.CUs0.ExecStage.spc::stdev 0.220406 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
1258 system.cpu1.CUs0.ExecStage.spc::underflows 0 0.00% 0.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
1259 system.cpu1.CUs0.ExecStage.spc::0 3230 96.19% 96.19% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
1260 system.cpu1.CUs0.ExecStage.spc::1 116 3.45% 99.64% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
1261 system.cpu1.CUs0.ExecStage.spc::2 11 0.33% 99.97% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
1262 system.cpu1.CUs0.ExecStage.spc::3 1 0.03% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
1263 system.cpu1.CUs0.ExecStage.spc::4 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
1264 system.cpu1.CUs0.ExecStage.spc::5 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
1265 system.cpu1.CUs0.ExecStage.spc::6 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
1266 system.cpu1.CUs0.ExecStage.spc::overflows 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
1267 system.cpu1.CUs0.ExecStage.spc::min_value 0 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
1268 system.cpu1.CUs0.ExecStage.spc::max_value 3 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
1269 system.cpu1.CUs0.ExecStage.spc::total 3358 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
1270 system.cpu1.CUs0.ExecStage.num_transitions_active_to_idle 82 # number of CU transitions from active to idle
1271 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::samples 82 # duration of idle periods in cycles
1272 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::mean 39.280488 # duration of idle periods in cycles
1273 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::stdev 158.161058 # duration of idle periods in cycles
1274 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::underflows 0 0.00% 0.00% # duration of idle periods in cycles
1275 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::0-4 62 75.61% 75.61% # duration of idle periods in cycles
1276 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::5-9 9 10.98% 86.59% # duration of idle periods in cycles
1277 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::10-14 1 1.22% 87.80% # duration of idle periods in cycles
1278 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::15-19 0 0.00% 87.80% # duration of idle periods in cycles
1279 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::20-24 2 2.44% 90.24% # duration of idle periods in cycles
1280 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::25-29 1 1.22% 91.46% # duration of idle periods in cycles
1281 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::30-34 0 0.00% 91.46% # duration of idle periods in cycles
1282 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::35-39 0 0.00% 91.46% # duration of idle periods in cycles
1283 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::40-44 0 0.00% 91.46% # duration of idle periods in cycles
1284 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::45-49 0 0.00% 91.46% # duration of idle periods in cycles
1285 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::50-54 0 0.00% 91.46% # duration of idle periods in cycles
1286 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::55-59 0 0.00% 91.46% # duration of idle periods in cycles
1287 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::60-64 0 0.00% 91.46% # duration of idle periods in cycles
1288 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::65-69 0 0.00% 91.46% # duration of idle periods in cycles
1289 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::70-74 0 0.00% 91.46% # duration of idle periods in cycles
1290 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::75 0 0.00% 91.46% # duration of idle periods in cycles
1291 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::overflows 7 8.54% 100.00% # duration of idle periods in cycles
1292 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::min_value 1 # duration of idle periods in cycles
1293 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::max_value 1285 # duration of idle periods in cycles
1294 system.cpu1.CUs0.ExecStage.idle_duration_in_cycles::total 82 # duration of idle periods in cycles
1295 system.cpu1.CUs0.GlobalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles GM data are delayed before updating the VRF
1296 system.cpu1.CUs0.LocalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles LDS data are delayed before updating the VRF
1297 system.cpu1.CUs0.tlb_requests 769 # number of uncoalesced requests
1298 system.cpu1.CUs0.tlb_cycles -452460956000 # total number of cycles for all uncoalesced requests
1299 system.cpu1.CUs0.avg_translation_latency -588375755.526658 # Avg. translation latency for data translations
1300 system.cpu1.CUs0.TLB_hits_distribution::page_table 769 # TLB hits distribution (0 for page table, x for Lx-TLB
1301 system.cpu1.CUs0.TLB_hits_distribution::L1_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB
1302 system.cpu1.CUs0.TLB_hits_distribution::L2_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB
1303 system.cpu1.CUs0.TLB_hits_distribution::L3_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB
1304 system.cpu1.CUs0.lds_bank_access_cnt 54 # Total number of LDS bank accesses
1305 system.cpu1.CUs0.lds_bank_conflicts::samples 6 # Number of bank conflicts per LDS memory packet
1306 system.cpu1.CUs0.lds_bank_conflicts::mean 8 # Number of bank conflicts per LDS memory packet
1307 system.cpu1.CUs0.lds_bank_conflicts::stdev 6.196773 # Number of bank conflicts per LDS memory packet
1308 system.cpu1.CUs0.lds_bank_conflicts::underflows 0 0.00% 0.00% # Number of bank conflicts per LDS memory packet
1309 system.cpu1.CUs0.lds_bank_conflicts::0-1 2 33.33% 33.33% # Number of bank conflicts per LDS memory packet
1310 system.cpu1.CUs0.lds_bank_conflicts::2-3 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
1311 system.cpu1.CUs0.lds_bank_conflicts::4-5 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
1312 system.cpu1.CUs0.lds_bank_conflicts::6-7 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
1313 system.cpu1.CUs0.lds_bank_conflicts::8-9 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
1314 system.cpu1.CUs0.lds_bank_conflicts::10-11 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
1315 system.cpu1.CUs0.lds_bank_conflicts::12-13 4 66.67% 100.00% # Number of bank conflicts per LDS memory packet
1316 system.cpu1.CUs0.lds_bank_conflicts::14-15 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1317 system.cpu1.CUs0.lds_bank_conflicts::16-17 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1318 system.cpu1.CUs0.lds_bank_conflicts::18-19 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1319 system.cpu1.CUs0.lds_bank_conflicts::20-21 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1320 system.cpu1.CUs0.lds_bank_conflicts::22-23 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1321 system.cpu1.CUs0.lds_bank_conflicts::24-25 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1322 system.cpu1.CUs0.lds_bank_conflicts::26-27 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1323 system.cpu1.CUs0.lds_bank_conflicts::28-29 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1324 system.cpu1.CUs0.lds_bank_conflicts::30-31 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1325 system.cpu1.CUs0.lds_bank_conflicts::32-33 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1326 system.cpu1.CUs0.lds_bank_conflicts::34-35 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1327 system.cpu1.CUs0.lds_bank_conflicts::36-37 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1328 system.cpu1.CUs0.lds_bank_conflicts::38-39 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1329 system.cpu1.CUs0.lds_bank_conflicts::40-41 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1330 system.cpu1.CUs0.lds_bank_conflicts::42-43 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1331 system.cpu1.CUs0.lds_bank_conflicts::44-45 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1332 system.cpu1.CUs0.lds_bank_conflicts::46-47 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1333 system.cpu1.CUs0.lds_bank_conflicts::48-49 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1334 system.cpu1.CUs0.lds_bank_conflicts::50-51 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1335 system.cpu1.CUs0.lds_bank_conflicts::52-53 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1336 system.cpu1.CUs0.lds_bank_conflicts::54-55 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1337 system.cpu1.CUs0.lds_bank_conflicts::56-57 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1338 system.cpu1.CUs0.lds_bank_conflicts::58-59 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1339 system.cpu1.CUs0.lds_bank_conflicts::60-61 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1340 system.cpu1.CUs0.lds_bank_conflicts::62-63 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1341 system.cpu1.CUs0.lds_bank_conflicts::64 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1342 system.cpu1.CUs0.lds_bank_conflicts::overflows 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
1343 system.cpu1.CUs0.lds_bank_conflicts::min_value 0 # Number of bank conflicts per LDS memory packet
1344 system.cpu1.CUs0.lds_bank_conflicts::max_value 12 # Number of bank conflicts per LDS memory packet
1345 system.cpu1.CUs0.lds_bank_conflicts::total 6 # Number of bank conflicts per LDS memory packet
1346 system.cpu1.CUs0.page_divergence_dist::samples 17 # pages touched per wf (over all mem. instr.)
1347 system.cpu1.CUs0.page_divergence_dist::mean 1 # pages touched per wf (over all mem. instr.)
1348 system.cpu1.CUs0.page_divergence_dist::stdev 0 # pages touched per wf (over all mem. instr.)
1349 system.cpu1.CUs0.page_divergence_dist::underflows 0 0.00% 0.00% # pages touched per wf (over all mem. instr.)
1350 system.cpu1.CUs0.page_divergence_dist::1-4 17 100.00% 100.00% # pages touched per wf (over all mem. instr.)
1351 system.cpu1.CUs0.page_divergence_dist::5-8 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1352 system.cpu1.CUs0.page_divergence_dist::9-12 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1353 system.cpu1.CUs0.page_divergence_dist::13-16 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1354 system.cpu1.CUs0.page_divergence_dist::17-20 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1355 system.cpu1.CUs0.page_divergence_dist::21-24 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1356 system.cpu1.CUs0.page_divergence_dist::25-28 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1357 system.cpu1.CUs0.page_divergence_dist::29-32 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1358 system.cpu1.CUs0.page_divergence_dist::33-36 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1359 system.cpu1.CUs0.page_divergence_dist::37-40 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1360 system.cpu1.CUs0.page_divergence_dist::41-44 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1361 system.cpu1.CUs0.page_divergence_dist::45-48 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1362 system.cpu1.CUs0.page_divergence_dist::49-52 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1363 system.cpu1.CUs0.page_divergence_dist::53-56 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1364 system.cpu1.CUs0.page_divergence_dist::57-60 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1365 system.cpu1.CUs0.page_divergence_dist::61-64 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1366 system.cpu1.CUs0.page_divergence_dist::overflows 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
1367 system.cpu1.CUs0.page_divergence_dist::min_value 1 # pages touched per wf (over all mem. instr.)
1368 system.cpu1.CUs0.page_divergence_dist::max_value 1 # pages touched per wf (over all mem. instr.)
1369 system.cpu1.CUs0.page_divergence_dist::total 17 # pages touched per wf (over all mem. instr.)
1370 system.cpu1.CUs0.global_mem_instr_cnt 17 # dynamic global memory instructions count
1371 system.cpu1.CUs0.local_mem_instr_cnt 6 # dynamic local memory intruction count
1372 system.cpu1.CUs0.wg_blocked_due_lds_alloc 0 # Workgroup blocked due to LDS capacity
1373 system.cpu1.CUs0.num_instr_executed 141 # number of instructions executed
1374 system.cpu1.CUs0.inst_exec_rate::samples 141 # Instruction Execution Rate: Number of executed vector instructions per cycle
1375 system.cpu1.CUs0.inst_exec_rate::mean 86.382979 # Instruction Execution Rate: Number of executed vector instructions per cycle
1376 system.cpu1.CUs0.inst_exec_rate::stdev 229.391669 # Instruction Execution Rate: Number of executed vector instructions per cycle
1377 system.cpu1.CUs0.inst_exec_rate::underflows 0 0.00% 0.00% # Instruction Execution Rate: Number of executed vector instructions per cycle
1378 system.cpu1.CUs0.inst_exec_rate::0-1 1 0.71% 0.71% # Instruction Execution Rate: Number of executed vector instructions per cycle
1379 system.cpu1.CUs0.inst_exec_rate::2-3 12 8.51% 9.22% # Instruction Execution Rate: Number of executed vector instructions per cycle
1380 system.cpu1.CUs0.inst_exec_rate::4-5 51 36.17% 45.39% # Instruction Execution Rate: Number of executed vector instructions per cycle
1381 system.cpu1.CUs0.inst_exec_rate::6-7 32 22.70% 68.09% # Instruction Execution Rate: Number of executed vector instructions per cycle
1382 system.cpu1.CUs0.inst_exec_rate::8-9 2 1.42% 69.50% # Instruction Execution Rate: Number of executed vector instructions per cycle
1383 system.cpu1.CUs0.inst_exec_rate::10 2 1.42% 70.92% # Instruction Execution Rate: Number of executed vector instructions per cycle
1384 system.cpu1.CUs0.inst_exec_rate::overflows 41 29.08% 100.00% # Instruction Execution Rate: Number of executed vector instructions per cycle
1385 system.cpu1.CUs0.inst_exec_rate::min_value 1 # Instruction Execution Rate: Number of executed vector instructions per cycle
1386 system.cpu1.CUs0.inst_exec_rate::max_value 1291 # Instruction Execution Rate: Number of executed vector instructions per cycle
1387 system.cpu1.CUs0.inst_exec_rate::total 141 # Instruction Execution Rate: Number of executed vector instructions per cycle
1388 system.cpu1.CUs0.num_vec_ops_executed 6769 # number of vec ops executed (e.g. VSZ/inst)
1389 system.cpu1.CUs0.num_total_cycles 3358 # number of cycles the CU ran for
1390 system.cpu1.CUs0.vpc 2.015783 # Vector Operations per cycle (this CU only)
1391 system.cpu1.CUs0.ipc 0.041989 # Instructions per cycle (this CU only)
1392 system.cpu1.CUs0.warp_execution_dist::samples 141 # number of lanes active per instruction (oval all instructions)
1393 system.cpu1.CUs0.warp_execution_dist::mean 48.007092 # number of lanes active per instruction (oval all instructions)
1394 system.cpu1.CUs0.warp_execution_dist::stdev 23.719942 # number of lanes active per instruction (oval all instructions)
1395 system.cpu1.CUs0.warp_execution_dist::underflows 0 0.00% 0.00% # number of lanes active per instruction (oval all instructions)
1396 system.cpu1.CUs0.warp_execution_dist::1-4 5 3.55% 3.55% # number of lanes active per instruction (oval all instructions)
1397 system.cpu1.CUs0.warp_execution_dist::5-8 0 0.00% 3.55% # number of lanes active per instruction (oval all instructions)
1398 system.cpu1.CUs0.warp_execution_dist::9-12 0 0.00% 3.55% # number of lanes active per instruction (oval all instructions)
1399 system.cpu1.CUs0.warp_execution_dist::13-16 36 25.53% 29.08% # number of lanes active per instruction (oval all instructions)
1400 system.cpu1.CUs0.warp_execution_dist::17-20 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
1401 system.cpu1.CUs0.warp_execution_dist::21-24 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
1402 system.cpu1.CUs0.warp_execution_dist::25-28 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
1403 system.cpu1.CUs0.warp_execution_dist::29-32 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
1404 system.cpu1.CUs0.warp_execution_dist::33-36 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
1405 system.cpu1.CUs0.warp_execution_dist::37-40 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
1406 system.cpu1.CUs0.warp_execution_dist::41-44 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
1407 system.cpu1.CUs0.warp_execution_dist::45-48 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
1408 system.cpu1.CUs0.warp_execution_dist::49-52 8 5.67% 34.75% # number of lanes active per instruction (oval all instructions)
1409 system.cpu1.CUs0.warp_execution_dist::53-56 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions)
1410 system.cpu1.CUs0.warp_execution_dist::57-60 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions)
1411 system.cpu1.CUs0.warp_execution_dist::61-64 92 65.25% 100.00% # number of lanes active per instruction (oval all instructions)
1412 system.cpu1.CUs0.warp_execution_dist::overflows 0 0.00% 100.00% # number of lanes active per instruction (oval all instructions)
1413 system.cpu1.CUs0.warp_execution_dist::min_value 1 # number of lanes active per instruction (oval all instructions)
1414 system.cpu1.CUs0.warp_execution_dist::max_value 64 # number of lanes active per instruction (oval all instructions)
1415 system.cpu1.CUs0.warp_execution_dist::total 141 # number of lanes active per instruction (oval all instructions)
1416 system.cpu1.CUs0.gmem_lanes_execution_dist::samples 18 # number of active lanes per global memory instruction
1417 system.cpu1.CUs0.gmem_lanes_execution_dist::mean 37.833333 # number of active lanes per global memory instruction
1418 system.cpu1.CUs0.gmem_lanes_execution_dist::stdev 27.064737 # number of active lanes per global memory instruction
1419 system.cpu1.CUs0.gmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per global memory instruction
1420 system.cpu1.CUs0.gmem_lanes_execution_dist::1-4 1 5.56% 5.56% # number of active lanes per global memory instruction
1421 system.cpu1.CUs0.gmem_lanes_execution_dist::5-8 0 0.00% 5.56% # number of active lanes per global memory instruction
1422 system.cpu1.CUs0.gmem_lanes_execution_dist::9-12 0 0.00% 5.56% # number of active lanes per global memory instruction
1423 system.cpu1.CUs0.gmem_lanes_execution_dist::13-16 8 44.44% 50.00% # number of active lanes per global memory instruction
1424 system.cpu1.CUs0.gmem_lanes_execution_dist::17-20 0 0.00% 50.00% # number of active lanes per global memory instruction
1425 system.cpu1.CUs0.gmem_lanes_execution_dist::21-24 0 0.00% 50.00% # number of active lanes per global memory instruction
1426 system.cpu1.CUs0.gmem_lanes_execution_dist::25-28 0 0.00% 50.00% # number of active lanes per global memory instruction
1427 system.cpu1.CUs0.gmem_lanes_execution_dist::29-32 0 0.00% 50.00% # number of active lanes per global memory instruction
1428 system.cpu1.CUs0.gmem_lanes_execution_dist::33-36 0 0.00% 50.00% # number of active lanes per global memory instruction
1429 system.cpu1.CUs0.gmem_lanes_execution_dist::37-40 0 0.00% 50.00% # number of active lanes per global memory instruction
1430 system.cpu1.CUs0.gmem_lanes_execution_dist::41-44 0 0.00% 50.00% # number of active lanes per global memory instruction
1431 system.cpu1.CUs0.gmem_lanes_execution_dist::45-48 0 0.00% 50.00% # number of active lanes per global memory instruction
1432 system.cpu1.CUs0.gmem_lanes_execution_dist::49-52 0 0.00% 50.00% # number of active lanes per global memory instruction
1433 system.cpu1.CUs0.gmem_lanes_execution_dist::53-56 0 0.00% 50.00% # number of active lanes per global memory instruction
1434 system.cpu1.CUs0.gmem_lanes_execution_dist::57-60 0 0.00% 50.00% # number of active lanes per global memory instruction
1435 system.cpu1.CUs0.gmem_lanes_execution_dist::61-64 9 50.00% 100.00% # number of active lanes per global memory instruction
1436 system.cpu1.CUs0.gmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per global memory instruction
1437 system.cpu1.CUs0.gmem_lanes_execution_dist::min_value 1 # number of active lanes per global memory instruction
1438 system.cpu1.CUs0.gmem_lanes_execution_dist::max_value 64 # number of active lanes per global memory instruction
1439 system.cpu1.CUs0.gmem_lanes_execution_dist::total 18 # number of active lanes per global memory instruction
1440 system.cpu1.CUs0.lmem_lanes_execution_dist::samples 6 # number of active lanes per local memory instruction
1441 system.cpu1.CUs0.lmem_lanes_execution_dist::mean 19.500000 # number of active lanes per local memory instruction
1442 system.cpu1.CUs0.lmem_lanes_execution_dist::stdev 22.322634 # number of active lanes per local memory instruction
1443 system.cpu1.CUs0.lmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per local memory instruction
1444 system.cpu1.CUs0.lmem_lanes_execution_dist::1-4 1 16.67% 16.67% # number of active lanes per local memory instruction
1445 system.cpu1.CUs0.lmem_lanes_execution_dist::5-8 0 0.00% 16.67% # number of active lanes per local memory instruction
1446 system.cpu1.CUs0.lmem_lanes_execution_dist::9-12 0 0.00% 16.67% # number of active lanes per local memory instruction
1447 system.cpu1.CUs0.lmem_lanes_execution_dist::13-16 4 66.67% 83.33% # number of active lanes per local memory instruction
1448 system.cpu1.CUs0.lmem_lanes_execution_dist::17-20 0 0.00% 83.33% # number of active lanes per local memory instruction
1449 system.cpu1.CUs0.lmem_lanes_execution_dist::21-24 0 0.00% 83.33% # number of active lanes per local memory instruction
1450 system.cpu1.CUs0.lmem_lanes_execution_dist::25-28 0 0.00% 83.33% # number of active lanes per local memory instruction
1451 system.cpu1.CUs0.lmem_lanes_execution_dist::29-32 0 0.00% 83.33% # number of active lanes per local memory instruction
1452 system.cpu1.CUs0.lmem_lanes_execution_dist::33-36 0 0.00% 83.33% # number of active lanes per local memory instruction
1453 system.cpu1.CUs0.lmem_lanes_execution_dist::37-40 0 0.00% 83.33% # number of active lanes per local memory instruction
1454 system.cpu1.CUs0.lmem_lanes_execution_dist::41-44 0 0.00% 83.33% # number of active lanes per local memory instruction
1455 system.cpu1.CUs0.lmem_lanes_execution_dist::45-48 0 0.00% 83.33% # number of active lanes per local memory instruction
1456 system.cpu1.CUs0.lmem_lanes_execution_dist::49-52 0 0.00% 83.33% # number of active lanes per local memory instruction
1457 system.cpu1.CUs0.lmem_lanes_execution_dist::53-56 0 0.00% 83.33% # number of active lanes per local memory instruction
1458 system.cpu1.CUs0.lmem_lanes_execution_dist::57-60 0 0.00% 83.33% # number of active lanes per local memory instruction
1459 system.cpu1.CUs0.lmem_lanes_execution_dist::61-64 1 16.67% 100.00% # number of active lanes per local memory instruction
1460 system.cpu1.CUs0.lmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per local memory instruction
1461 system.cpu1.CUs0.lmem_lanes_execution_dist::min_value 1 # number of active lanes per local memory instruction
1462 system.cpu1.CUs0.lmem_lanes_execution_dist::max_value 64 # number of active lanes per local memory instruction
1463 system.cpu1.CUs0.lmem_lanes_execution_dist::total 6 # number of active lanes per local memory instruction
1464 system.cpu1.CUs0.num_alu_insts_executed 118 # Number of dynamic non-GM memory insts executed
1465 system.cpu1.CUs0.times_wg_blocked_due_vgpr_alloc 0 # Number of times WGs are blocked due to VGPR allocation per SIMD
1466 system.cpu1.CUs0.num_CAS_ops 0 # number of compare and swap operations
1467 system.cpu1.CUs0.num_failed_CAS_ops 0 # number of compare and swap operations that failed
1468 system.cpu1.CUs0.num_completed_wfs 4 # number of completed wavefronts
1469 system.cpu1.CUs1.wavefronts00.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1470 system.cpu1.CUs1.wavefronts00.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1471 system.cpu1.CUs1.wavefronts00.timesBlockedDueRAWDependencies 381 # number of times the wf's instructions are blocked due to RAW dependencies
1472 system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::samples 39 # number of executed instructions with N source register operands
1473 system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::mean 0.794872 # number of executed instructions with N source register operands
1474 system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::stdev 0.863880 # number of executed instructions with N source register operands
1475 system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
1476 system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::0-1 28 71.79% 71.79% # number of executed instructions with N source register operands
1477 system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::2-3 11 28.21% 100.00% # number of executed instructions with N source register operands
1478 system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
1479 system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
1480 system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1481 system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
1482 system.cpu1.CUs1.wavefronts00.src_reg_operand_dist::total 39 # number of executed instructions with N source register operands
1483 system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::samples 39 # number of executed instructions with N destination register operands
1484 system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::mean 0.589744 # number of executed instructions with N destination register operands
1485 system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::stdev 0.498310 # number of executed instructions with N destination register operands
1486 system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
1487 system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::0-1 39 100.00% 100.00% # number of executed instructions with N destination register operands
1488 system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
1489 system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
1490 system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1491 system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
1492 system.cpu1.CUs1.wavefronts00.dst_reg_operand_dist::total 39 # number of executed instructions with N destination register operands
1493 system.cpu1.CUs1.wavefronts01.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1494 system.cpu1.CUs1.wavefronts01.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1495 system.cpu1.CUs1.wavefronts01.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1496 system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1497 system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1498 system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1499 system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1500 system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1501 system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1502 system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1503 system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1504 system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1505 system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1506 system.cpu1.CUs1.wavefronts01.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1507 system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1508 system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1509 system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1510 system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1511 system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1512 system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1513 system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1514 system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1515 system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1516 system.cpu1.CUs1.wavefronts01.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1517 system.cpu1.CUs1.wavefronts02.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1518 system.cpu1.CUs1.wavefronts02.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1519 system.cpu1.CUs1.wavefronts02.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1520 system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1521 system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1522 system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1523 system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1524 system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1525 system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1526 system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1527 system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1528 system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1529 system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1530 system.cpu1.CUs1.wavefronts02.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1531 system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1532 system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1533 system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1534 system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1535 system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1536 system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1537 system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1538 system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1539 system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1540 system.cpu1.CUs1.wavefronts02.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1541 system.cpu1.CUs1.wavefronts03.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1542 system.cpu1.CUs1.wavefronts03.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1543 system.cpu1.CUs1.wavefronts03.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1544 system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1545 system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1546 system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1547 system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1548 system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1549 system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1550 system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1551 system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1552 system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1553 system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1554 system.cpu1.CUs1.wavefronts03.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1555 system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1556 system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1557 system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1558 system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1559 system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1560 system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1561 system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1562 system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1563 system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1564 system.cpu1.CUs1.wavefronts03.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1565 system.cpu1.CUs1.wavefronts04.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1566 system.cpu1.CUs1.wavefronts04.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1567 system.cpu1.CUs1.wavefronts04.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1568 system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1569 system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1570 system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1571 system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1572 system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1573 system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1574 system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1575 system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1576 system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1577 system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1578 system.cpu1.CUs1.wavefronts04.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1579 system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1580 system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1581 system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1582 system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1583 system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1584 system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1585 system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1586 system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1587 system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1588 system.cpu1.CUs1.wavefronts04.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1589 system.cpu1.CUs1.wavefronts05.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1590 system.cpu1.CUs1.wavefronts05.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1591 system.cpu1.CUs1.wavefronts05.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1592 system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1593 system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1594 system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1595 system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1596 system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1597 system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1598 system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1599 system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1600 system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1601 system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1602 system.cpu1.CUs1.wavefronts05.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1603 system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1604 system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1605 system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1606 system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1607 system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1608 system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1609 system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1610 system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1611 system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1612 system.cpu1.CUs1.wavefronts05.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1613 system.cpu1.CUs1.wavefronts06.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1614 system.cpu1.CUs1.wavefronts06.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1615 system.cpu1.CUs1.wavefronts06.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1616 system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1617 system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1618 system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1619 system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1620 system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1621 system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1622 system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1623 system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1624 system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1625 system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1626 system.cpu1.CUs1.wavefronts06.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1627 system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1628 system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1629 system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1630 system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1631 system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1632 system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1633 system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1634 system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1635 system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1636 system.cpu1.CUs1.wavefronts06.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1637 system.cpu1.CUs1.wavefronts07.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1638 system.cpu1.CUs1.wavefronts07.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1639 system.cpu1.CUs1.wavefronts07.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1640 system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1641 system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1642 system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1643 system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1644 system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1645 system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1646 system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1647 system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1648 system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1649 system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1650 system.cpu1.CUs1.wavefronts07.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1651 system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1652 system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1653 system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1654 system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1655 system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1656 system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1657 system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1658 system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1659 system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1660 system.cpu1.CUs1.wavefronts07.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1661 system.cpu1.CUs1.wavefronts08.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1662 system.cpu1.CUs1.wavefronts08.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1663 system.cpu1.CUs1.wavefronts08.timesBlockedDueRAWDependencies 356 # number of times the wf's instructions are blocked due to RAW dependencies
1664 system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands
1665 system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands
1666 system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands
1667 system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
1668 system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands
1669 system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands
1670 system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
1671 system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
1672 system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1673 system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
1674 system.cpu1.CUs1.wavefronts08.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands
1675 system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands
1676 system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands
1677 system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands
1678 system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
1679 system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands
1680 system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
1681 system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
1682 system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1683 system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
1684 system.cpu1.CUs1.wavefronts08.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands
1685 system.cpu1.CUs1.wavefronts09.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1686 system.cpu1.CUs1.wavefronts09.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1687 system.cpu1.CUs1.wavefronts09.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1688 system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1689 system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1690 system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1691 system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1692 system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1693 system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1694 system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1695 system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1696 system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1697 system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1698 system.cpu1.CUs1.wavefronts09.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1699 system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1700 system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1701 system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1702 system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1703 system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1704 system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1705 system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1706 system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1707 system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1708 system.cpu1.CUs1.wavefronts09.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1709 system.cpu1.CUs1.wavefronts10.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1710 system.cpu1.CUs1.wavefronts10.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1711 system.cpu1.CUs1.wavefronts10.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1712 system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1713 system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1714 system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1715 system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1716 system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1717 system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1718 system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1719 system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1720 system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1721 system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1722 system.cpu1.CUs1.wavefronts10.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1723 system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1724 system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1725 system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1726 system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1727 system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1728 system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1729 system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1730 system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1731 system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1732 system.cpu1.CUs1.wavefronts10.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1733 system.cpu1.CUs1.wavefronts11.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1734 system.cpu1.CUs1.wavefronts11.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1735 system.cpu1.CUs1.wavefronts11.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1736 system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1737 system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1738 system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1739 system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1740 system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1741 system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1742 system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1743 system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1744 system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1745 system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1746 system.cpu1.CUs1.wavefronts11.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1747 system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1748 system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1749 system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1750 system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1751 system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1752 system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1753 system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1754 system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1755 system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1756 system.cpu1.CUs1.wavefronts11.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1757 system.cpu1.CUs1.wavefronts12.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1758 system.cpu1.CUs1.wavefronts12.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1759 system.cpu1.CUs1.wavefronts12.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1760 system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1761 system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1762 system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1763 system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1764 system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1765 system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1766 system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1767 system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1768 system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1769 system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1770 system.cpu1.CUs1.wavefronts12.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1771 system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1772 system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1773 system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1774 system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1775 system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1776 system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1777 system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1778 system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1779 system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1780 system.cpu1.CUs1.wavefronts12.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1781 system.cpu1.CUs1.wavefronts13.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1782 system.cpu1.CUs1.wavefronts13.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1783 system.cpu1.CUs1.wavefronts13.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1784 system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1785 system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1786 system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1787 system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1788 system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1789 system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1790 system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1791 system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1792 system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1793 system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1794 system.cpu1.CUs1.wavefronts13.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1795 system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1796 system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1797 system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1798 system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1799 system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1800 system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1801 system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1802 system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1803 system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1804 system.cpu1.CUs1.wavefronts13.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1805 system.cpu1.CUs1.wavefronts14.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1806 system.cpu1.CUs1.wavefronts14.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1807 system.cpu1.CUs1.wavefronts14.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1808 system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1809 system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1810 system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1811 system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1812 system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1813 system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1814 system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1815 system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1816 system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1817 system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1818 system.cpu1.CUs1.wavefronts14.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1819 system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1820 system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1821 system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1822 system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1823 system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1824 system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1825 system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1826 system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1827 system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1828 system.cpu1.CUs1.wavefronts14.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1829 system.cpu1.CUs1.wavefronts15.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1830 system.cpu1.CUs1.wavefronts15.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1831 system.cpu1.CUs1.wavefronts15.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1832 system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1833 system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1834 system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1835 system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1836 system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1837 system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1838 system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1839 system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1840 system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1841 system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1842 system.cpu1.CUs1.wavefronts15.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1843 system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1844 system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1845 system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1846 system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1847 system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1848 system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1849 system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1850 system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1851 system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1852 system.cpu1.CUs1.wavefronts15.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1853 system.cpu1.CUs1.wavefronts16.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1854 system.cpu1.CUs1.wavefronts16.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1855 system.cpu1.CUs1.wavefronts16.timesBlockedDueRAWDependencies 356 # number of times the wf's instructions are blocked due to RAW dependencies
1856 system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands
1857 system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands
1858 system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands
1859 system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
1860 system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands
1861 system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands
1862 system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
1863 system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
1864 system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1865 system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
1866 system.cpu1.CUs1.wavefronts16.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands
1867 system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands
1868 system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands
1869 system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands
1870 system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
1871 system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands
1872 system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
1873 system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
1874 system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1875 system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
1876 system.cpu1.CUs1.wavefronts16.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands
1877 system.cpu1.CUs1.wavefronts17.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1878 system.cpu1.CUs1.wavefronts17.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1879 system.cpu1.CUs1.wavefronts17.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1880 system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1881 system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1882 system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1883 system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1884 system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1885 system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1886 system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1887 system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1888 system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1889 system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1890 system.cpu1.CUs1.wavefronts17.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1891 system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1892 system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1893 system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1894 system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1895 system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1896 system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1897 system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1898 system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1899 system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1900 system.cpu1.CUs1.wavefronts17.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1901 system.cpu1.CUs1.wavefronts18.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1902 system.cpu1.CUs1.wavefronts18.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1903 system.cpu1.CUs1.wavefronts18.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1904 system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1905 system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1906 system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1907 system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1908 system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1909 system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1910 system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1911 system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1912 system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1913 system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1914 system.cpu1.CUs1.wavefronts18.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1915 system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1916 system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1917 system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1918 system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1919 system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1920 system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1921 system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1922 system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1923 system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1924 system.cpu1.CUs1.wavefronts18.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1925 system.cpu1.CUs1.wavefronts19.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1926 system.cpu1.CUs1.wavefronts19.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1927 system.cpu1.CUs1.wavefronts19.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1928 system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1929 system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1930 system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1931 system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1932 system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1933 system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1934 system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1935 system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1936 system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1937 system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1938 system.cpu1.CUs1.wavefronts19.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1939 system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1940 system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1941 system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1942 system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1943 system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1944 system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1945 system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1946 system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1947 system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1948 system.cpu1.CUs1.wavefronts19.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1949 system.cpu1.CUs1.wavefronts20.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1950 system.cpu1.CUs1.wavefronts20.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1951 system.cpu1.CUs1.wavefronts20.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1952 system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1953 system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1954 system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1955 system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1956 system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1957 system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1958 system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1959 system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1960 system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1961 system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1962 system.cpu1.CUs1.wavefronts20.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1963 system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1964 system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1965 system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1966 system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1967 system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1968 system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1969 system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1970 system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1971 system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1972 system.cpu1.CUs1.wavefronts20.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1973 system.cpu1.CUs1.wavefronts21.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1974 system.cpu1.CUs1.wavefronts21.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1975 system.cpu1.CUs1.wavefronts21.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
1976 system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
1977 system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
1978 system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
1979 system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
1980 system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
1981 system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
1982 system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
1983 system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
1984 system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
1985 system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
1986 system.cpu1.CUs1.wavefronts21.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
1987 system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
1988 system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
1989 system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
1990 system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
1991 system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
1992 system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
1993 system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
1994 system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
1995 system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
1996 system.cpu1.CUs1.wavefronts21.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
1997 system.cpu1.CUs1.wavefronts22.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
1998 system.cpu1.CUs1.wavefronts22.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
1999 system.cpu1.CUs1.wavefronts22.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
2000 system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
2001 system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
2002 system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
2003 system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
2004 system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
2005 system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
2006 system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
2007 system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
2008 system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
2009 system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
2010 system.cpu1.CUs1.wavefronts22.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
2011 system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
2012 system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
2013 system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
2014 system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
2015 system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
2016 system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
2017 system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
2018 system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
2019 system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
2020 system.cpu1.CUs1.wavefronts22.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
2021 system.cpu1.CUs1.wavefronts23.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
2022 system.cpu1.CUs1.wavefronts23.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
2023 system.cpu1.CUs1.wavefronts23.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
2024 system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
2025 system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
2026 system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
2027 system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
2028 system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
2029 system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
2030 system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
2031 system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
2032 system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
2033 system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
2034 system.cpu1.CUs1.wavefronts23.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
2035 system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
2036 system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
2037 system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
2038 system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
2039 system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
2040 system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
2041 system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
2042 system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
2043 system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
2044 system.cpu1.CUs1.wavefronts23.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
2045 system.cpu1.CUs1.wavefronts24.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
2046 system.cpu1.CUs1.wavefronts24.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
2047 system.cpu1.CUs1.wavefronts24.timesBlockedDueRAWDependencies 339 # number of times the wf's instructions are blocked due to RAW dependencies
2048 system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::samples 34 # number of executed instructions with N source register operands
2049 system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::mean 0.852941 # number of executed instructions with N source register operands
2050 system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::stdev 0.857493 # number of executed instructions with N source register operands
2051 system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N source register operands
2052 system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::0-1 24 70.59% 70.59% # number of executed instructions with N source register operands
2053 system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::2-3 10 29.41% 100.00% # number of executed instructions with N source register operands
2054 system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::4 0 0.00% 100.00% # number of executed instructions with N source register operands
2055 system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N source register operands
2056 system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
2057 system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::max_value 2 # number of executed instructions with N source register operands
2058 system.cpu1.CUs1.wavefronts24.src_reg_operand_dist::total 34 # number of executed instructions with N source register operands
2059 system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::samples 34 # number of executed instructions with N destination register operands
2060 system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::mean 0.617647 # number of executed instructions with N destination register operands
2061 system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::stdev 0.493270 # number of executed instructions with N destination register operands
2062 system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::underflows 0 0.00% 0.00% # number of executed instructions with N destination register operands
2063 system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::0-1 34 100.00% 100.00% # number of executed instructions with N destination register operands
2064 system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::2-3 0 0.00% 100.00% # number of executed instructions with N destination register operands
2065 system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::overflows 0 0.00% 100.00% # number of executed instructions with N destination register operands
2066 system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
2067 system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::max_value 1 # number of executed instructions with N destination register operands
2068 system.cpu1.CUs1.wavefronts24.dst_reg_operand_dist::total 34 # number of executed instructions with N destination register operands
2069 system.cpu1.CUs1.wavefronts25.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
2070 system.cpu1.CUs1.wavefronts25.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
2071 system.cpu1.CUs1.wavefronts25.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
2072 system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
2073 system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
2074 system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
2075 system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
2076 system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
2077 system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
2078 system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
2079 system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
2080 system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
2081 system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
2082 system.cpu1.CUs1.wavefronts25.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
2083 system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
2084 system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
2085 system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
2086 system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
2087 system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
2088 system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
2089 system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
2090 system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
2091 system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
2092 system.cpu1.CUs1.wavefronts25.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
2093 system.cpu1.CUs1.wavefronts26.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
2094 system.cpu1.CUs1.wavefronts26.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
2095 system.cpu1.CUs1.wavefronts26.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
2096 system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
2097 system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
2098 system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
2099 system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
2100 system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
2101 system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
2102 system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
2103 system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
2104 system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
2105 system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
2106 system.cpu1.CUs1.wavefronts26.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
2107 system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
2108 system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
2109 system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
2110 system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
2111 system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
2112 system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
2113 system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
2114 system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
2115 system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
2116 system.cpu1.CUs1.wavefronts26.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
2117 system.cpu1.CUs1.wavefronts27.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
2118 system.cpu1.CUs1.wavefronts27.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
2119 system.cpu1.CUs1.wavefronts27.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
2120 system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
2121 system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
2122 system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
2123 system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
2124 system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
2125 system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
2126 system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
2127 system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
2128 system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
2129 system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
2130 system.cpu1.CUs1.wavefronts27.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
2131 system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
2132 system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
2133 system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
2134 system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
2135 system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
2136 system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
2137 system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
2138 system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
2139 system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
2140 system.cpu1.CUs1.wavefronts27.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
2141 system.cpu1.CUs1.wavefronts28.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
2142 system.cpu1.CUs1.wavefronts28.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
2143 system.cpu1.CUs1.wavefronts28.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
2144 system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
2145 system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
2146 system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
2147 system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
2148 system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
2149 system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
2150 system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
2151 system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
2152 system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
2153 system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
2154 system.cpu1.CUs1.wavefronts28.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
2155 system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
2156 system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
2157 system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
2158 system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
2159 system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
2160 system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
2161 system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
2162 system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
2163 system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
2164 system.cpu1.CUs1.wavefronts28.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
2165 system.cpu1.CUs1.wavefronts29.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
2166 system.cpu1.CUs1.wavefronts29.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
2167 system.cpu1.CUs1.wavefronts29.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
2168 system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
2169 system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
2170 system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
2171 system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
2172 system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
2173 system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
2174 system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
2175 system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
2176 system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
2177 system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
2178 system.cpu1.CUs1.wavefronts29.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
2179 system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
2180 system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
2181 system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
2182 system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
2183 system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
2184 system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
2185 system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
2186 system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
2187 system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
2188 system.cpu1.CUs1.wavefronts29.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
2189 system.cpu1.CUs1.wavefronts30.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
2190 system.cpu1.CUs1.wavefronts30.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
2191 system.cpu1.CUs1.wavefronts30.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
2192 system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
2193 system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
2194 system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
2195 system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
2196 system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
2197 system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
2198 system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
2199 system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
2200 system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
2201 system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
2202 system.cpu1.CUs1.wavefronts30.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
2203 system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
2204 system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
2205 system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
2206 system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
2207 system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
2208 system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
2209 system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
2210 system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
2211 system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
2212 system.cpu1.CUs1.wavefronts30.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
2213 system.cpu1.CUs1.wavefronts31.timesBlockedDueVrfPortAvail 0 # number of times instructions are blocked due to VRF port availability
2214 system.cpu1.CUs1.wavefronts31.timesBlockedDueWAXDependencies 0 # number of times the wf's instructions are blocked due to WAW or WAR dependencies
2215 system.cpu1.CUs1.wavefronts31.timesBlockedDueRAWDependencies 0 # number of times the wf's instructions are blocked due to RAW dependencies
2216 system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::samples 0 # number of executed instructions with N source register operands
2217 system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::mean nan # number of executed instructions with N source register operands
2218 system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::stdev nan # number of executed instructions with N source register operands
2219 system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::underflows 0 # number of executed instructions with N source register operands
2220 system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::0-1 0 # number of executed instructions with N source register operands
2221 system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::2-3 0 # number of executed instructions with N source register operands
2222 system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::4 0 # number of executed instructions with N source register operands
2223 system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::overflows 0 # number of executed instructions with N source register operands
2224 system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::min_value 0 # number of executed instructions with N source register operands
2225 system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::max_value 0 # number of executed instructions with N source register operands
2226 system.cpu1.CUs1.wavefronts31.src_reg_operand_dist::total 0 # number of executed instructions with N source register operands
2227 system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::samples 0 # number of executed instructions with N destination register operands
2228 system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::mean nan # number of executed instructions with N destination register operands
2229 system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::stdev nan # number of executed instructions with N destination register operands
2230 system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::underflows 0 # number of executed instructions with N destination register operands
2231 system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::0-1 0 # number of executed instructions with N destination register operands
2232 system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::2-3 0 # number of executed instructions with N destination register operands
2233 system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::overflows 0 # number of executed instructions with N destination register operands
2234 system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::min_value 0 # number of executed instructions with N destination register operands
2235 system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::max_value 0 # number of executed instructions with N destination register operands
2236 system.cpu1.CUs1.wavefronts31.dst_reg_operand_dist::total 0 # number of executed instructions with N destination register operands
2237 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::samples 43 # For each instruction fetch request recieved record how many instructions you got from it
2238 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::mean 5.813953 # For each instruction fetch request recieved record how many instructions you got from it
2239 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::stdev 2.683777 # For each instruction fetch request recieved record how many instructions you got from it
2240 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::underflows 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it
2241 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::1 0 0.00% 0.00% # For each instruction fetch request recieved record how many instructions you got from it
2242 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::2 8 18.60% 18.60% # For each instruction fetch request recieved record how many instructions you got from it
2243 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::3 8 18.60% 37.21% # For each instruction fetch request recieved record how many instructions you got from it
2244 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::4 1 2.33% 39.53% # For each instruction fetch request recieved record how many instructions you got from it
2245 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::5 0 0.00% 39.53% # For each instruction fetch request recieved record how many instructions you got from it
2246 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::6 1 2.33% 41.86% # For each instruction fetch request recieved record how many instructions you got from it
2247 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::7 0 0.00% 41.86% # For each instruction fetch request recieved record how many instructions you got from it
2248 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::8 25 58.14% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2249 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::9 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2250 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::10 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2251 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::11 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2252 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::12 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2253 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::13 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2254 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::14 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2255 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::15 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2256 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::16 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2257 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::17 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2258 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::18 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2259 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::19 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2260 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::20 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2261 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::21 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2262 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::22 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2263 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::23 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2264 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::24 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2265 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::25 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2266 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::26 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2267 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::27 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2268 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::28 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2269 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::29 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2270 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::30 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2271 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::31 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2272 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::32 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2273 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::overflows 0 0.00% 100.00% # For each instruction fetch request recieved record how many instructions you got from it
2274 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::min_value 2 # For each instruction fetch request recieved record how many instructions you got from it
2275 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::max_value 8 # For each instruction fetch request recieved record how many instructions you got from it
2276 system.cpu1.CUs1.FetchStage.inst_fetch_instr_returned::total 43 # For each instruction fetch request recieved record how many instructions you got from it
2277 system.cpu1.CUs1.ExecStage.num_cycles_with_no_issue 3228 # number of cycles the CU issues nothing
2278 system.cpu1.CUs1.ExecStage.num_cycles_with_instr_issued 130 # number of cycles the CU issued at least one instruction
2279 system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU0 30 # Number of cycles at least one instruction of specific type issued
2280 system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU1 29 # Number of cycles at least one instruction of specific type issued
2281 system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU2 29 # Number of cycles at least one instruction of specific type issued
2282 system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::ALU3 29 # Number of cycles at least one instruction of specific type issued
2283 system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::GM 18 # Number of cycles at least one instruction of specific type issued
2284 system.cpu1.CUs1.ExecStage.num_cycles_with_instrtype_issue::LM 6 # Number of cycles at least one instruction of specific type issued
2285 system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU0 778 # Number of cycles no instruction of specific type issued
2286 system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU1 472 # Number of cycles no instruction of specific type issued
2287 system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU2 447 # Number of cycles no instruction of specific type issued
2288 system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::ALU3 411 # Number of cycles no instruction of specific type issued
2289 system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::GM 417 # Number of cycles no instruction of specific type issued
2290 system.cpu1.CUs1.ExecStage.num_cycles_with_instr_type_no_issue::LM 26 # Number of cycles no instruction of specific type issued
2291 system.cpu1.CUs1.ExecStage.spc::samples 3358 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
2292 system.cpu1.CUs1.ExecStage.spc::mean 0.041989 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
2293 system.cpu1.CUs1.ExecStage.spc::stdev 0.217686 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
2294 system.cpu1.CUs1.ExecStage.spc::underflows 0 0.00% 0.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
2295 system.cpu1.CUs1.ExecStage.spc::0 3228 96.13% 96.13% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
2296 system.cpu1.CUs1.ExecStage.spc::1 120 3.57% 99.70% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
2297 system.cpu1.CUs1.ExecStage.spc::2 9 0.27% 99.97% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
2298 system.cpu1.CUs1.ExecStage.spc::3 1 0.03% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
2299 system.cpu1.CUs1.ExecStage.spc::4 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
2300 system.cpu1.CUs1.ExecStage.spc::5 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
2301 system.cpu1.CUs1.ExecStage.spc::6 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
2302 system.cpu1.CUs1.ExecStage.spc::overflows 0 0.00% 100.00% # Execution units active per cycle (Exec unit=SIMD,MemPipe)
2303 system.cpu1.CUs1.ExecStage.spc::min_value 0 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
2304 system.cpu1.CUs1.ExecStage.spc::max_value 3 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
2305 system.cpu1.CUs1.ExecStage.spc::total 3358 # Execution units active per cycle (Exec unit=SIMD,MemPipe)
2306 system.cpu1.CUs1.ExecStage.num_transitions_active_to_idle 81 # number of CU transitions from active to idle
2307 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::samples 81 # duration of idle periods in cycles
2308 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::mean 38.617284 # duration of idle periods in cycles
2309 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::stdev 158.076213 # duration of idle periods in cycles
2310 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::underflows 0 0.00% 0.00% # duration of idle periods in cycles
2311 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::0-4 60 74.07% 74.07% # duration of idle periods in cycles
2312 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::5-9 10 12.35% 86.42% # duration of idle periods in cycles
2313 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::10-14 0 0.00% 86.42% # duration of idle periods in cycles
2314 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::15-19 2 2.47% 88.89% # duration of idle periods in cycles
2315 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::20-24 2 2.47% 91.36% # duration of idle periods in cycles
2316 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::25-29 0 0.00% 91.36% # duration of idle periods in cycles
2317 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::30-34 0 0.00% 91.36% # duration of idle periods in cycles
2318 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::35-39 0 0.00% 91.36% # duration of idle periods in cycles
2319 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::40-44 0 0.00% 91.36% # duration of idle periods in cycles
2320 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::45-49 0 0.00% 91.36% # duration of idle periods in cycles
2321 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::50-54 0 0.00% 91.36% # duration of idle periods in cycles
2322 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::55-59 0 0.00% 91.36% # duration of idle periods in cycles
2323 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::60-64 0 0.00% 91.36% # duration of idle periods in cycles
2324 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::65-69 0 0.00% 91.36% # duration of idle periods in cycles
2325 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::70-74 0 0.00% 91.36% # duration of idle periods in cycles
2326 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::75 0 0.00% 91.36% # duration of idle periods in cycles
2327 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::overflows 7 8.64% 100.00% # duration of idle periods in cycles
2328 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::min_value 1 # duration of idle periods in cycles
2329 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::max_value 1293 # duration of idle periods in cycles
2330 system.cpu1.CUs1.ExecStage.idle_duration_in_cycles::total 81 # duration of idle periods in cycles
2331 system.cpu1.CUs1.GlobalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles GM data are delayed before updating the VRF
2332 system.cpu1.CUs1.LocalMemPipeline.load_vrf_bank_conflict_cycles 0 # total number of cycles LDS data are delayed before updating the VRF
2333 system.cpu1.CUs1.tlb_requests 769 # number of uncoalesced requests
2334 system.cpu1.CUs1.tlb_cycles -452466433000 # total number of cycles for all uncoalesced requests
2335 system.cpu1.CUs1.avg_translation_latency -588382877.763329 # Avg. translation latency for data translations
2336 system.cpu1.CUs1.TLB_hits_distribution::page_table 769 # TLB hits distribution (0 for page table, x for Lx-TLB
2337 system.cpu1.CUs1.TLB_hits_distribution::L1_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB
2338 system.cpu1.CUs1.TLB_hits_distribution::L2_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB
2339 system.cpu1.CUs1.TLB_hits_distribution::L3_TLB 0 # TLB hits distribution (0 for page table, x for Lx-TLB
2340 system.cpu1.CUs1.lds_bank_access_cnt 53 # Total number of LDS bank accesses
2341 system.cpu1.CUs1.lds_bank_conflicts::samples 6 # Number of bank conflicts per LDS memory packet
2342 system.cpu1.CUs1.lds_bank_conflicts::mean 7.833333 # Number of bank conflicts per LDS memory packet
2343 system.cpu1.CUs1.lds_bank_conflicts::stdev 6.080022 # Number of bank conflicts per LDS memory packet
2344 system.cpu1.CUs1.lds_bank_conflicts::underflows 0 0.00% 0.00% # Number of bank conflicts per LDS memory packet
2345 system.cpu1.CUs1.lds_bank_conflicts::0-1 2 33.33% 33.33% # Number of bank conflicts per LDS memory packet
2346 system.cpu1.CUs1.lds_bank_conflicts::2-3 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
2347 system.cpu1.CUs1.lds_bank_conflicts::4-5 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
2348 system.cpu1.CUs1.lds_bank_conflicts::6-7 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
2349 system.cpu1.CUs1.lds_bank_conflicts::8-9 0 0.00% 33.33% # Number of bank conflicts per LDS memory packet
2350 system.cpu1.CUs1.lds_bank_conflicts::10-11 1 16.67% 50.00% # Number of bank conflicts per LDS memory packet
2351 system.cpu1.CUs1.lds_bank_conflicts::12-13 3 50.00% 100.00% # Number of bank conflicts per LDS memory packet
2352 system.cpu1.CUs1.lds_bank_conflicts::14-15 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2353 system.cpu1.CUs1.lds_bank_conflicts::16-17 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2354 system.cpu1.CUs1.lds_bank_conflicts::18-19 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2355 system.cpu1.CUs1.lds_bank_conflicts::20-21 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2356 system.cpu1.CUs1.lds_bank_conflicts::22-23 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2357 system.cpu1.CUs1.lds_bank_conflicts::24-25 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2358 system.cpu1.CUs1.lds_bank_conflicts::26-27 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2359 system.cpu1.CUs1.lds_bank_conflicts::28-29 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2360 system.cpu1.CUs1.lds_bank_conflicts::30-31 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2361 system.cpu1.CUs1.lds_bank_conflicts::32-33 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2362 system.cpu1.CUs1.lds_bank_conflicts::34-35 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2363 system.cpu1.CUs1.lds_bank_conflicts::36-37 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2364 system.cpu1.CUs1.lds_bank_conflicts::38-39 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2365 system.cpu1.CUs1.lds_bank_conflicts::40-41 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2366 system.cpu1.CUs1.lds_bank_conflicts::42-43 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2367 system.cpu1.CUs1.lds_bank_conflicts::44-45 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2368 system.cpu1.CUs1.lds_bank_conflicts::46-47 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2369 system.cpu1.CUs1.lds_bank_conflicts::48-49 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2370 system.cpu1.CUs1.lds_bank_conflicts::50-51 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2371 system.cpu1.CUs1.lds_bank_conflicts::52-53 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2372 system.cpu1.CUs1.lds_bank_conflicts::54-55 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2373 system.cpu1.CUs1.lds_bank_conflicts::56-57 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2374 system.cpu1.CUs1.lds_bank_conflicts::58-59 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2375 system.cpu1.CUs1.lds_bank_conflicts::60-61 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2376 system.cpu1.CUs1.lds_bank_conflicts::62-63 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2377 system.cpu1.CUs1.lds_bank_conflicts::64 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2378 system.cpu1.CUs1.lds_bank_conflicts::overflows 0 0.00% 100.00% # Number of bank conflicts per LDS memory packet
2379 system.cpu1.CUs1.lds_bank_conflicts::min_value 0 # Number of bank conflicts per LDS memory packet
2380 system.cpu1.CUs1.lds_bank_conflicts::max_value 12 # Number of bank conflicts per LDS memory packet
2381 system.cpu1.CUs1.lds_bank_conflicts::total 6 # Number of bank conflicts per LDS memory packet
2382 system.cpu1.CUs1.page_divergence_dist::samples 17 # pages touched per wf (over all mem. instr.)
2383 system.cpu1.CUs1.page_divergence_dist::mean 1 # pages touched per wf (over all mem. instr.)
2384 system.cpu1.CUs1.page_divergence_dist::stdev 0 # pages touched per wf (over all mem. instr.)
2385 system.cpu1.CUs1.page_divergence_dist::underflows 0 0.00% 0.00% # pages touched per wf (over all mem. instr.)
2386 system.cpu1.CUs1.page_divergence_dist::1-4 17 100.00% 100.00% # pages touched per wf (over all mem. instr.)
2387 system.cpu1.CUs1.page_divergence_dist::5-8 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2388 system.cpu1.CUs1.page_divergence_dist::9-12 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2389 system.cpu1.CUs1.page_divergence_dist::13-16 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2390 system.cpu1.CUs1.page_divergence_dist::17-20 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2391 system.cpu1.CUs1.page_divergence_dist::21-24 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2392 system.cpu1.CUs1.page_divergence_dist::25-28 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2393 system.cpu1.CUs1.page_divergence_dist::29-32 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2394 system.cpu1.CUs1.page_divergence_dist::33-36 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2395 system.cpu1.CUs1.page_divergence_dist::37-40 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2396 system.cpu1.CUs1.page_divergence_dist::41-44 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2397 system.cpu1.CUs1.page_divergence_dist::45-48 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2398 system.cpu1.CUs1.page_divergence_dist::49-52 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2399 system.cpu1.CUs1.page_divergence_dist::53-56 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2400 system.cpu1.CUs1.page_divergence_dist::57-60 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2401 system.cpu1.CUs1.page_divergence_dist::61-64 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2402 system.cpu1.CUs1.page_divergence_dist::overflows 0 0.00% 100.00% # pages touched per wf (over all mem. instr.)
2403 system.cpu1.CUs1.page_divergence_dist::min_value 1 # pages touched per wf (over all mem. instr.)
2404 system.cpu1.CUs1.page_divergence_dist::max_value 1 # pages touched per wf (over all mem. instr.)
2405 system.cpu1.CUs1.page_divergence_dist::total 17 # pages touched per wf (over all mem. instr.)
2406 system.cpu1.CUs1.global_mem_instr_cnt 17 # dynamic global memory instructions count
2407 system.cpu1.CUs1.local_mem_instr_cnt 6 # dynamic local memory intruction count
2408 system.cpu1.CUs1.wg_blocked_due_lds_alloc 0 # Workgroup blocked due to LDS capacity
2409 system.cpu1.CUs1.num_instr_executed 141 # number of instructions executed
2410 system.cpu1.CUs1.inst_exec_rate::samples 141 # Instruction Execution Rate: Number of executed vector instructions per cycle
2411 system.cpu1.CUs1.inst_exec_rate::mean 85.666667 # Instruction Execution Rate: Number of executed vector instructions per cycle
2412 system.cpu1.CUs1.inst_exec_rate::stdev 230.212531 # Instruction Execution Rate: Number of executed vector instructions per cycle
2413 system.cpu1.CUs1.inst_exec_rate::underflows 0 0.00% 0.00% # Instruction Execution Rate: Number of executed vector instructions per cycle
2414 system.cpu1.CUs1.inst_exec_rate::0-1 1 0.71% 0.71% # Instruction Execution Rate: Number of executed vector instructions per cycle
2415 system.cpu1.CUs1.inst_exec_rate::2-3 12 8.51% 9.22% # Instruction Execution Rate: Number of executed vector instructions per cycle
2416 system.cpu1.CUs1.inst_exec_rate::4-5 52 36.88% 46.10% # Instruction Execution Rate: Number of executed vector instructions per cycle
2417 system.cpu1.CUs1.inst_exec_rate::6-7 33 23.40% 69.50% # Instruction Execution Rate: Number of executed vector instructions per cycle
2418 system.cpu1.CUs1.inst_exec_rate::8-9 4 2.84% 72.34% # Instruction Execution Rate: Number of executed vector instructions per cycle
2419 system.cpu1.CUs1.inst_exec_rate::10 1 0.71% 73.05% # Instruction Execution Rate: Number of executed vector instructions per cycle
2420 system.cpu1.CUs1.inst_exec_rate::overflows 38 26.95% 100.00% # Instruction Execution Rate: Number of executed vector instructions per cycle
2421 system.cpu1.CUs1.inst_exec_rate::min_value 1 # Instruction Execution Rate: Number of executed vector instructions per cycle
2422 system.cpu1.CUs1.inst_exec_rate::max_value 1299 # Instruction Execution Rate: Number of executed vector instructions per cycle
2423 system.cpu1.CUs1.inst_exec_rate::total 141 # Instruction Execution Rate: Number of executed vector instructions per cycle
2424 system.cpu1.CUs1.num_vec_ops_executed 6762 # number of vec ops executed (e.g. VSZ/inst)
2425 system.cpu1.CUs1.num_total_cycles 3358 # number of cycles the CU ran for
2426 system.cpu1.CUs1.vpc 2.013699 # Vector Operations per cycle (this CU only)
2427 system.cpu1.CUs1.ipc 0.041989 # Instructions per cycle (this CU only)
2428 system.cpu1.CUs1.warp_execution_dist::samples 141 # number of lanes active per instruction (oval all instructions)
2429 system.cpu1.CUs1.warp_execution_dist::mean 47.957447 # number of lanes active per instruction (oval all instructions)
2430 system.cpu1.CUs1.warp_execution_dist::stdev 23.818022 # number of lanes active per instruction (oval all instructions)
2431 system.cpu1.CUs1.warp_execution_dist::underflows 0 0.00% 0.00% # number of lanes active per instruction (oval all instructions)
2432 system.cpu1.CUs1.warp_execution_dist::1-4 5 3.55% 3.55% # number of lanes active per instruction (oval all instructions)
2433 system.cpu1.CUs1.warp_execution_dist::5-8 0 0.00% 3.55% # number of lanes active per instruction (oval all instructions)
2434 system.cpu1.CUs1.warp_execution_dist::9-12 9 6.38% 9.93% # number of lanes active per instruction (oval all instructions)
2435 system.cpu1.CUs1.warp_execution_dist::13-16 27 19.15% 29.08% # number of lanes active per instruction (oval all instructions)
2436 system.cpu1.CUs1.warp_execution_dist::17-20 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
2437 system.cpu1.CUs1.warp_execution_dist::21-24 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
2438 system.cpu1.CUs1.warp_execution_dist::25-28 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
2439 system.cpu1.CUs1.warp_execution_dist::29-32 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
2440 system.cpu1.CUs1.warp_execution_dist::33-36 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
2441 system.cpu1.CUs1.warp_execution_dist::37-40 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
2442 system.cpu1.CUs1.warp_execution_dist::41-44 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
2443 system.cpu1.CUs1.warp_execution_dist::45-48 0 0.00% 29.08% # number of lanes active per instruction (oval all instructions)
2444 system.cpu1.CUs1.warp_execution_dist::49-52 8 5.67% 34.75% # number of lanes active per instruction (oval all instructions)
2445 system.cpu1.CUs1.warp_execution_dist::53-56 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions)
2446 system.cpu1.CUs1.warp_execution_dist::57-60 0 0.00% 34.75% # number of lanes active per instruction (oval all instructions)
2447 system.cpu1.CUs1.warp_execution_dist::61-64 92 65.25% 100.00% # number of lanes active per instruction (oval all instructions)
2448 system.cpu1.CUs1.warp_execution_dist::overflows 0 0.00% 100.00% # number of lanes active per instruction (oval all instructions)
2449 system.cpu1.CUs1.warp_execution_dist::min_value 1 # number of lanes active per instruction (oval all instructions)
2450 system.cpu1.CUs1.warp_execution_dist::max_value 64 # number of lanes active per instruction (oval all instructions)
2451 system.cpu1.CUs1.warp_execution_dist::total 141 # number of lanes active per instruction (oval all instructions)
2452 system.cpu1.CUs1.gmem_lanes_execution_dist::samples 18 # number of active lanes per global memory instruction
2453 system.cpu1.CUs1.gmem_lanes_execution_dist::mean 37.722222 # number of active lanes per global memory instruction
2454 system.cpu1.CUs1.gmem_lanes_execution_dist::stdev 27.174394 # number of active lanes per global memory instruction
2455 system.cpu1.CUs1.gmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per global memory instruction
2456 system.cpu1.CUs1.gmem_lanes_execution_dist::1-4 1 5.56% 5.56% # number of active lanes per global memory instruction
2457 system.cpu1.CUs1.gmem_lanes_execution_dist::5-8 0 0.00% 5.56% # number of active lanes per global memory instruction
2458 system.cpu1.CUs1.gmem_lanes_execution_dist::9-12 2 11.11% 16.67% # number of active lanes per global memory instruction
2459 system.cpu1.CUs1.gmem_lanes_execution_dist::13-16 6 33.33% 50.00% # number of active lanes per global memory instruction
2460 system.cpu1.CUs1.gmem_lanes_execution_dist::17-20 0 0.00% 50.00% # number of active lanes per global memory instruction
2461 system.cpu1.CUs1.gmem_lanes_execution_dist::21-24 0 0.00% 50.00% # number of active lanes per global memory instruction
2462 system.cpu1.CUs1.gmem_lanes_execution_dist::25-28 0 0.00% 50.00% # number of active lanes per global memory instruction
2463 system.cpu1.CUs1.gmem_lanes_execution_dist::29-32 0 0.00% 50.00% # number of active lanes per global memory instruction
2464 system.cpu1.CUs1.gmem_lanes_execution_dist::33-36 0 0.00% 50.00% # number of active lanes per global memory instruction
2465 system.cpu1.CUs1.gmem_lanes_execution_dist::37-40 0 0.00% 50.00% # number of active lanes per global memory instruction
2466 system.cpu1.CUs1.gmem_lanes_execution_dist::41-44 0 0.00% 50.00% # number of active lanes per global memory instruction
2467 system.cpu1.CUs1.gmem_lanes_execution_dist::45-48 0 0.00% 50.00% # number of active lanes per global memory instruction
2468 system.cpu1.CUs1.gmem_lanes_execution_dist::49-52 0 0.00% 50.00% # number of active lanes per global memory instruction
2469 system.cpu1.CUs1.gmem_lanes_execution_dist::53-56 0 0.00% 50.00% # number of active lanes per global memory instruction
2470 system.cpu1.CUs1.gmem_lanes_execution_dist::57-60 0 0.00% 50.00% # number of active lanes per global memory instruction
2471 system.cpu1.CUs1.gmem_lanes_execution_dist::61-64 9 50.00% 100.00% # number of active lanes per global memory instruction
2472 system.cpu1.CUs1.gmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per global memory instruction
2473 system.cpu1.CUs1.gmem_lanes_execution_dist::min_value 1 # number of active lanes per global memory instruction
2474 system.cpu1.CUs1.gmem_lanes_execution_dist::max_value 64 # number of active lanes per global memory instruction
2475 system.cpu1.CUs1.gmem_lanes_execution_dist::total 18 # number of active lanes per global memory instruction
2476 system.cpu1.CUs1.lmem_lanes_execution_dist::samples 6 # number of active lanes per local memory instruction
2477 system.cpu1.CUs1.lmem_lanes_execution_dist::mean 19.333333 # number of active lanes per local memory instruction
2478 system.cpu1.CUs1.lmem_lanes_execution_dist::stdev 22.384518 # number of active lanes per local memory instruction
2479 system.cpu1.CUs1.lmem_lanes_execution_dist::underflows 0 0.00% 0.00% # number of active lanes per local memory instruction
2480 system.cpu1.CUs1.lmem_lanes_execution_dist::1-4 1 16.67% 16.67% # number of active lanes per local memory instruction
2481 system.cpu1.CUs1.lmem_lanes_execution_dist::5-8 0 0.00% 16.67% # number of active lanes per local memory instruction
2482 system.cpu1.CUs1.lmem_lanes_execution_dist::9-12 1 16.67% 33.33% # number of active lanes per local memory instruction
2483 system.cpu1.CUs1.lmem_lanes_execution_dist::13-16 3 50.00% 83.33% # number of active lanes per local memory instruction
2484 system.cpu1.CUs1.lmem_lanes_execution_dist::17-20 0 0.00% 83.33% # number of active lanes per local memory instruction
2485 system.cpu1.CUs1.lmem_lanes_execution_dist::21-24 0 0.00% 83.33% # number of active lanes per local memory instruction
2486 system.cpu1.CUs1.lmem_lanes_execution_dist::25-28 0 0.00% 83.33% # number of active lanes per local memory instruction
2487 system.cpu1.CUs1.lmem_lanes_execution_dist::29-32 0 0.00% 83.33% # number of active lanes per local memory instruction
2488 system.cpu1.CUs1.lmem_lanes_execution_dist::33-36 0 0.00% 83.33% # number of active lanes per local memory instruction
2489 system.cpu1.CUs1.lmem_lanes_execution_dist::37-40 0 0.00% 83.33% # number of active lanes per local memory instruction
2490 system.cpu1.CUs1.lmem_lanes_execution_dist::41-44 0 0.00% 83.33% # number of active lanes per local memory instruction
2491 system.cpu1.CUs1.lmem_lanes_execution_dist::45-48 0 0.00% 83.33% # number of active lanes per local memory instruction
2492 system.cpu1.CUs1.lmem_lanes_execution_dist::49-52 0 0.00% 83.33% # number of active lanes per local memory instruction
2493 system.cpu1.CUs1.lmem_lanes_execution_dist::53-56 0 0.00% 83.33% # number of active lanes per local memory instruction
2494 system.cpu1.CUs1.lmem_lanes_execution_dist::57-60 0 0.00% 83.33% # number of active lanes per local memory instruction
2495 system.cpu1.CUs1.lmem_lanes_execution_dist::61-64 1 16.67% 100.00% # number of active lanes per local memory instruction
2496 system.cpu1.CUs1.lmem_lanes_execution_dist::overflows 0 0.00% 100.00% # number of active lanes per local memory instruction
2497 system.cpu1.CUs1.lmem_lanes_execution_dist::min_value 1 # number of active lanes per local memory instruction
2498 system.cpu1.CUs1.lmem_lanes_execution_dist::max_value 64 # number of active lanes per local memory instruction
2499 system.cpu1.CUs1.lmem_lanes_execution_dist::total 6 # number of active lanes per local memory instruction
2500 system.cpu1.CUs1.num_alu_insts_executed 118 # Number of dynamic non-GM memory insts executed
2501 system.cpu1.CUs1.times_wg_blocked_due_vgpr_alloc 0 # Number of times WGs are blocked due to VGPR allocation per SIMD
2502 system.cpu1.CUs1.num_CAS_ops 0 # number of compare and swap operations
2503 system.cpu1.CUs1.num_failed_CAS_ops 0 # number of compare and swap operations that failed
2504 system.cpu1.CUs1.num_completed_wfs 4 # number of completed wavefronts
2505 system.cpu2.num_kernel_launched 1 # number of kernel launched
2506 system.dir_cntrl0.L3CacheMemory.demand_hits 0 # Number of cache demand hits
2507 system.dir_cntrl0.L3CacheMemory.demand_misses 0 # Number of cache demand misses
2508 system.dir_cntrl0.L3CacheMemory.demand_accesses 0 # Number of cache demand accesses
2509 system.dir_cntrl0.L3CacheMemory.num_data_array_writes 1551 # number of data array writes
2510 system.dir_cntrl0.L3CacheMemory.num_tag_array_reads 1551 # number of tag array reads
2511 system.dir_cntrl0.L3CacheMemory.num_tag_array_writes 1551 # number of tag array writes
2512 system.dispatcher_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
2513 system.dispatcher_coalescer.clk_domain.clock 1000 # Clock period in ticks
2514 system.dispatcher_coalescer.uncoalesced_accesses 0 # Number of uncoalesced TLB accesses
2515 system.dispatcher_coalescer.coalesced_accesses 0 # Number of coalesced TLB accesses
2516 system.dispatcher_coalescer.queuing_cycles 0 # Number of cycles spent in queue
2517 system.dispatcher_coalescer.local_queuing_cycles 0 # Number of cycles spent in queue for all incoming reqs
2518 system.dispatcher_coalescer.local_latency nan # Avg. latency over all incoming pkts
2519 system.dispatcher_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
2520 system.dispatcher_tlb.clk_domain.clock 1000 # Clock period in ticks
2521 system.dispatcher_tlb.local_TLB_accesses 0 # Number of TLB accesses
2522 system.dispatcher_tlb.local_TLB_hits 0 # Number of TLB hits
2523 system.dispatcher_tlb.local_TLB_misses 0 # Number of TLB misses
2524 system.dispatcher_tlb.local_TLB_miss_rate nan # TLB miss rate
2525 system.dispatcher_tlb.global_TLB_accesses 0 # Number of TLB accesses
2526 system.dispatcher_tlb.global_TLB_hits 0 # Number of TLB hits
2527 system.dispatcher_tlb.global_TLB_misses 0 # Number of TLB misses
2528 system.dispatcher_tlb.global_TLB_miss_rate nan # TLB miss rate
2529 system.dispatcher_tlb.access_cycles 0 # Cycles spent accessing this TLB level
2530 system.dispatcher_tlb.page_table_cycles 0 # Cycles spent accessing the page table
2531 system.dispatcher_tlb.unique_pages 0 # Number of unique pages touched
2532 system.dispatcher_tlb.local_cycles 0 # Number of cycles spent in queue for all incoming reqs
2533 system.dispatcher_tlb.local_latency nan # Avg. latency over incoming coalesced reqs
2534 system.dispatcher_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks)
2535 system.l1_coalescer0.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
2536 system.l1_coalescer0.clk_domain.clock 1000 # Clock period in ticks
2537 system.l1_coalescer0.uncoalesced_accesses 778 # Number of uncoalesced TLB accesses
2538 system.l1_coalescer0.coalesced_accesses 0 # Number of coalesced TLB accesses
2539 system.l1_coalescer0.queuing_cycles 0 # Number of cycles spent in queue
2540 system.l1_coalescer0.local_queuing_cycles 0 # Number of cycles spent in queue for all incoming reqs
2541 system.l1_coalescer0.local_latency 0 # Avg. latency over all incoming pkts
2542 system.l1_coalescer1.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
2543 system.l1_coalescer1.clk_domain.clock 1000 # Clock period in ticks
2544 system.l1_coalescer1.uncoalesced_accesses 769 # Number of uncoalesced TLB accesses
2545 system.l1_coalescer1.coalesced_accesses 0 # Number of coalesced TLB accesses
2546 system.l1_coalescer1.queuing_cycles 0 # Number of cycles spent in queue
2547 system.l1_coalescer1.local_queuing_cycles 0 # Number of cycles spent in queue for all incoming reqs
2548 system.l1_coalescer1.local_latency 0 # Avg. latency over all incoming pkts
2549 system.l1_tlb0.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
2550 system.l1_tlb0.clk_domain.clock 1000 # Clock period in ticks
2551 system.l1_tlb0.local_TLB_accesses 778 # Number of TLB accesses
2552 system.l1_tlb0.local_TLB_hits 774 # Number of TLB hits
2553 system.l1_tlb0.local_TLB_misses 4 # Number of TLB misses
2554 system.l1_tlb0.local_TLB_miss_rate 0.514139 # TLB miss rate
2555 system.l1_tlb0.global_TLB_accesses 778 # Number of TLB accesses
2556 system.l1_tlb0.global_TLB_hits 774 # Number of TLB hits
2557 system.l1_tlb0.global_TLB_misses 4 # Number of TLB misses
2558 system.l1_tlb0.global_TLB_miss_rate 0.514139 # TLB miss rate
2559 system.l1_tlb0.access_cycles 0 # Cycles spent accessing this TLB level
2560 system.l1_tlb0.page_table_cycles 0 # Cycles spent accessing the page table
2561 system.l1_tlb0.unique_pages 4 # Number of unique pages touched
2562 system.l1_tlb0.local_cycles 0 # Number of cycles spent in queue for all incoming reqs
2563 system.l1_tlb0.local_latency 0 # Avg. latency over incoming coalesced reqs
2564 system.l1_tlb0.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks)
2565 system.l1_tlb1.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
2566 system.l1_tlb1.clk_domain.clock 1000 # Clock period in ticks
2567 system.l1_tlb1.local_TLB_accesses 769 # Number of TLB accesses
2568 system.l1_tlb1.local_TLB_hits 766 # Number of TLB hits
2569 system.l1_tlb1.local_TLB_misses 3 # Number of TLB misses
2570 system.l1_tlb1.local_TLB_miss_rate 0.390117 # TLB miss rate
2571 system.l1_tlb1.global_TLB_accesses 769 # Number of TLB accesses
2572 system.l1_tlb1.global_TLB_hits 766 # Number of TLB hits
2573 system.l1_tlb1.global_TLB_misses 3 # Number of TLB misses
2574 system.l1_tlb1.global_TLB_miss_rate 0.390117 # TLB miss rate
2575 system.l1_tlb1.access_cycles 0 # Cycles spent accessing this TLB level
2576 system.l1_tlb1.page_table_cycles 0 # Cycles spent accessing the page table
2577 system.l1_tlb1.unique_pages 3 # Number of unique pages touched
2578 system.l1_tlb1.local_cycles 0 # Number of cycles spent in queue for all incoming reqs
2579 system.l1_tlb1.local_latency 0 # Avg. latency over incoming coalesced reqs
2580 system.l1_tlb1.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks)
2581 system.l2_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
2582 system.l2_coalescer.clk_domain.clock 1000 # Clock period in ticks
2583 system.l2_coalescer.uncoalesced_accesses 8 # Number of uncoalesced TLB accesses
2584 system.l2_coalescer.coalesced_accesses 1 # Number of coalesced TLB accesses
2585 system.l2_coalescer.queuing_cycles 8000 # Number of cycles spent in queue
2586 system.l2_coalescer.local_queuing_cycles 1000 # Number of cycles spent in queue for all incoming reqs
2587 system.l2_coalescer.local_latency 125 # Avg. latency over all incoming pkts
2588 system.l2_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
2589 system.l2_tlb.clk_domain.clock 1000 # Clock period in ticks
2590 system.l2_tlb.local_TLB_accesses 8 # Number of TLB accesses
2591 system.l2_tlb.local_TLB_hits 3 # Number of TLB hits
2592 system.l2_tlb.local_TLB_misses 5 # Number of TLB misses
2593 system.l2_tlb.local_TLB_miss_rate 62.500000 # TLB miss rate
2594 system.l2_tlb.global_TLB_accesses 15 # Number of TLB accesses
2595 system.l2_tlb.global_TLB_hits 3 # Number of TLB hits
2596 system.l2_tlb.global_TLB_misses 12 # Number of TLB misses
2597 system.l2_tlb.global_TLB_miss_rate 80 # TLB miss rate
2598 system.l2_tlb.access_cycles 552008 # Cycles spent accessing this TLB level
2599 system.l2_tlb.page_table_cycles 0 # Cycles spent accessing the page table
2600 system.l2_tlb.unique_pages 5 # Number of unique pages touched
2601 system.l2_tlb.local_cycles 69001 # Number of cycles spent in queue for all incoming reqs
2602 system.l2_tlb.local_latency 8625.125000 # Avg. latency over incoming coalesced reqs
2603 system.l2_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks)
2604 system.l3_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
2605 system.l3_coalescer.clk_domain.clock 1000 # Clock period in ticks
2606 system.l3_coalescer.uncoalesced_accesses 5 # Number of uncoalesced TLB accesses
2607 system.l3_coalescer.coalesced_accesses 1 # Number of coalesced TLB accesses
2608 system.l3_coalescer.queuing_cycles 8000 # Number of cycles spent in queue
2609 system.l3_coalescer.local_queuing_cycles 1000 # Number of cycles spent in queue for all incoming reqs
2610 system.l3_coalescer.local_latency 200 # Avg. latency over all incoming pkts
2611 system.l3_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
2612 system.l3_tlb.clk_domain.clock 1000 # Clock period in ticks
2613 system.l3_tlb.local_TLB_accesses 5 # Number of TLB accesses
2614 system.l3_tlb.local_TLB_hits 0 # Number of TLB hits
2615 system.l3_tlb.local_TLB_misses 5 # Number of TLB misses
2616 system.l3_tlb.local_TLB_miss_rate 100 # TLB miss rate
2617 system.l3_tlb.global_TLB_accesses 12 # Number of TLB accesses
2618 system.l3_tlb.global_TLB_hits 0 # Number of TLB hits
2619 system.l3_tlb.global_TLB_misses 12 # Number of TLB misses
2620 system.l3_tlb.global_TLB_miss_rate 100 # TLB miss rate
2621 system.l3_tlb.access_cycles 1200000 # Cycles spent accessing this TLB level
2622 system.l3_tlb.page_table_cycles 6000000 # Cycles spent accessing the page table
2623 system.l3_tlb.unique_pages 5 # Number of unique pages touched
2624 system.l3_tlb.local_cycles 150000 # Number of cycles spent in queue for all incoming reqs
2625 system.l3_tlb.local_latency 30000 # Avg. latency over incoming coalesced reqs
2626 system.l3_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks)
2627 system.piobus.trans_dist::WriteReq 94 # Transaction distribution
2628 system.piobus.trans_dist::WriteResp 94 # Transaction distribution
2629 system.piobus.pkt_count_system.cp_cntrl0.sequencer.mem-master-port::system.cpu2.pio 188 # Packet count per connected master and slave (bytes)
2630 system.piobus.pkt_count::total 188 # Packet count per connected master and slave (bytes)
2631 system.piobus.pkt_size_system.cp_cntrl0.sequencer.mem-master-port::system.cpu2.pio 748 # Cumulative packet size per connected master and slave (bytes)
2632 system.piobus.pkt_size::total 748 # Cumulative packet size per connected master and slave (bytes)
2633 system.piobus.reqLayer0.occupancy 188000 # Layer occupancy (ticks)
2634 system.piobus.reqLayer0.utilization 0.0 # Layer utilization (%)
2635 system.piobus.respLayer0.occupancy 94000 # Layer occupancy (ticks)
2636 system.piobus.respLayer0.utilization 0.0 # Layer utilization (%)
2637 system.ruby.network.ext_links0.int_node.percent_links_utilized 0.007952
2638 system.ruby.network.ext_links0.int_node.msg_count.Control::0 1551
2639 system.ruby.network.ext_links0.int_node.msg_count.Request_Control::0 1551
2640 system.ruby.network.ext_links0.int_node.msg_count.Response_Data::2 1563
2641 system.ruby.network.ext_links0.int_node.msg_count.Response_Control::2 1539
2642 system.ruby.network.ext_links0.int_node.msg_count.Unblock_Control::4 1551
2643 system.ruby.network.ext_links0.int_node.msg_bytes.Control::0 12408
2644 system.ruby.network.ext_links0.int_node.msg_bytes.Request_Control::0 12408
2645 system.ruby.network.ext_links0.int_node.msg_bytes.Response_Data::2 112536
2646 system.ruby.network.ext_links0.int_node.msg_bytes.Response_Control::2 12312
2647 system.ruby.network.ext_links0.int_node.msg_bytes.Unblock_Control::4 12408
2648 system.ruby.network.ext_links1.int_node.percent_links_utilized 0.009970
2649 system.ruby.network.ext_links1.int_node.msg_count.Control::0 16
2650 system.ruby.network.ext_links1.int_node.msg_count.Request_Control::0 1535
2651 system.ruby.network.ext_links1.int_node.msg_count.Response_Data::2 1537
2652 system.ruby.network.ext_links1.int_node.msg_count.Response_Control::2 14
2653 system.ruby.network.ext_links1.int_node.msg_count.Unblock_Control::4 1535
2654 system.ruby.network.ext_links1.int_node.msg_bytes.Control::0 128
2655 system.ruby.network.ext_links1.int_node.msg_bytes.Request_Control::0 12280
2656 system.ruby.network.ext_links1.int_node.msg_bytes.Response_Data::2 110664
2657 system.ruby.network.ext_links1.int_node.msg_bytes.Response_Control::2 112
2658 system.ruby.network.ext_links1.int_node.msg_bytes.Unblock_Control::4 12280
2659 system.tcp_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits
2660 system.tcp_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses
2661 system.tcp_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses
2662 system.tcp_cntrl0.L1cache.num_data_array_reads 10 # number of data array reads
2663 system.tcp_cntrl0.L1cache.num_data_array_writes 11 # number of data array writes
2664 system.tcp_cntrl0.L1cache.num_tag_array_reads 27 # number of tag array reads
2665 system.tcp_cntrl0.L1cache.num_tag_array_writes 18 # number of tag array writes
2666 system.tcp_cntrl0.L1cache.num_tag_array_stalls 2 # number of stalls caused by tag array
2667 system.tcp_cntrl0.L1cache.num_data_array_stalls 2 # number of stalls caused by data array
2668 system.tcp_cntrl0.coalescer.gpu_tcp_ld_hits 3 # loads that hit in the TCP
2669 system.tcp_cntrl0.coalescer.gpu_tcp_ld_transfers 0 # TCP to TCP load transfers
2670 system.tcp_cntrl0.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC
2671 system.tcp_cntrl0.coalescer.gpu_ld_misses 2 # loads that miss in the GPU
2672 system.tcp_cntrl0.coalescer.gpu_tcp_st_hits 4 # stores that hit in the TCP
2673 system.tcp_cntrl0.coalescer.gpu_tcp_st_transfers 1 # TCP to TCP store transfers
2674 system.tcp_cntrl0.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC
2675 system.tcp_cntrl0.coalescer.gpu_st_misses 4 # stores that miss in the GPU
2676 system.tcp_cntrl0.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP
2677 system.tcp_cntrl0.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers
2678 system.tcp_cntrl0.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC
2679 system.tcp_cntrl0.coalescer.cp_ld_misses 0 # loads that miss in the GPU
2680 system.tcp_cntrl0.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP
2681 system.tcp_cntrl0.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers
2682 system.tcp_cntrl0.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC
2683 system.tcp_cntrl0.coalescer.cp_st_misses 0 # stores that miss in the GPU
2684 system.ruby.network.ext_links2.int_node.percent_links_utilized 0.000721
2685 system.ruby.network.ext_links2.int_node.msg_count.Control::0 1535
2686 system.ruby.network.ext_links2.int_node.msg_count.Control::1 14
2687 system.ruby.network.ext_links2.int_node.msg_count.Request_Control::0 16
2688 system.ruby.network.ext_links2.int_node.msg_count.Request_Control::1 19
2689 system.ruby.network.ext_links2.int_node.msg_count.Response_Data::2 26
2690 system.ruby.network.ext_links2.int_node.msg_count.Response_Data::3 33
2691 system.ruby.network.ext_links2.int_node.msg_count.Response_Control::2 1525
2692 system.ruby.network.ext_links2.int_node.msg_count.Unblock_Control::4 16
2693 system.ruby.network.ext_links2.int_node.msg_count.Unblock_Control::5 19
2694 system.ruby.network.ext_links2.int_node.msg_bytes.Control::0 12280
2695 system.ruby.network.ext_links2.int_node.msg_bytes.Control::1 112
2696 system.ruby.network.ext_links2.int_node.msg_bytes.Request_Control::0 128
2697 system.ruby.network.ext_links2.int_node.msg_bytes.Request_Control::1 152
2698 system.ruby.network.ext_links2.int_node.msg_bytes.Response_Data::2 1872
2699 system.ruby.network.ext_links2.int_node.msg_bytes.Response_Data::3 2376
2700 system.ruby.network.ext_links2.int_node.msg_bytes.Response_Control::2 12200
2701 system.ruby.network.ext_links2.int_node.msg_bytes.Unblock_Control::4 128
2702 system.ruby.network.ext_links2.int_node.msg_bytes.Unblock_Control::5 152
2703 system.tcp_cntrl1.L1cache.demand_hits 0 # Number of cache demand hits
2704 system.tcp_cntrl1.L1cache.demand_misses 0 # Number of cache demand misses
2705 system.tcp_cntrl1.L1cache.demand_accesses 0 # Number of cache demand accesses
2706 system.tcp_cntrl1.L1cache.num_data_array_reads 7 # number of data array reads
2707 system.tcp_cntrl1.L1cache.num_data_array_writes 11 # number of data array writes
2708 system.tcp_cntrl1.L1cache.num_tag_array_reads 25 # number of tag array reads
2709 system.tcp_cntrl1.L1cache.num_tag_array_writes 18 # number of tag array writes
2710 system.tcp_cntrl1.L1cache.num_tag_array_stalls 2 # number of stalls caused by tag array
2711 system.tcp_cntrl1.L1cache.num_data_array_stalls 2 # number of stalls caused by data array
2712 system.tcp_cntrl1.coalescer.gpu_tcp_ld_hits 3 # loads that hit in the TCP
2713 system.tcp_cntrl1.coalescer.gpu_tcp_ld_transfers 2 # TCP to TCP load transfers
2714 system.tcp_cntrl1.coalescer.gpu_tcc_ld_hits 0 # loads that hit in the TCC
2715 system.tcp_cntrl1.coalescer.gpu_ld_misses 0 # loads that miss in the GPU
2716 system.tcp_cntrl1.coalescer.gpu_tcp_st_hits 4 # stores that hit in the TCP
2717 system.tcp_cntrl1.coalescer.gpu_tcp_st_transfers 0 # TCP to TCP store transfers
2718 system.tcp_cntrl1.coalescer.gpu_tcc_st_hits 0 # stores that hit in the TCC
2719 system.tcp_cntrl1.coalescer.gpu_st_misses 5 # stores that miss in the GPU
2720 system.tcp_cntrl1.coalescer.cp_tcp_ld_hits 0 # loads that hit in the TCP
2721 system.tcp_cntrl1.coalescer.cp_tcp_ld_transfers 0 # TCP to TCP load transfers
2722 system.tcp_cntrl1.coalescer.cp_tcc_ld_hits 0 # loads that hit in the TCC
2723 system.tcp_cntrl1.coalescer.cp_ld_misses 0 # loads that miss in the GPU
2724 system.tcp_cntrl1.coalescer.cp_tcp_st_hits 0 # stores that hit in the TCP
2725 system.tcp_cntrl1.coalescer.cp_tcp_st_transfers 0 # TCP to TCP store transfers
2726 system.tcp_cntrl1.coalescer.cp_tcc_st_hits 0 # stores that hit in the TCC
2727 system.tcp_cntrl1.coalescer.cp_st_misses 0 # stores that miss in the GPU
2728 system.sqc_cntrl0.L1cache.demand_hits 0 # Number of cache demand hits
2729 system.sqc_cntrl0.L1cache.demand_misses 0 # Number of cache demand misses
2730 system.sqc_cntrl0.L1cache.demand_accesses 0 # Number of cache demand accesses
2731 system.sqc_cntrl0.L1cache.num_data_array_reads 86 # number of data array reads
2732 system.sqc_cntrl0.L1cache.num_data_array_writes 5 # number of data array writes
2733 system.sqc_cntrl0.L1cache.num_tag_array_reads 86 # number of tag array reads
2734 system.sqc_cntrl0.L1cache.num_tag_array_writes 5 # number of tag array writes
2735 system.sqc_cntrl0.L1cache.num_data_array_stalls 44 # number of stalls caused by data array
2736 system.sqc_cntrl0.sequencer.load_waiting_on_load 120 # Number of times a load aliased with a pending load
2737 system.tcc_cntrl0.L2cache.demand_hits 0 # Number of cache demand hits
2738 system.tcc_cntrl0.L2cache.demand_misses 0 # Number of cache demand misses
2739 system.tcc_cntrl0.L2cache.demand_accesses 0 # Number of cache demand accesses
2740 system.tccdir_cntrl0.directory.demand_hits 0 # Number of cache demand hits
2741 system.tccdir_cntrl0.directory.demand_misses 0 # Number of cache demand misses
2742 system.tccdir_cntrl0.directory.demand_accesses 0 # Number of cache demand accesses
2743 system.tccdir_cntrl0.directory.num_tag_array_reads 1554 # number of tag array reads
2744 system.tccdir_cntrl0.directory.num_tag_array_writes 27 # number of tag array writes
2745 system.ruby.network.msg_count.Control 3116
2746 system.ruby.network.msg_count.Request_Control 3121
2747 system.ruby.network.msg_count.Response_Data 3159
2748 system.ruby.network.msg_count.Response_Control 3078
2749 system.ruby.network.msg_count.Unblock_Control 3121
2750 system.ruby.network.msg_byte.Control 24928
2751 system.ruby.network.msg_byte.Request_Control 24968
2752 system.ruby.network.msg_byte.Response_Data 227448
2753 system.ruby.network.msg_byte.Response_Control 24624
2754 system.ruby.network.msg_byte.Unblock_Control 24968
2755 system.sqc_coalescer.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
2756 system.sqc_coalescer.clk_domain.clock 1000 # Clock period in ticks
2757 system.sqc_coalescer.uncoalesced_accesses 86 # Number of uncoalesced TLB accesses
2758 system.sqc_coalescer.coalesced_accesses 63 # Number of coalesced TLB accesses
2759 system.sqc_coalescer.queuing_cycles 100000 # Number of cycles spent in queue
2760 system.sqc_coalescer.local_queuing_cycles 100000 # Number of cycles spent in queue for all incoming reqs
2761 system.sqc_coalescer.local_latency 1162.790698 # Avg. latency over all incoming pkts
2762 system.sqc_tlb.clk_domain.voltage_domain.voltage 1 # Voltage in Volts
2763 system.sqc_tlb.clk_domain.clock 1000 # Clock period in ticks
2764 system.sqc_tlb.local_TLB_accesses 63 # Number of TLB accesses
2765 system.sqc_tlb.local_TLB_hits 62 # Number of TLB hits
2766 system.sqc_tlb.local_TLB_misses 1 # Number of TLB misses
2767 system.sqc_tlb.local_TLB_miss_rate 1.587302 # TLB miss rate
2768 system.sqc_tlb.global_TLB_accesses 86 # Number of TLB accesses
2769 system.sqc_tlb.global_TLB_hits 78 # Number of TLB hits
2770 system.sqc_tlb.global_TLB_misses 8 # Number of TLB misses
2771 system.sqc_tlb.global_TLB_miss_rate 9.302326 # TLB miss rate
2772 system.sqc_tlb.access_cycles 86008 # Cycles spent accessing this TLB level
2773 system.sqc_tlb.page_table_cycles 0 # Cycles spent accessing the page table
2774 system.sqc_tlb.unique_pages 1 # Number of unique pages touched
2775 system.sqc_tlb.local_cycles 63001 # Number of cycles spent in queue for all incoming reqs
2776 system.sqc_tlb.local_latency 1000.015873 # Avg. latency over incoming coalesced reqs
2777 system.sqc_tlb.avg_reuse_distance 0 # avg. reuse distance over all pages (in ticks)
2778 system.ruby.network.ext_links0.int_node.throttle0.link_utilization 0.005592
2779 system.ruby.network.ext_links0.int_node.throttle0.msg_count.Request_Control::0 1551
2780 system.ruby.network.ext_links0.int_node.throttle0.msg_count.Response_Data::2 12
2781 system.ruby.network.ext_links0.int_node.throttle0.msg_count.Response_Control::2 1539
2782 system.ruby.network.ext_links0.int_node.throttle0.msg_count.Unblock_Control::4 1551
2783 system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Request_Control::0 12408
2784 system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Response_Data::2 864
2785 system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Response_Control::2 12312
2786 system.ruby.network.ext_links0.int_node.throttle0.msg_bytes.Unblock_Control::4 12408
2787 system.ruby.network.ext_links0.int_node.throttle1.link_utilization 0.016287
2788 system.ruby.network.ext_links0.int_node.throttle1.msg_count.Control::0 16
2789 system.ruby.network.ext_links0.int_node.throttle1.msg_count.Response_Data::2 1535
2790 system.ruby.network.ext_links0.int_node.throttle1.msg_bytes.Control::0 128
2791 system.ruby.network.ext_links0.int_node.throttle1.msg_bytes.Response_Data::2 110520
2792 system.ruby.network.ext_links0.int_node.throttle2.link_utilization 0.001977
2793 system.ruby.network.ext_links0.int_node.throttle2.msg_count.Control::0 1535
2794 system.ruby.network.ext_links0.int_node.throttle2.msg_count.Response_Data::2 16
2795 system.ruby.network.ext_links0.int_node.throttle2.msg_bytes.Control::0 12280
2796 system.ruby.network.ext_links0.int_node.throttle2.msg_bytes.Response_Data::2 1152
2797 system.ruby.network.ext_links1.int_node.throttle0.link_utilization 0.016287
2798 system.ruby.network.ext_links1.int_node.throttle0.msg_count.Control::0 16
2799 system.ruby.network.ext_links1.int_node.throttle0.msg_count.Response_Data::2 1535
2800 system.ruby.network.ext_links1.int_node.throttle0.msg_bytes.Control::0 128
2801 system.ruby.network.ext_links1.int_node.throttle0.msg_bytes.Response_Data::2 110520
2802 system.ruby.network.ext_links1.int_node.throttle1.link_utilization 0.003653
2803 system.ruby.network.ext_links1.int_node.throttle1.msg_count.Request_Control::0 1535
2804 system.ruby.network.ext_links1.int_node.throttle1.msg_count.Response_Data::2 2
2805 system.ruby.network.ext_links1.int_node.throttle1.msg_count.Response_Control::2 14
2806 system.ruby.network.ext_links1.int_node.throttle1.msg_count.Unblock_Control::4 1535
2807 system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Request_Control::0 12280
2808 system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Response_Data::2 144
2809 system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Response_Control::2 112
2810 system.ruby.network.ext_links1.int_node.throttle1.msg_bytes.Unblock_Control::4 12280
2811 system.ruby.network.ext_links2.int_node.throttle0.link_utilization 0.000084
2812 system.ruby.network.ext_links2.int_node.throttle0.msg_count.Control::1 8
2813 system.ruby.network.ext_links2.int_node.throttle0.msg_count.Response_Data::3 7
2814 system.ruby.network.ext_links2.int_node.throttle0.msg_bytes.Control::1 64
2815 system.ruby.network.ext_links2.int_node.throttle0.msg_bytes.Response_Data::3 504
2816 system.ruby.network.ext_links2.int_node.throttle1.link_utilization 0.000081
2817 system.ruby.network.ext_links2.int_node.throttle1.msg_count.Control::1 6
2818 system.ruby.network.ext_links2.int_node.throttle1.msg_count.Response_Data::3 7
2819 system.ruby.network.ext_links2.int_node.throttle1.msg_bytes.Control::1 48
2820 system.ruby.network.ext_links2.int_node.throttle1.msg_bytes.Response_Data::3 504
2821 system.ruby.network.ext_links2.int_node.throttle2.link_utilization 0
2822 system.ruby.network.ext_links2.int_node.throttle3.link_utilization 0.002170
2823 system.ruby.network.ext_links2.int_node.throttle3.msg_count.Control::0 1535
2824 system.ruby.network.ext_links2.int_node.throttle3.msg_count.Request_Control::1 19
2825 system.ruby.network.ext_links2.int_node.throttle3.msg_count.Response_Data::2 16
2826 system.ruby.network.ext_links2.int_node.throttle3.msg_count.Response_Data::3 14
2827 system.ruby.network.ext_links2.int_node.throttle3.msg_count.Unblock_Control::5 19
2828 system.ruby.network.ext_links2.int_node.throttle3.msg_bytes.Control::0 12280
2829 system.ruby.network.ext_links2.int_node.throttle3.msg_bytes.Request_Control::1 152
2830 system.ruby.network.ext_links2.int_node.throttle3.msg_bytes.Response_Data::2 1152
2831 system.ruby.network.ext_links2.int_node.throttle3.msg_bytes.Response_Data::3 1008
2832 system.ruby.network.ext_links2.int_node.throttle3.msg_bytes.Unblock_Control::5 152
2833 system.ruby.network.ext_links2.int_node.throttle4.link_utilization 0.000053
2834 system.ruby.network.ext_links2.int_node.throttle4.msg_count.Response_Data::3 5
2835 system.ruby.network.ext_links2.int_node.throttle4.msg_bytes.Response_Data::3 360
2836 system.ruby.network.ext_links2.int_node.throttle5.link_utilization 0.001939
2837 system.ruby.network.ext_links2.int_node.throttle5.msg_count.Request_Control::0 16
2838 system.ruby.network.ext_links2.int_node.throttle5.msg_count.Response_Data::2 10
2839 system.ruby.network.ext_links2.int_node.throttle5.msg_count.Response_Control::2 1525
2840 system.ruby.network.ext_links2.int_node.throttle5.msg_count.Unblock_Control::4 16
2841 system.ruby.network.ext_links2.int_node.throttle5.msg_bytes.Request_Control::0 128
2842 system.ruby.network.ext_links2.int_node.throttle5.msg_bytes.Response_Data::2 720
2843 system.ruby.network.ext_links2.int_node.throttle5.msg_bytes.Response_Control::2 12200
2844 system.ruby.network.ext_links2.int_node.throttle5.msg_bytes.Unblock_Control::4 128
2845 system.ruby.CorePair_Controller.C0_Load_L1miss 180 0.00% 0.00%
2846 system.ruby.CorePair_Controller.C0_Load_L1hit 16155 0.00% 0.00%
2847 system.ruby.CorePair_Controller.Ifetch0_L1hit 86007 0.00% 0.00%
2848 system.ruby.CorePair_Controller.Ifetch0_L1miss 1088 0.00% 0.00%
2849 system.ruby.CorePair_Controller.C0_Store_L1miss 325 0.00% 0.00%
2850 system.ruby.CorePair_Controller.C0_Store_L1hit 10448 0.00% 0.00%
2851 system.ruby.CorePair_Controller.NB_AckS 1043 0.00% 0.00%
2852 system.ruby.CorePair_Controller.NB_AckM 326 0.00% 0.00%
2853 system.ruby.CorePair_Controller.NB_AckE 166 0.00% 0.00%
2854 system.ruby.CorePair_Controller.L1I_Repl 589 0.00% 0.00%
2855 system.ruby.CorePair_Controller.L1D0_Repl 24 0.00% 0.00%
2856 system.ruby.CorePair_Controller.L2_to_L1D0 5 0.00% 0.00%
2857 system.ruby.CorePair_Controller.L2_to_L1I 54 0.00% 0.00%
2858 system.ruby.CorePair_Controller.PrbInvData 9 0.00% 0.00%
2859 system.ruby.CorePair_Controller.PrbShrData 7 0.00% 0.00%
2860 system.ruby.CorePair_Controller.I.C0_Load_L1miss 175 0.00% 0.00%
2861 system.ruby.CorePair_Controller.I.Ifetch0_L1miss 1034 0.00% 0.00%
2862 system.ruby.CorePair_Controller.I.C0_Store_L1miss 325 0.00% 0.00%
2863 system.ruby.CorePair_Controller.I.PrbInvData 8 0.00% 0.00%
2864 system.ruby.CorePair_Controller.I.PrbShrData 5 0.00% 0.00%
2865 system.ruby.CorePair_Controller.S.C0_Load_L1hit 635 0.00% 0.00%
2866 system.ruby.CorePair_Controller.S.Ifetch0_L1hit 86007 0.00% 0.00%
2867 system.ruby.CorePair_Controller.S.Ifetch0_L1miss 54 0.00% 0.00%
2868 system.ruby.CorePair_Controller.S.L1I_Repl 589 0.00% 0.00%
2869 system.ruby.CorePair_Controller.E0.C0_Load_L1miss 2 0.00% 0.00%
2870 system.ruby.CorePair_Controller.E0.C0_Load_L1hit 2721 0.00% 0.00%
2871 system.ruby.CorePair_Controller.E0.C0_Store_L1hit 46 0.00% 0.00%
2872 system.ruby.CorePair_Controller.E0.L1D0_Repl 16 0.00% 0.00%
2873 system.ruby.CorePair_Controller.E0.PrbShrData 1 0.00% 0.00%
2874 system.ruby.CorePair_Controller.O.C0_Load_L1hit 3 0.00% 0.00%
2875 system.ruby.CorePair_Controller.O.C0_Store_L1hit 1 0.00% 0.00%
2876 system.ruby.CorePair_Controller.M0.C0_Load_L1miss 3 0.00% 0.00%
2877 system.ruby.CorePair_Controller.M0.C0_Load_L1hit 12796 0.00% 0.00%
2878 system.ruby.CorePair_Controller.M0.C0_Store_L1hit 10401 0.00% 0.00%
2879 system.ruby.CorePair_Controller.M0.L1D0_Repl 8 0.00% 0.00%
2880 system.ruby.CorePair_Controller.M0.PrbInvData 1 0.00% 0.00%
2881 system.ruby.CorePair_Controller.M0.PrbShrData 1 0.00% 0.00%
2882 system.ruby.CorePair_Controller.I_M0.NB_AckM 325 0.00% 0.00%
2883 system.ruby.CorePair_Controller.I_E0S.NB_AckS 9 0.00% 0.00%
2884 system.ruby.CorePair_Controller.I_E0S.NB_AckE 166 0.00% 0.00%
2885 system.ruby.CorePair_Controller.Si_F0.L2_to_L1I 54 0.00% 0.00%
2886 system.ruby.CorePair_Controller.O_M0.NB_AckM 1 0.00% 0.00%
2887 system.ruby.CorePair_Controller.S0.NB_AckS 1034 0.00% 0.00%
2888 system.ruby.CorePair_Controller.E0_F.L2_to_L1D0 2 0.00% 0.00%
2889 system.ruby.CorePair_Controller.M0_F.L2_to_L1D0 3 0.00% 0.00%
2890 system.ruby.Directory_Controller.RdBlkS 1039 0.00% 0.00%
2891 system.ruby.Directory_Controller.RdBlkM 335 0.00% 0.00%
2892 system.ruby.Directory_Controller.RdBlk 177 0.00% 0.00%
2893 system.ruby.Directory_Controller.CPUPrbResp 1551 0.00% 0.00%
2894 system.ruby.Directory_Controller.ProbeAcksComplete 1551 0.00% 0.00%
2895 system.ruby.Directory_Controller.MemData 1551 0.00% 0.00%
2896 system.ruby.Directory_Controller.CoreUnblock 1551 0.00% 0.00%
2897 system.ruby.Directory_Controller.U.RdBlkS 1039 0.00% 0.00%
2898 system.ruby.Directory_Controller.U.RdBlkM 335 0.00% 0.00%
2899 system.ruby.Directory_Controller.U.RdBlk 177 0.00% 0.00%
2900 system.ruby.Directory_Controller.BS_M.MemData 29 0.00% 0.00%
2901 system.ruby.Directory_Controller.BM_M.MemData 12 0.00% 0.00%
2902 system.ruby.Directory_Controller.B_M.MemData 1 0.00% 0.00%
2903 system.ruby.Directory_Controller.BS_PM.CPUPrbResp 29 0.00% 0.00%
2904 system.ruby.Directory_Controller.BS_PM.ProbeAcksComplete 29 0.00% 0.00%
2905 system.ruby.Directory_Controller.BS_PM.MemData 1010 0.00% 0.00%
2906 system.ruby.Directory_Controller.BM_PM.CPUPrbResp 12 0.00% 0.00%
2907 system.ruby.Directory_Controller.BM_PM.ProbeAcksComplete 12 0.00% 0.00%
2908 system.ruby.Directory_Controller.BM_PM.MemData 323 0.00% 0.00%
2909 system.ruby.Directory_Controller.B_PM.CPUPrbResp 1 0.00% 0.00%
2910 system.ruby.Directory_Controller.B_PM.ProbeAcksComplete 1 0.00% 0.00%
2911 system.ruby.Directory_Controller.B_PM.MemData 176 0.00% 0.00%
2912 system.ruby.Directory_Controller.BS_Pm.CPUPrbResp 1010 0.00% 0.00%
2913 system.ruby.Directory_Controller.BS_Pm.ProbeAcksComplete 1010 0.00% 0.00%
2914 system.ruby.Directory_Controller.BM_Pm.CPUPrbResp 323 0.00% 0.00%
2915 system.ruby.Directory_Controller.BM_Pm.ProbeAcksComplete 323 0.00% 0.00%
2916 system.ruby.Directory_Controller.B_Pm.CPUPrbResp 176 0.00% 0.00%
2917 system.ruby.Directory_Controller.B_Pm.ProbeAcksComplete 176 0.00% 0.00%
2918 system.ruby.Directory_Controller.B.CoreUnblock 1551 0.00% 0.00%
2919 system.ruby.LD.latency_hist_seqr::bucket_size 32
2920 system.ruby.LD.latency_hist_seqr::max_bucket 319
2921 system.ruby.LD.latency_hist_seqr::samples 16335
2922 system.ruby.LD.latency_hist_seqr::mean 4.217447
2923 system.ruby.LD.latency_hist_seqr::gmean 2.103537
2924 system.ruby.LD.latency_hist_seqr::stdev 21.286370
2925 system.ruby.LD.latency_hist_seqr | 16160 98.93% 98.93% | 0 0.00% 98.93% | 0 0.00% 98.93% | 0 0.00% 98.93% | 0 0.00% 98.93% | 0 0.00% 98.93% | 166 1.02% 99.94% | 9 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
2926 system.ruby.LD.latency_hist_seqr::total 16335
2927 system.ruby.LD.latency_hist_coalsr::bucket_size 64
2928 system.ruby.LD.latency_hist_coalsr::max_bucket 639
2929 system.ruby.LD.latency_hist_coalsr::samples 10
2930 system.ruby.LD.latency_hist_coalsr::mean 119.100000
2931 system.ruby.LD.latency_hist_coalsr::gmean 16.830524
2932 system.ruby.LD.latency_hist_coalsr::stdev 153.079827
2933 system.ruby.LD.latency_hist_coalsr | 6 60.00% 60.00% | 0 0.00% 60.00% | 0 0.00% 60.00% | 2 20.00% 80.00% | 0 0.00% 80.00% | 2 20.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
2934 system.ruby.LD.latency_hist_coalsr::total 10
2935 system.ruby.LD.hit_latency_hist_seqr::bucket_size 32
2936 system.ruby.LD.hit_latency_hist_seqr::max_bucket 319
2937 system.ruby.LD.hit_latency_hist_seqr::samples 175
2938 system.ruby.LD.hit_latency_hist_seqr::mean 208.468571
2939 system.ruby.LD.hit_latency_hist_seqr::gmean 208.231054
2940 system.ruby.LD.hit_latency_hist_seqr::stdev 10.632194
2941 system.ruby.LD.hit_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 166 94.86% 94.86% | 9 5.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
2942 system.ruby.LD.hit_latency_hist_seqr::total 175
2943 system.ruby.LD.miss_latency_hist_seqr::bucket_size 4
2944 system.ruby.LD.miss_latency_hist_seqr::max_bucket 39
2945 system.ruby.LD.miss_latency_hist_seqr::samples 16160
2946 system.ruby.LD.miss_latency_hist_seqr::mean 2.005569
2947 system.ruby.LD.miss_latency_hist_seqr::gmean 2.001425
2948 system.ruby.LD.miss_latency_hist_seqr::stdev 0.316580
2949 system.ruby.LD.miss_latency_hist_seqr | 16155 99.97% 99.97% | 0 0.00% 99.97% | 0 0.00% 99.97% | 0 0.00% 99.97% | 0 0.00% 99.97% | 5 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
2950 system.ruby.LD.miss_latency_hist_seqr::total 16160
2951 system.ruby.LD.miss_latency_hist_coalsr::bucket_size 64
2952 system.ruby.LD.miss_latency_hist_coalsr::max_bucket 639
2953 system.ruby.LD.miss_latency_hist_coalsr::samples 10
2954 system.ruby.LD.miss_latency_hist_coalsr::mean 119.100000
2955 system.ruby.LD.miss_latency_hist_coalsr::gmean 16.830524
2956 system.ruby.LD.miss_latency_hist_coalsr::stdev 153.079827
2957 system.ruby.LD.miss_latency_hist_coalsr | 6 60.00% 60.00% | 0 0.00% 60.00% | 0 0.00% 60.00% | 2 20.00% 80.00% | 0 0.00% 80.00% | 2 20.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
2958 system.ruby.LD.miss_latency_hist_coalsr::total 10
2959 system.ruby.ST.latency_hist_seqr::bucket_size 64
2960 system.ruby.ST.latency_hist_seqr::max_bucket 639
2961 system.ruby.ST.latency_hist_seqr::samples 10412
2962 system.ruby.ST.latency_hist_seqr::mean 8.385709
2963 system.ruby.ST.latency_hist_seqr::gmean 2.308923
2964 system.ruby.ST.latency_hist_seqr::stdev 35.862445
2965 system.ruby.ST.latency_hist_seqr | 10090 96.91% 96.91% | 0 0.00% 96.91% | 0 0.00% 96.91% | 316 3.03% 99.94% | 3 0.03% 99.97% | 3 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
2966 system.ruby.ST.latency_hist_seqr::total 10412
2967 system.ruby.ST.latency_hist_coalsr::bucket_size 32
2968 system.ruby.ST.latency_hist_coalsr::max_bucket 319
2969 system.ruby.ST.latency_hist_coalsr::samples 16
2970 system.ruby.ST.latency_hist_coalsr::mean 125.375000
2971 system.ruby.ST.latency_hist_coalsr::gmean 15.803091
2972 system.ruby.ST.latency_hist_coalsr::stdev 128.466792
2973 system.ruby.ST.latency_hist_coalsr | 8 50.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 8 50.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
2974 system.ruby.ST.latency_hist_coalsr::total 16
2975 system.ruby.ST.hit_latency_hist_seqr::bucket_size 64
2976 system.ruby.ST.hit_latency_hist_seqr::max_bucket 639
2977 system.ruby.ST.hit_latency_hist_seqr::samples 322
2978 system.ruby.ST.hit_latency_hist_seqr::mean 208.484472
2979 system.ruby.ST.hit_latency_hist_seqr::gmean 208.014366
2980 system.ruby.ST.hit_latency_hist_seqr::stdev 16.327683
2981 system.ruby.ST.hit_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 316 98.14% 98.14% | 3 0.93% 99.07% | 3 0.93% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
2982 system.ruby.ST.hit_latency_hist_seqr::total 322
2983 system.ruby.ST.miss_latency_hist_seqr::bucket_size 1
2984 system.ruby.ST.miss_latency_hist_seqr::max_bucket 9
2985 system.ruby.ST.miss_latency_hist_seqr::samples 10090
2986 system.ruby.ST.miss_latency_hist_seqr::mean 2
2987 system.ruby.ST.miss_latency_hist_seqr::gmean 2.000000
2988 system.ruby.ST.miss_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10090 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
2989 system.ruby.ST.miss_latency_hist_seqr::total 10090
2990 system.ruby.ST.miss_latency_hist_coalsr::bucket_size 32
2991 system.ruby.ST.miss_latency_hist_coalsr::max_bucket 319
2992 system.ruby.ST.miss_latency_hist_coalsr::samples 16
2993 system.ruby.ST.miss_latency_hist_coalsr::mean 125.375000
2994 system.ruby.ST.miss_latency_hist_coalsr::gmean 15.803091
2995 system.ruby.ST.miss_latency_hist_coalsr::stdev 128.466792
2996 system.ruby.ST.miss_latency_hist_coalsr | 8 50.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 0 0.00% 50.00% | 8 50.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
2997 system.ruby.ST.miss_latency_hist_coalsr::total 16
2998 system.ruby.ATOMIC.latency_hist_coalsr::bucket_size 64
2999 system.ruby.ATOMIC.latency_hist_coalsr::max_bucket 639
3000 system.ruby.ATOMIC.latency_hist_coalsr::samples 2
3001 system.ruby.ATOMIC.latency_hist_coalsr::mean 309.500000
3002 system.ruby.ATOMIC.latency_hist_coalsr::gmean 306.568100
3003 system.ruby.ATOMIC.latency_hist_coalsr::stdev 60.104076
3004 system.ruby.ATOMIC.latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 50.00% 50.00% | 1 50.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3005 system.ruby.ATOMIC.latency_hist_coalsr::total 2
3006 system.ruby.ATOMIC.miss_latency_hist_coalsr::bucket_size 64
3007 system.ruby.ATOMIC.miss_latency_hist_coalsr::max_bucket 639
3008 system.ruby.ATOMIC.miss_latency_hist_coalsr::samples 2
3009 system.ruby.ATOMIC.miss_latency_hist_coalsr::mean 309.500000
3010 system.ruby.ATOMIC.miss_latency_hist_coalsr::gmean 306.568100
3011 system.ruby.ATOMIC.miss_latency_hist_coalsr::stdev 60.104076
3012 system.ruby.ATOMIC.miss_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 50.00% 50.00% | 1 50.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3013 system.ruby.ATOMIC.miss_latency_hist_coalsr::total 2
3014 system.ruby.IFETCH.latency_hist_seqr::bucket_size 64
3015 system.ruby.IFETCH.latency_hist_seqr::max_bucket 639
3016 system.ruby.IFETCH.latency_hist_seqr::samples 87095
3017 system.ruby.IFETCH.latency_hist_seqr::mean 4.462093
3018 system.ruby.IFETCH.latency_hist_seqr::gmean 2.116390
3019 system.ruby.IFETCH.latency_hist_seqr::stdev 22.435279
3020 system.ruby.IFETCH.latency_hist_seqr | 86061 98.81% 98.81% | 0 0.00% 98.81% | 0 0.00% 98.81% | 1011 1.16% 99.97% | 16 0.02% 99.99% | 7 0.01% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3021 system.ruby.IFETCH.latency_hist_seqr::total 87095
3022 system.ruby.IFETCH.hit_latency_hist_seqr::bucket_size 64
3023 system.ruby.IFETCH.hit_latency_hist_seqr::max_bucket 639
3024 system.ruby.IFETCH.hit_latency_hist_seqr::samples 1034
3025 system.ruby.IFETCH.hit_latency_hist_seqr::mean 208.444874
3026 system.ruby.IFETCH.hit_latency_hist_seqr::gmean 207.968565
3027 system.ruby.IFETCH.hit_latency_hist_seqr::stdev 16.462617
3028 system.ruby.IFETCH.hit_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1011 97.78% 97.78% | 16 1.55% 99.32% | 7 0.68% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3029 system.ruby.IFETCH.hit_latency_hist_seqr::total 1034
3030 system.ruby.IFETCH.miss_latency_hist_seqr::bucket_size 4
3031 system.ruby.IFETCH.miss_latency_hist_seqr::max_bucket 39
3032 system.ruby.IFETCH.miss_latency_hist_seqr::samples 86061
3033 system.ruby.IFETCH.miss_latency_hist_seqr::mean 2.011294
3034 system.ruby.IFETCH.miss_latency_hist_seqr::gmean 2.002892
3035 system.ruby.IFETCH.miss_latency_hist_seqr::stdev 0.450747
3036 system.ruby.IFETCH.miss_latency_hist_seqr | 86007 99.94% 99.94% | 0 0.00% 99.94% | 0 0.00% 99.94% | 0 0.00% 99.94% | 0 0.00% 99.94% | 54 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3037 system.ruby.IFETCH.miss_latency_hist_seqr::total 86061
3038 system.ruby.RMW_Read.latency_hist_seqr::bucket_size 32
3039 system.ruby.RMW_Read.latency_hist_seqr::max_bucket 319
3040 system.ruby.RMW_Read.latency_hist_seqr::samples 341
3041 system.ruby.RMW_Read.latency_hist_seqr::mean 4.392962
3042 system.ruby.RMW_Read.latency_hist_seqr::gmean 2.111743
3043 system.ruby.RMW_Read.latency_hist_seqr::stdev 21.996747
3044 system.ruby.RMW_Read.latency_hist_seqr | 337 98.83% 98.83% | 0 0.00% 98.83% | 0 0.00% 98.83% | 0 0.00% 98.83% | 0 0.00% 98.83% | 0 0.00% 98.83% | 4 1.17% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3045 system.ruby.RMW_Read.latency_hist_seqr::total 341
3046 system.ruby.RMW_Read.hit_latency_hist_seqr::bucket_size 32
3047 system.ruby.RMW_Read.hit_latency_hist_seqr::max_bucket 319
3048 system.ruby.RMW_Read.hit_latency_hist_seqr::samples 4
3049 system.ruby.RMW_Read.hit_latency_hist_seqr::mean 206
3050 system.ruby.RMW_Read.hit_latency_hist_seqr::gmean 206.000000
3051 system.ruby.RMW_Read.hit_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 4 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3052 system.ruby.RMW_Read.hit_latency_hist_seqr::total 4
3053 system.ruby.RMW_Read.miss_latency_hist_seqr::bucket_size 1
3054 system.ruby.RMW_Read.miss_latency_hist_seqr::max_bucket 9
3055 system.ruby.RMW_Read.miss_latency_hist_seqr::samples 337
3056 system.ruby.RMW_Read.miss_latency_hist_seqr::mean 2
3057 system.ruby.RMW_Read.miss_latency_hist_seqr::gmean 2.000000
3058 system.ruby.RMW_Read.miss_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 337 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3059 system.ruby.RMW_Read.miss_latency_hist_seqr::total 337
3060 system.ruby.Locked_RMW_Read.latency_hist_seqr::bucket_size 1
3061 system.ruby.Locked_RMW_Read.latency_hist_seqr::max_bucket 9
3062 system.ruby.Locked_RMW_Read.latency_hist_seqr::samples 10
3063 system.ruby.Locked_RMW_Read.latency_hist_seqr::mean 2
3064 system.ruby.Locked_RMW_Read.latency_hist_seqr::gmean 2
3065 system.ruby.Locked_RMW_Read.latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3066 system.ruby.Locked_RMW_Read.latency_hist_seqr::total 10
3067 system.ruby.Locked_RMW_Read.miss_latency_hist_seqr::bucket_size 1
3068 system.ruby.Locked_RMW_Read.miss_latency_hist_seqr::max_bucket 9
3069 system.ruby.Locked_RMW_Read.miss_latency_hist_seqr::samples 10
3070 system.ruby.Locked_RMW_Read.miss_latency_hist_seqr::mean 2
3071 system.ruby.Locked_RMW_Read.miss_latency_hist_seqr::gmean 2
3072 system.ruby.Locked_RMW_Read.miss_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3073 system.ruby.Locked_RMW_Read.miss_latency_hist_seqr::total 10
3074 system.ruby.Locked_RMW_Write.latency_hist_seqr::bucket_size 1
3075 system.ruby.Locked_RMW_Write.latency_hist_seqr::max_bucket 9
3076 system.ruby.Locked_RMW_Write.latency_hist_seqr::samples 10
3077 system.ruby.Locked_RMW_Write.latency_hist_seqr::mean 2
3078 system.ruby.Locked_RMW_Write.latency_hist_seqr::gmean 2
3079 system.ruby.Locked_RMW_Write.latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3080 system.ruby.Locked_RMW_Write.latency_hist_seqr::total 10
3081 system.ruby.Locked_RMW_Write.miss_latency_hist_seqr::bucket_size 1
3082 system.ruby.Locked_RMW_Write.miss_latency_hist_seqr::max_bucket 9
3083 system.ruby.Locked_RMW_Write.miss_latency_hist_seqr::samples 10
3084 system.ruby.Locked_RMW_Write.miss_latency_hist_seqr::mean 2
3085 system.ruby.Locked_RMW_Write.miss_latency_hist_seqr::gmean 2
3086 system.ruby.Locked_RMW_Write.miss_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3087 system.ruby.Locked_RMW_Write.miss_latency_hist_seqr::total 10
3088 system.ruby.L1Cache.miss_mach_latency_hist_seqr::bucket_size 1
3089 system.ruby.L1Cache.miss_mach_latency_hist_seqr::max_bucket 9
3090 system.ruby.L1Cache.miss_mach_latency_hist_seqr::samples 112609
3091 system.ruby.L1Cache.miss_mach_latency_hist_seqr::mean 2
3092 system.ruby.L1Cache.miss_mach_latency_hist_seqr::gmean 2.000000
3093 system.ruby.L1Cache.miss_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 112609 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3094 system.ruby.L1Cache.miss_mach_latency_hist_seqr::total 112609
3095 system.ruby.L2Cache.miss_mach_latency_hist_seqr::bucket_size 4
3096 system.ruby.L2Cache.miss_mach_latency_hist_seqr::max_bucket 39
3097 system.ruby.L2Cache.miss_mach_latency_hist_seqr::samples 59
3098 system.ruby.L2Cache.miss_mach_latency_hist_seqr::mean 20
3099 system.ruby.L2Cache.miss_mach_latency_hist_seqr::gmean 20.000000
3100 system.ruby.L2Cache.miss_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 59 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3101 system.ruby.L2Cache.miss_mach_latency_hist_seqr::total 59
3102 system.ruby.Directory.hit_mach_latency_hist_seqr::bucket_size 64
3103 system.ruby.Directory.hit_mach_latency_hist_seqr::max_bucket 639
3104 system.ruby.Directory.hit_mach_latency_hist_seqr::samples 1535
3105 system.ruby.Directory.hit_mach_latency_hist_seqr::mean 208.449511
3106 system.ruby.Directory.hit_mach_latency_hist_seqr::gmean 208.002927
3107 system.ruby.Directory.hit_mach_latency_hist_seqr::stdev 15.847049
3108 system.ruby.Directory.hit_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1506 98.11% 98.11% | 19 1.24% 99.35% | 10 0.65% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3109 system.ruby.Directory.hit_mach_latency_hist_seqr::total 1535
3110 system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::bucket_size 64
3111 system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::max_bucket 639
3112 system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::samples 3
3113 system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::mean 342
3114 system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::gmean 341.902506
3115 system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::stdev 10
3116 system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 3 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3117 system.ruby.L1Cache_wCC.miss_mach_latency_hist_coalsr::total 3
3118 system.ruby.TCP.miss_mach_latency_hist_coalsr::bucket_size 1
3119 system.ruby.TCP.miss_mach_latency_hist_coalsr::max_bucket 9
3120 system.ruby.TCP.miss_mach_latency_hist_coalsr::samples 14
3121 system.ruby.TCP.miss_mach_latency_hist_coalsr::mean 1.714286
3122 system.ruby.TCP.miss_mach_latency_hist_coalsr::gmean 1.485994
3123 system.ruby.TCP.miss_mach_latency_hist_coalsr::stdev 1.069045
3124 system.ruby.TCP.miss_mach_latency_hist_coalsr | 0 0.00% 0.00% | 8 57.14% 57.14% | 4 28.57% 85.71% | 0 0.00% 85.71% | 2 14.29% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3125 system.ruby.TCP.miss_mach_latency_hist_coalsr::total 14
3126 system.ruby.TCCdir.miss_mach_latency_hist_coalsr::bucket_size 32
3127 system.ruby.TCCdir.miss_mach_latency_hist_coalsr::max_bucket 319
3128 system.ruby.TCCdir.miss_mach_latency_hist_coalsr::samples 11
3129 system.ruby.TCCdir.miss_mach_latency_hist_coalsr::mean 251.454545
3130 system.ruby.TCCdir.miss_mach_latency_hist_coalsr::gmean 251.396753
3131 system.ruby.TCCdir.miss_mach_latency_hist_coalsr::stdev 5.733474
3132 system.ruby.TCCdir.miss_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 10 90.91% 90.91% | 1 9.09% 100.00% | 0 0.00% 100.00%
3133 system.ruby.TCCdir.miss_mach_latency_hist_coalsr::total 11
3134 system.ruby.LD.L1Cache.miss_type_mach_latency_hist_seqr::bucket_size 1
3135 system.ruby.LD.L1Cache.miss_type_mach_latency_hist_seqr::max_bucket 9
3136 system.ruby.LD.L1Cache.miss_type_mach_latency_hist_seqr::samples 16155
3137 system.ruby.LD.L1Cache.miss_type_mach_latency_hist_seqr::mean 2
3138 system.ruby.LD.L1Cache.miss_type_mach_latency_hist_seqr::gmean 2.000000
3139 system.ruby.LD.L1Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 16155 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3140 system.ruby.LD.L1Cache.miss_type_mach_latency_hist_seqr::total 16155
3141 system.ruby.LD.L2Cache.miss_type_mach_latency_hist_seqr::bucket_size 4
3142 system.ruby.LD.L2Cache.miss_type_mach_latency_hist_seqr::max_bucket 39
3143 system.ruby.LD.L2Cache.miss_type_mach_latency_hist_seqr::samples 5
3144 system.ruby.LD.L2Cache.miss_type_mach_latency_hist_seqr::mean 20
3145 system.ruby.LD.L2Cache.miss_type_mach_latency_hist_seqr::gmean 20.000000
3146 system.ruby.LD.L2Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 5 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3147 system.ruby.LD.L2Cache.miss_type_mach_latency_hist_seqr::total 5
3148 system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::bucket_size 32
3149 system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::max_bucket 319
3150 system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::samples 175
3151 system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::mean 208.468571
3152 system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::gmean 208.231054
3153 system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::stdev 10.632194
3154 system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 166 94.86% 94.86% | 9 5.14% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3155 system.ruby.LD.Directory.hit_type_mach_latency_hist_seqr::total 175
3156 system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::bucket_size 64
3157 system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::max_bucket 639
3158 system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::samples 2
3159 system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::mean 337
3160 system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::gmean 336.962906
3161 system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::stdev 7.071068
3162 system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 2 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3163 system.ruby.LD.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::total 2
3164 system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::bucket_size 1
3165 system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::max_bucket 9
3166 system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::samples 6
3167 system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::mean 2.666667
3168 system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::gmean 2.519842
3169 system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::stdev 1.032796
3170 system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 4 66.67% 66.67% | 0 0.00% 66.67% | 2 33.33% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3171 system.ruby.LD.TCP.miss_type_mach_latency_hist_coalsr::total 6
3172 system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::bucket_size 32
3173 system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::max_bucket 319
3174 system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::samples 2
3175 system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::mean 250.500000
3176 system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::gmean 250.487525
3177 system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::stdev 3.535534
3178 system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 2 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3179 system.ruby.LD.TCCdir.miss_type_mach_latency_hist_coalsr::total 2
3180 system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::bucket_size 1
3181 system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::max_bucket 9
3182 system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::samples 10090
3183 system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::mean 2
3184 system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::gmean 2.000000
3185 system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10090 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3186 system.ruby.ST.L1Cache.miss_type_mach_latency_hist_seqr::total 10090
3187 system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::bucket_size 64
3188 system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::max_bucket 639
3189 system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::samples 322
3190 system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::mean 208.484472
3191 system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::gmean 208.014366
3192 system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::stdev 16.327683
3193 system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 316 98.14% 98.14% | 3 0.93% 99.07% | 3 0.93% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3194 system.ruby.ST.Directory.hit_type_mach_latency_hist_seqr::total 322
3195 system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::bucket_size 1
3196 system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::max_bucket 9
3197 system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::samples 8
3198 system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::mean 1
3199 system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::gmean 1
3200 system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 8 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3201 system.ruby.ST.TCP.miss_type_mach_latency_hist_coalsr::total 8
3202 system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::bucket_size 32
3203 system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::max_bucket 319
3204 system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::samples 8
3205 system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::mean 249.750000
3206 system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::gmean 249.737699
3207 system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::stdev 2.659216
3208 system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 8 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3209 system.ruby.ST.TCCdir.miss_type_mach_latency_hist_coalsr::total 8
3210 system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::bucket_size 64
3211 system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::max_bucket 639
3212 system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::samples 1
3213 system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::mean 352
3214 system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::gmean 352.000000
3215 system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::stdev nan
3216 system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3217 system.ruby.ATOMIC.L1Cache_wCC.miss_type_mach_latency_hist_coalsr::total 1
3218 system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr::bucket_size 32
3219 system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr::max_bucket 319
3220 system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr::samples 1
3221 system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr::mean 267
3222 system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr::gmean 267.000000
3223 system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr::stdev nan
3224 system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1 100.00% 100.00% | 0 0.00% 100.00%
3225 system.ruby.ATOMIC.TCCdir.miss_type_mach_latency_hist_coalsr::total 1
3226 system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist_seqr::bucket_size 1
3227 system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist_seqr::max_bucket 9
3228 system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist_seqr::samples 86007
3229 system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist_seqr::mean 2
3230 system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist_seqr::gmean 2.000000
3231 system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 86007 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3232 system.ruby.IFETCH.L1Cache.miss_type_mach_latency_hist_seqr::total 86007
3233 system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist_seqr::bucket_size 4
3234 system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist_seqr::max_bucket 39
3235 system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist_seqr::samples 54
3236 system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist_seqr::mean 20
3237 system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist_seqr::gmean 20.000000
3238 system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 54 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3239 system.ruby.IFETCH.L2Cache.miss_type_mach_latency_hist_seqr::total 54
3240 system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::bucket_size 64
3241 system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::max_bucket 639
3242 system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::samples 1034
3243 system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::mean 208.444874
3244 system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::gmean 207.968565
3245 system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::stdev 16.462617
3246 system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 1011 97.78% 97.78% | 16 1.55% 99.32% | 7 0.68% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3247 system.ruby.IFETCH.Directory.hit_type_mach_latency_hist_seqr::total 1034
3248 system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::bucket_size 1
3249 system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::max_bucket 9
3250 system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::samples 337
3251 system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::mean 2
3252 system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::gmean 2.000000
3253 system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 337 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3254 system.ruby.RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::total 337
3255 system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist_seqr::bucket_size 32
3256 system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist_seqr::max_bucket 319
3257 system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist_seqr::samples 4
3258 system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist_seqr::mean 206
3259 system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist_seqr::gmean 206.000000
3260 system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 0 0.00% 0.00% | 4 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3261 system.ruby.RMW_Read.Directory.hit_type_mach_latency_hist_seqr::total 4
3262 system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::bucket_size 1
3263 system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::max_bucket 9
3264 system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::samples 10
3265 system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::mean 2
3266 system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::gmean 2
3267 system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3268 system.ruby.Locked_RMW_Read.L1Cache.miss_type_mach_latency_hist_seqr::total 10
3269 system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist_seqr::bucket_size 1
3270 system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist_seqr::max_bucket 9
3271 system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist_seqr::samples 10
3272 system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist_seqr::mean 2
3273 system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist_seqr::gmean 2
3274 system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist_seqr | 0 0.00% 0.00% | 0 0.00% 0.00% | 10 100.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00%
3275 system.ruby.Locked_RMW_Write.L1Cache.miss_type_mach_latency_hist_seqr::total 10
3276 system.ruby.SQC_Controller.Fetch 86 0.00% 0.00%
3277 system.ruby.SQC_Controller.TCC_AckS 5 0.00% 0.00%
3278 system.ruby.SQC_Controller.I.Fetch 5 0.00% 0.00%
3279 system.ruby.SQC_Controller.S.Fetch 81 0.00% 0.00%
3280 system.ruby.SQC_Controller.I_S.TCC_AckS 5 0.00% 0.00%
3281 system.ruby.TCCdir_Controller.RdBlk 53 0.00% 0.00%
3282 system.ruby.TCCdir_Controller.RdBlkM 36 0.00% 0.00%
3283 system.ruby.TCCdir_Controller.RdBlkS 5 0.00% 0.00%
3284 system.ruby.TCCdir_Controller.CPUPrbResp 14 0.00% 0.00%
3285 system.ruby.TCCdir_Controller.ProbeAcksComplete 13 0.00% 0.00%
3286 system.ruby.TCCdir_Controller.CoreUnblock 17 0.00% 0.00%
3287 system.ruby.TCCdir_Controller.LastCoreUnblock 2 0.00% 0.00%
3288 system.ruby.TCCdir_Controller.NB_AckS 7 0.00% 0.00%
3289 system.ruby.TCCdir_Controller.NB_AckM 9 0.00% 0.00%
3290 system.ruby.TCCdir_Controller.PrbInvData 326 0.00% 0.00%
3291 system.ruby.TCCdir_Controller.PrbShrData 1209 0.00% 0.00%
3292 system.ruby.TCCdir_Controller.I.RdBlk 2 0.00% 0.00%
3293 system.ruby.TCCdir_Controller.I.RdBlkM 9 0.00% 0.00%
3294 system.ruby.TCCdir_Controller.I.RdBlkS 5 0.00% 0.00%
3295 system.ruby.TCCdir_Controller.I.PrbInvData 325 0.00% 0.00%
3296 system.ruby.TCCdir_Controller.I.PrbShrData 1200 0.00% 0.00%
3297 system.ruby.TCCdir_Controller.S.RdBlk 2 0.00% 0.00%
3298 system.ruby.TCCdir_Controller.S.PrbInvData 1 0.00% 0.00%
3299 system.ruby.TCCdir_Controller.M.RdBlkM 1 0.00% 0.00%
3300 system.ruby.TCCdir_Controller.M.PrbShrData 9 0.00% 0.00%
3301 system.ruby.TCCdir_Controller.CP_I.CPUPrbResp 2 0.00% 0.00%
3302 system.ruby.TCCdir_Controller.CP_I.ProbeAcksComplete 1 0.00% 0.00%
3303 system.ruby.TCCdir_Controller.CP_O.CPUPrbResp 9 0.00% 0.00%
3304 system.ruby.TCCdir_Controller.CP_O.ProbeAcksComplete 9 0.00% 0.00%
3305 system.ruby.TCCdir_Controller.I_M.RdBlkM 22 0.00% 0.00%
3306 system.ruby.TCCdir_Controller.I_M.NB_AckM 9 0.00% 0.00%
3307 system.ruby.TCCdir_Controller.I_ES.RdBlk 41 0.00% 0.00%
3308 system.ruby.TCCdir_Controller.I_ES.NB_AckS 2 0.00% 0.00%
3309 system.ruby.TCCdir_Controller.I_S.NB_AckS 5 0.00% 0.00%
3310 system.ruby.TCCdir_Controller.BBS_S.CPUPrbResp 2 0.00% 0.00%
3311 system.ruby.TCCdir_Controller.BBS_S.ProbeAcksComplete 2 0.00% 0.00%
3312 system.ruby.TCCdir_Controller.BBM_M.CPUPrbResp 1 0.00% 0.00%
3313 system.ruby.TCCdir_Controller.BBM_M.ProbeAcksComplete 1 0.00% 0.00%
3314 system.ruby.TCCdir_Controller.BB_M.CoreUnblock 1 0.00% 0.00%
3315 system.ruby.TCCdir_Controller.BB_S.LastCoreUnblock 2 0.00% 0.00%
3316 system.ruby.TCCdir_Controller.BBB_S.RdBlk 8 0.00% 0.00%
3317 system.ruby.TCCdir_Controller.BBB_S.CoreUnblock 7 0.00% 0.00%
3318 system.ruby.TCCdir_Controller.BBB_M.RdBlkM 4 0.00% 0.00%
3319 system.ruby.TCCdir_Controller.BBB_M.CoreUnblock 9 0.00% 0.00%
3320 system.ruby.TCP_Controller.Load | 5 50.00% 50.00% | 5 50.00% 100.00%
3321 system.ruby.TCP_Controller.Load::total 10
3322 system.ruby.TCP_Controller.Store | 9 50.00% 50.00% | 9 50.00% 100.00%
3323 system.ruby.TCP_Controller.Store::total 18
3324 system.ruby.TCP_Controller.TCC_AckS | 2 50.00% 50.00% | 2 50.00% 100.00%
3325 system.ruby.TCP_Controller.TCC_AckS::total 4
3326 system.ruby.TCP_Controller.TCC_AckM | 5 50.00% 50.00% | 5 50.00% 100.00%
3327 system.ruby.TCP_Controller.TCC_AckM::total 10
3328 system.ruby.TCP_Controller.PrbInvData | 1 33.33% 33.33% | 2 66.67% 100.00%
3329 system.ruby.TCP_Controller.PrbInvData::total 3
3330 system.ruby.TCP_Controller.PrbShrData | 7 63.64% 63.64% | 4 36.36% 100.00%
3331 system.ruby.TCP_Controller.PrbShrData::total 11
3332 system.ruby.TCP_Controller.I.Load | 2 50.00% 50.00% | 2 50.00% 100.00%
3333 system.ruby.TCP_Controller.I.Load::total 4
3334 system.ruby.TCP_Controller.I.Store | 5 50.00% 50.00% | 5 50.00% 100.00%
3335 system.ruby.TCP_Controller.I.Store::total 10
3336 system.ruby.TCP_Controller.S.Load | 3 50.00% 50.00% | 3 50.00% 100.00%
3337 system.ruby.TCP_Controller.S.Load::total 6
3338 system.ruby.TCP_Controller.S.PrbInvData | 1 50.00% 50.00% | 1 50.00% 100.00%
3339 system.ruby.TCP_Controller.S.PrbInvData::total 2
3340 system.ruby.TCP_Controller.S.PrbShrData | 2 100.00% 100.00% | 0 0.00% 100.00%
3341 system.ruby.TCP_Controller.S.PrbShrData::total 2
3342 system.ruby.TCP_Controller.M.Store | 4 50.00% 50.00% | 4 50.00% 100.00%
3343 system.ruby.TCP_Controller.M.Store::total 8
3344 system.ruby.TCP_Controller.M.PrbInvData | 0 0.00% 0.00% | 1 100.00% 100.00%
3345 system.ruby.TCP_Controller.M.PrbInvData::total 1
3346 system.ruby.TCP_Controller.M.PrbShrData | 5 55.56% 55.56% | 4 44.44% 100.00%
3347 system.ruby.TCP_Controller.M.PrbShrData::total 9
3348 system.ruby.TCP_Controller.I_M.TCC_AckM | 5 50.00% 50.00% | 5 50.00% 100.00%
3349 system.ruby.TCP_Controller.I_M.TCC_AckM::total 10
3350 system.ruby.TCP_Controller.I_ES.TCC_AckS | 2 50.00% 50.00% | 2 50.00% 100.00%
3351 system.ruby.TCP_Controller.I_ES.TCC_AckS::total 4
3353 ---------- End Simulation Statistics ----------
projects / gem5.git / blob