tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.json

   1 {
   2     "name": null,
   3     "sim_quantum": 0,
   4     "system": {
   5         "kernel": "",
   6         "mmap_using_noreserve": false,
   7         "kernel_addr_check": true,
   8         "membus": {
   9             "slave": {
  10                 "peer": [
  11                     "system.system_port",
  12                     "system.l2c.mem_side"
  13                 ],
  14                 "role": "SLAVE"
  15             },
  16             "name": "membus",
  17             "snoop_filter": null,
  18             "forward_latency": 4,
  19             "clk_domain": "system.clk_domain",
  20             "system": "system",
  21             "width": 16,
  22             "eventq_index": 0,
  23             "master": {
  24                 "peer": [
  25                     "system.physmem.port"
  26                 ],
  27                 "role": "MASTER"
  28             },
  29             "response_latency": 2,
  30             "cxx_class": "CoherentXBar",
  31             "path": "system.membus",
  32             "snoop_response_latency": 4,
  33             "type": "CoherentXBar",
  34             "use_default_range": false,
  35             "frontend_latency": 3
  36         },
  37         "symbolfile": "",
  38         "l2c": {
  39             "cpu_side": {
  40                 "peer": "system.toL2Bus.master[0]",
  41                 "role": "SLAVE"
  42             },
  43             "clusivity": "mostly_incl",
  44             "prefetcher": null,
  45             "clk_domain": "system.cpu_clk_domain",
  46             "write_buffers": 8,
  47             "response_latency": 20,
  48             "cxx_class": "Cache",
  49             "size": 4194304,
  50             "tags": {
  51                 "name": "tags",
  52                 "eventq_index": 0,
  53                 "hit_latency": 20,
  54                 "clk_domain": "system.cpu_clk_domain",
  55                 "sequential_access": false,
  56                 "assoc": 8,
  57                 "cxx_class": "LRU",
  58                 "path": "system.l2c.tags",
  59                 "block_size": 64,
  60                 "type": "LRU",
  61                 "size": 4194304
  62             },
  63             "system": "system",
  64             "max_miss_count": 0,
  65             "eventq_index": 0,
  66             "mem_side": {
  67                 "peer": "system.membus.slave[1]",
  68                 "role": "MASTER"
  69             },
  70             "type": "Cache",
  71             "forward_snoops": true,
  72             "writeback_clean": false,
  73             "hit_latency": 20,
  74             "tgts_per_mshr": 12,
  75             "demand_mshr_reserve": 1,
  76             "addr_ranges": [
  77                 "0:18446744073709551615"
  78             ],
  79             "is_read_only": false,
  80             "prefetch_on_access": false,
  81             "path": "system.l2c",
  82             "name": "l2c",
  83             "mshrs": 20,
  84             "sequential_access": false,
  85             "assoc": 8
  86         },
  87         "readfile": "",
  88         "cxx_class": "System",
  89         "load_offset": 0,
  90         "work_end_ckpt_count": 0,
  91         "memories": [
  92             "system.physmem"
  93         ],
  94         "work_begin_ckpt_count": 0,
  95         "clk_domain": {
  96             "name": "clk_domain",
  97             "clock": [
  98                 1000
  99             ],
 100             "init_perf_level": 0,
 101             "voltage_domain": "system.voltage_domain",
 102             "eventq_index": 0,
 103             "cxx_class": "SrcClockDomain",
 104             "path": "system.clk_domain",
 105             "type": "SrcClockDomain",
 106             "domain_id": -1
 107         },
 108         "mem_ranges": [],
 109         "eventq_index": 0,
 110         "work_begin_cpu_id_exit": -1,
 111         "dvfs_handler": {
 112             "enable": false,
 113             "name": "dvfs_handler",
 114             "sys_clk_domain": "system.clk_domain",
 115             "transition_latency": 100000000,
 116             "eventq_index": 0,
 117             "cxx_class": "DVFSHandler",
 118             "domains": [],
 119             "path": "system.dvfs_handler",
 120             "type": "DVFSHandler"
 121         },
 122         "work_end_exit_count": 0,
 123         "type": "System",
 124         "voltage_domain": {
 125             "name": "voltage_domain",
 126             "eventq_index": 0,
 127             "voltage": [
 128                 "1.0"
 129             ],
 130             "cxx_class": "VoltageDomain",
 131             "path": "system.voltage_domain",
 132             "type": "VoltageDomain"
 133         },
 134         "cache_line_size": 64,
 135         "boot_osflags": "a",
 136         "physmem": {
 137             "range": "0:134217727",
 138             "latency": 30000,
 139             "name": "physmem",
 140             "eventq_index": 0,
 141             "clk_domain": "system.clk_domain",
 142             "latency_var": 0,
 143             "bandwidth": "73.000000",
 144             "conf_table_reported": true,
 145             "cxx_class": "SimpleMemory",
 146             "path": "system.physmem",
 147             "null": false,
 148             "type": "SimpleMemory",
 149             "port": {
 150                 "peer": "system.membus.master[0]",
 151                 "role": "SLAVE"
 152             },
 153             "in_addr_map": true
 154         },
 155         "work_cpus_ckpt_count": 0,
 156         "work_begin_exit_count": 0,
 157         "path": "system",
 158         "cpu_clk_domain": {
 159             "name": "cpu_clk_domain",
 160             "clock": [
 161                 500
 162             ],
 163             "init_perf_level": 0,
 164             "voltage_domain": "system.voltage_domain",
 165             "eventq_index": 0,
 166             "cxx_class": "SrcClockDomain",
 167             "path": "system.cpu_clk_domain",
 168             "type": "SrcClockDomain",
 169             "domain_id": -1
 170         },
 171         "toL2Bus": {
 172             "slave": {
 173                 "peer": [
 174                     "system.cpu0.icache.mem_side",
 175                     "system.cpu0.dcache.mem_side",
 176                     "system.cpu1.icache.mem_side",
 177                     "system.cpu1.dcache.mem_side",
 178                     "system.cpu2.icache.mem_side",
 179                     "system.cpu2.dcache.mem_side",
 180                     "system.cpu3.icache.mem_side",
 181                     "system.cpu3.dcache.mem_side"
 182                 ],
 183                 "role": "SLAVE"
 184             },
 185             "name": "toL2Bus",
 186             "snoop_filter": {
 187                 "name": "snoop_filter",
 188                 "system": "system",
 189                 "max_capacity": 8388608,
 190                 "eventq_index": 0,
 191                 "cxx_class": "SnoopFilter",
 192                 "path": "system.toL2Bus.snoop_filter",
 193                 "type": "SnoopFilter",
 194                 "lookup_latency": 0
 195             },
 196             "forward_latency": 0,
 197             "clk_domain": "system.cpu_clk_domain",
 198             "system": "system",
 199             "width": 32,
 200             "eventq_index": 0,
 201             "master": {
 202                 "peer": [
 203                     "system.l2c.cpu_side"
 204                 ],
 205                 "role": "MASTER"
 206             },
 207             "response_latency": 1,
 208             "cxx_class": "CoherentXBar",
 209             "path": "system.toL2Bus",
 210             "snoop_response_latency": 1,
 211             "type": "CoherentXBar",
 212             "use_default_range": false,
 213             "frontend_latency": 1
 214         },
 215         "mem_mode": "atomic",
 216         "name": "system",
 217         "init_param": 0,
 218         "system_port": {
 219             "peer": "system.membus.slave[0]",
 220             "role": "MASTER"
 221         },
 222         "load_addr_mask": 1099511627775,
 223         "cpu": [
 224             {
 225                 "do_statistics_insts": true,
 226                 "numThreads": 1,
 227                 "itb": {
 228                     "name": "itb",
 229                     "eventq_index": 0,
 230                     "cxx_class": "AlphaISA::TLB",
 231                     "path": "system.cpu0.itb",
 232                     "type": "AlphaTLB",
 233                     "size": 48
 234                 },
 235                 "simulate_data_stalls": false,
 236                 "function_trace": false,
 237                 "do_checkpoint_insts": true,
 238                 "cxx_class": "AtomicSimpleCPU",
 239                 "max_loads_all_threads": 0,
 240                 "system": "system",
 241                 "clk_domain": "system.cpu_clk_domain",
 242                 "function_trace_start": 0,
 243                 "cpu_id": 0,
 244                 "width": 1,
 245                 "checker": null,
 246                 "eventq_index": 0,
 247                 "do_quiesce": true,
 248                 "type": "AtomicSimpleCPU",
 249                 "fastmem": false,
 250                 "profile": 0,
 251                 "icache_port": {
 252                     "peer": "system.cpu0.icache.cpu_side",
 253                     "role": "MASTER"
 254                 },
 255                 "icache": {
 256                     "cpu_side": {
 257                         "peer": "system.cpu0.icache_port",
 258                         "role": "SLAVE"
 259                     },
 260                     "clusivity": "mostly_incl",
 261                     "prefetcher": null,
 262                     "clk_domain": "system.cpu_clk_domain",
 263                     "write_buffers": 8,
 264                     "response_latency": 2,
 265                     "cxx_class": "Cache",
 266                     "size": 32768,
 267                     "tags": {
 268                         "name": "tags",
 269                         "eventq_index": 0,
 270                         "hit_latency": 2,
 271                         "clk_domain": "system.cpu_clk_domain",
 272                         "sequential_access": false,
 273                         "assoc": 1,
 274                         "cxx_class": "LRU",
 275                         "path": "system.cpu0.icache.tags",
 276                         "block_size": 64,
 277                         "type": "LRU",
 278                         "size": 32768
 279                     },
 280                     "system": "system",
 281                     "max_miss_count": 0,
 282                     "eventq_index": 0,
 283                     "mem_side": {
 284                         "peer": "system.toL2Bus.slave[0]",
 285                         "role": "MASTER"
 286                     },
 287                     "type": "Cache",
 288                     "forward_snoops": true,
 289                     "writeback_clean": true,
 290                     "hit_latency": 2,
 291                     "tgts_per_mshr": 20,
 292                     "demand_mshr_reserve": 1,
 293                     "addr_ranges": [
 294                         "0:18446744073709551615"
 295                     ],
 296                     "is_read_only": true,
 297                     "prefetch_on_access": false,
 298                     "path": "system.cpu0.icache",
 299                     "name": "icache",
 300                     "mshrs": 4,
 301                     "sequential_access": false,
 302                     "assoc": 1
 303                 },
 304                 "interrupts": [
 305                     {
 306                         "eventq_index": 0,
 307                         "path": "system.cpu0.interrupts",
 308                         "type": "AlphaInterrupts",
 309                         "name": "interrupts",
 310                         "cxx_class": "AlphaISA::Interrupts"
 311                     }
 312                 ],
 313                 "dcache_port": {
 314                     "peer": "system.cpu0.dcache.cpu_side",
 315                     "role": "MASTER"
 316                 },
 317                 "socket_id": 0,
 318                 "max_insts_all_threads": 0,
 319                 "path": "system.cpu0",
 320                 "max_loads_any_thread": 0,
 321                 "switched_out": false,
 322                 "workload": [
 323                     {
 324                         "name": "workload",
 325                         "output": "cout",
 326                         "chkpt": "",
 327                         "errout": "cerr",
 328                         "kvmInSE": false,
 329                         "system": "system",
 330                         "useArchPT": false,
 331                         "eventq_index": 0,
 332                         "file": "/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz",
 333                         "cxx_class": "EioProcess",
 334                         "path": "system.cpu0.workload",
 335                         "max_stack_size": 67108864,
 336                         "type": "EioProcess",
 337                         "input": "cin"
 338                     }
 339                 ],
 340                 "name": "cpu0",
 341                 "dtb": {
 342                     "name": "dtb",
 343                     "eventq_index": 0,
 344                     "cxx_class": "AlphaISA::TLB",
 345                     "path": "system.cpu0.dtb",
 346                     "type": "AlphaTLB",
 347                     "size": 64
 348                 },
 349                 "simpoint_start_insts": [],
 350                 "max_insts_any_thread": 500000,
 351                 "simulate_inst_stalls": false,
 352                 "progress_interval": 0,
 353                 "branchPred": null,
 354                 "dcache": {
 355                     "cpu_side": {
 356                         "peer": "system.cpu0.dcache_port",
 357                         "role": "SLAVE"
 358                     },
 359                     "clusivity": "mostly_incl",
 360                     "prefetcher": null,
 361                     "clk_domain": "system.cpu_clk_domain",
 362                     "write_buffers": 8,
 363                     "response_latency": 2,
 364                     "cxx_class": "Cache",
 365                     "size": 32768,
 366                     "tags": {
 367                         "name": "tags",
 368                         "eventq_index": 0,
 369                         "hit_latency": 2,
 370                         "clk_domain": "system.cpu_clk_domain",
 371                         "sequential_access": false,
 372                         "assoc": 4,
 373                         "cxx_class": "LRU",
 374                         "path": "system.cpu0.dcache.tags",
 375                         "block_size": 64,
 376                         "type": "LRU",
 377                         "size": 32768
 378                     },
 379                     "system": "system",
 380                     "max_miss_count": 0,
 381                     "eventq_index": 0,
 382                     "mem_side": {
 383                         "peer": "system.toL2Bus.slave[1]",
 384                         "role": "MASTER"
 385                     },
 386                     "type": "Cache",
 387                     "forward_snoops": true,
 388                     "writeback_clean": false,
 389                     "hit_latency": 2,
 390                     "tgts_per_mshr": 20,
 391                     "demand_mshr_reserve": 1,
 392                     "addr_ranges": [
 393                         "0:18446744073709551615"
 394                     ],
 395                     "is_read_only": false,
 396                     "prefetch_on_access": false,
 397                     "path": "system.cpu0.dcache",
 398                     "name": "dcache",
 399                     "mshrs": 4,
 400                     "sequential_access": false,
 401                     "assoc": 4
 402                 },
 403                 "isa": [
 404                     {
 405                         "name": "isa",
 406                         "system": "system",
 407                         "eventq_index": 0,
 408                         "cxx_class": "AlphaISA::ISA",
 409                         "path": "system.cpu0.isa",
 410                         "type": "AlphaISA"
 411                     }
 412                 ],
 413                 "tracer": {
 414                     "eventq_index": 0,
 415                     "path": "system.cpu0.tracer",
 416                     "type": "ExeTracer",
 417                     "name": "tracer",
 418                     "cxx_class": "Trace::ExeTracer"
 419                 }
 420             },
 421             {
 422                 "do_statistics_insts": true,
 423                 "numThreads": 1,
 424                 "itb": {
 425                     "name": "itb",
 426                     "eventq_index": 0,
 427                     "cxx_class": "AlphaISA::TLB",
 428                     "path": "system.cpu1.itb",
 429                     "type": "AlphaTLB",
 430                     "size": 48
 431                 },
 432                 "simulate_data_stalls": false,
 433                 "function_trace": false,
 434                 "do_checkpoint_insts": true,
 435                 "cxx_class": "AtomicSimpleCPU",
 436                 "max_loads_all_threads": 0,
 437                 "system": "system",
 438                 "clk_domain": "system.cpu_clk_domain",
 439                 "function_trace_start": 0,
 440                 "cpu_id": 1,
 441                 "width": 1,
 442                 "checker": null,
 443                 "eventq_index": 0,
 444                 "do_quiesce": true,
 445                 "type": "AtomicSimpleCPU",
 446                 "fastmem": false,
 447                 "profile": 0,
 448                 "icache_port": {
 449                     "peer": "system.cpu1.icache.cpu_side",
 450                     "role": "MASTER"
 451                 },
 452                 "icache": {
 453                     "cpu_side": {
 454                         "peer": "system.cpu1.icache_port",
 455                         "role": "SLAVE"
 456                     },
 457                     "clusivity": "mostly_incl",
 458                     "prefetcher": null,
 459                     "clk_domain": "system.cpu_clk_domain",
 460                     "write_buffers": 8,
 461                     "response_latency": 2,
 462                     "cxx_class": "Cache",
 463                     "size": 32768,
 464                     "tags": {
 465                         "name": "tags",
 466                         "eventq_index": 0,
 467                         "hit_latency": 2,
 468                         "clk_domain": "system.cpu_clk_domain",
 469                         "sequential_access": false,
 470                         "assoc": 1,
 471                         "cxx_class": "LRU",
 472                         "path": "system.cpu1.icache.tags",
 473                         "block_size": 64,
 474                         "type": "LRU",
 475                         "size": 32768
 476                     },
 477                     "system": "system",
 478                     "max_miss_count": 0,
 479                     "eventq_index": 0,
 480                     "mem_side": {
 481                         "peer": "system.toL2Bus.slave[2]",
 482                         "role": "MASTER"
 483                     },
 484                     "type": "Cache",
 485                     "forward_snoops": true,
 486                     "writeback_clean": true,
 487                     "hit_latency": 2,
 488                     "tgts_per_mshr": 20,
 489                     "demand_mshr_reserve": 1,
 490                     "addr_ranges": [
 491                         "0:18446744073709551615"
 492                     ],
 493                     "is_read_only": true,
 494                     "prefetch_on_access": false,
 495                     "path": "system.cpu1.icache",
 496                     "name": "icache",
 497                     "mshrs": 4,
 498                     "sequential_access": false,
 499                     "assoc": 1
 500                 },
 501                 "interrupts": [
 502                     {
 503                         "eventq_index": 0,
 504                         "path": "system.cpu1.interrupts",
 505                         "type": "AlphaInterrupts",
 506                         "name": "interrupts",
 507                         "cxx_class": "AlphaISA::Interrupts"
 508                     }
 509                 ],
 510                 "dcache_port": {
 511                     "peer": "system.cpu1.dcache.cpu_side",
 512                     "role": "MASTER"
 513                 },
 514                 "socket_id": 0,
 515                 "max_insts_all_threads": 0,
 516                 "path": "system.cpu1",
 517                 "max_loads_any_thread": 0,
 518                 "switched_out": false,
 519                 "workload": [
 520                     {
 521                         "name": "workload",
 522                         "output": "cout",
 523                         "chkpt": "",
 524                         "errout": "cerr",
 525                         "kvmInSE": false,
 526                         "system": "system",
 527                         "useArchPT": false,
 528                         "eventq_index": 0,
 529                         "file": "/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz",
 530                         "cxx_class": "EioProcess",
 531                         "path": "system.cpu1.workload",
 532                         "max_stack_size": 67108864,
 533                         "type": "EioProcess",
 534                         "input": "cin"
 535                     }
 536                 ],
 537                 "name": "cpu1",
 538                 "dtb": {
 539                     "name": "dtb",
 540                     "eventq_index": 0,
 541                     "cxx_class": "AlphaISA::TLB",
 542                     "path": "system.cpu1.dtb",
 543                     "type": "AlphaTLB",
 544                     "size": 64
 545                 },
 546                 "simpoint_start_insts": [],
 547                 "max_insts_any_thread": 500000,
 548                 "simulate_inst_stalls": false,
 549                 "progress_interval": 0,
 550                 "branchPred": null,
 551                 "dcache": {
 552                     "cpu_side": {
 553                         "peer": "system.cpu1.dcache_port",
 554                         "role": "SLAVE"
 555                     },
 556                     "clusivity": "mostly_incl",
 557                     "prefetcher": null,
 558                     "clk_domain": "system.cpu_clk_domain",
 559                     "write_buffers": 8,
 560                     "response_latency": 2,
 561                     "cxx_class": "Cache",
 562                     "size": 32768,
 563                     "tags": {
 564                         "name": "tags",
 565                         "eventq_index": 0,
 566                         "hit_latency": 2,
 567                         "clk_domain": "system.cpu_clk_domain",
 568                         "sequential_access": false,
 569                         "assoc": 4,
 570                         "cxx_class": "LRU",
 571                         "path": "system.cpu1.dcache.tags",
 572                         "block_size": 64,
 573                         "type": "LRU",
 574                         "size": 32768
 575                     },
 576                     "system": "system",
 577                     "max_miss_count": 0,
 578                     "eventq_index": 0,
 579                     "mem_side": {
 580                         "peer": "system.toL2Bus.slave[3]",
 581                         "role": "MASTER"
 582                     },
 583                     "type": "Cache",
 584                     "forward_snoops": true,
 585                     "writeback_clean": false,
 586                     "hit_latency": 2,
 587                     "tgts_per_mshr": 20,
 588                     "demand_mshr_reserve": 1,
 589                     "addr_ranges": [
 590                         "0:18446744073709551615"
 591                     ],
 592                     "is_read_only": false,
 593                     "prefetch_on_access": false,
 594                     "path": "system.cpu1.dcache",
 595                     "name": "dcache",
 596                     "mshrs": 4,
 597                     "sequential_access": false,
 598                     "assoc": 4
 599                 },
 600                 "isa": [
 601                     {
 602                         "name": "isa",
 603                         "system": "system",
 604                         "eventq_index": 0,
 605                         "cxx_class": "AlphaISA::ISA",
 606                         "path": "system.cpu1.isa",
 607                         "type": "AlphaISA"
 608                     }
 609                 ],
 610                 "tracer": {
 611                     "eventq_index": 0,
 612                     "path": "system.cpu1.tracer",
 613                     "type": "ExeTracer",
 614                     "name": "tracer",
 615                     "cxx_class": "Trace::ExeTracer"
 616                 }
 617             },
 618             {
 619                 "do_statistics_insts": true,
 620                 "numThreads": 1,
 621                 "itb": {
 622                     "name": "itb",
 623                     "eventq_index": 0,
 624                     "cxx_class": "AlphaISA::TLB",
 625                     "path": "system.cpu2.itb",
 626                     "type": "AlphaTLB",
 627                     "size": 48
 628                 },
 629                 "simulate_data_stalls": false,
 630                 "function_trace": false,
 631                 "do_checkpoint_insts": true,
 632                 "cxx_class": "AtomicSimpleCPU",
 633                 "max_loads_all_threads": 0,
 634                 "system": "system",
 635                 "clk_domain": "system.cpu_clk_domain",
 636                 "function_trace_start": 0,
 637                 "cpu_id": 2,
 638                 "width": 1,
 639                 "checker": null,
 640                 "eventq_index": 0,
 641                 "do_quiesce": true,
 642                 "type": "AtomicSimpleCPU",
 643                 "fastmem": false,
 644                 "profile": 0,
 645                 "icache_port": {
 646                     "peer": "system.cpu2.icache.cpu_side",
 647                     "role": "MASTER"
 648                 },
 649                 "icache": {
 650                     "cpu_side": {
 651                         "peer": "system.cpu2.icache_port",
 652                         "role": "SLAVE"
 653                     },
 654                     "clusivity": "mostly_incl",
 655                     "prefetcher": null,
 656                     "clk_domain": "system.cpu_clk_domain",
 657                     "write_buffers": 8,
 658                     "response_latency": 2,
 659                     "cxx_class": "Cache",
 660                     "size": 32768,
 661                     "tags": {
 662                         "name": "tags",
 663                         "eventq_index": 0,
 664                         "hit_latency": 2,
 665                         "clk_domain": "system.cpu_clk_domain",
 666                         "sequential_access": false,
 667                         "assoc": 1,
 668                         "cxx_class": "LRU",
 669                         "path": "system.cpu2.icache.tags",
 670                         "block_size": 64,
 671                         "type": "LRU",
 672                         "size": 32768
 673                     },
 674                     "system": "system",
 675                     "max_miss_count": 0,
 676                     "eventq_index": 0,
 677                     "mem_side": {
 678                         "peer": "system.toL2Bus.slave[4]",
 679                         "role": "MASTER"
 680                     },
 681                     "type": "Cache",
 682                     "forward_snoops": true,
 683                     "writeback_clean": true,
 684                     "hit_latency": 2,
 685                     "tgts_per_mshr": 20,
 686                     "demand_mshr_reserve": 1,
 687                     "addr_ranges": [
 688                         "0:18446744073709551615"
 689                     ],
 690                     "is_read_only": true,
 691                     "prefetch_on_access": false,
 692                     "path": "system.cpu2.icache",
 693                     "name": "icache",
 694                     "mshrs": 4,
 695                     "sequential_access": false,
 696                     "assoc": 1
 697                 },
 698                 "interrupts": [
 699                     {
 700                         "eventq_index": 0,
 701                         "path": "system.cpu2.interrupts",
 702                         "type": "AlphaInterrupts",
 703                         "name": "interrupts",
 704                         "cxx_class": "AlphaISA::Interrupts"
 705                     }
 706                 ],
 707                 "dcache_port": {
 708                     "peer": "system.cpu2.dcache.cpu_side",
 709                     "role": "MASTER"
 710                 },
 711                 "socket_id": 0,
 712                 "max_insts_all_threads": 0,
 713                 "path": "system.cpu2",
 714                 "max_loads_any_thread": 0,
 715                 "switched_out": false,
 716                 "workload": [
 717                     {
 718                         "name": "workload",
 719                         "output": "cout",
 720                         "chkpt": "",
 721                         "errout": "cerr",
 722                         "kvmInSE": false,
 723                         "system": "system",
 724                         "useArchPT": false,
 725                         "eventq_index": 0,
 726                         "file": "/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz",
 727                         "cxx_class": "EioProcess",
 728                         "path": "system.cpu2.workload",
 729                         "max_stack_size": 67108864,
 730                         "type": "EioProcess",
 731                         "input": "cin"
 732                     }
 733                 ],
 734                 "name": "cpu2",
 735                 "dtb": {
 736                     "name": "dtb",
 737                     "eventq_index": 0,
 738                     "cxx_class": "AlphaISA::TLB",
 739                     "path": "system.cpu2.dtb",
 740                     "type": "AlphaTLB",
 741                     "size": 64
 742                 },
 743                 "simpoint_start_insts": [],
 744                 "max_insts_any_thread": 500000,
 745                 "simulate_inst_stalls": false,
 746                 "progress_interval": 0,
 747                 "branchPred": null,
 748                 "dcache": {
 749                     "cpu_side": {
 750                         "peer": "system.cpu2.dcache_port",
 751                         "role": "SLAVE"
 752                     },
 753                     "clusivity": "mostly_incl",
 754                     "prefetcher": null,
 755                     "clk_domain": "system.cpu_clk_domain",
 756                     "write_buffers": 8,
 757                     "response_latency": 2,
 758                     "cxx_class": "Cache",
 759                     "size": 32768,
 760                     "tags": {
 761                         "name": "tags",
 762                         "eventq_index": 0,
 763                         "hit_latency": 2,
 764                         "clk_domain": "system.cpu_clk_domain",
 765                         "sequential_access": false,
 766                         "assoc": 4,
 767                         "cxx_class": "LRU",
 768                         "path": "system.cpu2.dcache.tags",
 769                         "block_size": 64,
 770                         "type": "LRU",
 771                         "size": 32768
 772                     },
 773                     "system": "system",
 774                     "max_miss_count": 0,
 775                     "eventq_index": 0,
 776                     "mem_side": {
 777                         "peer": "system.toL2Bus.slave[5]",
 778                         "role": "MASTER"
 779                     },
 780                     "type": "Cache",
 781                     "forward_snoops": true,
 782                     "writeback_clean": false,
 783                     "hit_latency": 2,
 784                     "tgts_per_mshr": 20,
 785                     "demand_mshr_reserve": 1,
 786                     "addr_ranges": [
 787                         "0:18446744073709551615"
 788                     ],
 789                     "is_read_only": false,
 790                     "prefetch_on_access": false,
 791                     "path": "system.cpu2.dcache",
 792                     "name": "dcache",
 793                     "mshrs": 4,
 794                     "sequential_access": false,
 795                     "assoc": 4
 796                 },
 797                 "isa": [
 798                     {
 799                         "name": "isa",
 800                         "system": "system",
 801                         "eventq_index": 0,
 802                         "cxx_class": "AlphaISA::ISA",
 803                         "path": "system.cpu2.isa",
 804                         "type": "AlphaISA"
 805                     }
 806                 ],
 807                 "tracer": {
 808                     "eventq_index": 0,
 809                     "path": "system.cpu2.tracer",
 810                     "type": "ExeTracer",
 811                     "name": "tracer",
 812                     "cxx_class": "Trace::ExeTracer"
 813                 }
 814             },
 815             {
 816                 "do_statistics_insts": true,
 817                 "numThreads": 1,
 818                 "itb": {
 819                     "name": "itb",
 820                     "eventq_index": 0,
 821                     "cxx_class": "AlphaISA::TLB",
 822                     "path": "system.cpu3.itb",
 823                     "type": "AlphaTLB",
 824                     "size": 48
 825                 },
 826                 "simulate_data_stalls": false,
 827                 "function_trace": false,
 828                 "do_checkpoint_insts": true,
 829                 "cxx_class": "AtomicSimpleCPU",
 830                 "max_loads_all_threads": 0,
 831                 "system": "system",
 832                 "clk_domain": "system.cpu_clk_domain",
 833                 "function_trace_start": 0,
 834                 "cpu_id": 3,
 835                 "width": 1,
 836                 "checker": null,
 837                 "eventq_index": 0,
 838                 "do_quiesce": true,
 839                 "type": "AtomicSimpleCPU",
 840                 "fastmem": false,
 841                 "profile": 0,
 842                 "icache_port": {
 843                     "peer": "system.cpu3.icache.cpu_side",
 844                     "role": "MASTER"
 845                 },
 846                 "icache": {
 847                     "cpu_side": {
 848                         "peer": "system.cpu3.icache_port",
 849                         "role": "SLAVE"
 850                     },
 851                     "clusivity": "mostly_incl",
 852                     "prefetcher": null,
 853                     "clk_domain": "system.cpu_clk_domain",
 854                     "write_buffers": 8,
 855                     "response_latency": 2,
 856                     "cxx_class": "Cache",
 857                     "size": 32768,
 858                     "tags": {
 859                         "name": "tags",
 860                         "eventq_index": 0,
 861                         "hit_latency": 2,
 862                         "clk_domain": "system.cpu_clk_domain",
 863                         "sequential_access": false,
 864                         "assoc": 1,
 865                         "cxx_class": "LRU",
 866                         "path": "system.cpu3.icache.tags",
 867                         "block_size": 64,
 868                         "type": "LRU",
 869                         "size": 32768
 870                     },
 871                     "system": "system",
 872                     "max_miss_count": 0,
 873                     "eventq_index": 0,
 874                     "mem_side": {
 875                         "peer": "system.toL2Bus.slave[6]",
 876                         "role": "MASTER"
 877                     },
 878                     "type": "Cache",
 879                     "forward_snoops": true,
 880                     "writeback_clean": true,
 881                     "hit_latency": 2,
 882                     "tgts_per_mshr": 20,
 883                     "demand_mshr_reserve": 1,
 884                     "addr_ranges": [
 885                         "0:18446744073709551615"
 886                     ],
 887                     "is_read_only": true,
 888                     "prefetch_on_access": false,
 889                     "path": "system.cpu3.icache",
 890                     "name": "icache",
 891                     "mshrs": 4,
 892                     "sequential_access": false,
 893                     "assoc": 1
 894                 },
 895                 "interrupts": [
 896                     {
 897                         "eventq_index": 0,
 898                         "path": "system.cpu3.interrupts",
 899                         "type": "AlphaInterrupts",
 900                         "name": "interrupts",
 901                         "cxx_class": "AlphaISA::Interrupts"
 902                     }
 903                 ],
 904                 "dcache_port": {
 905                     "peer": "system.cpu3.dcache.cpu_side",
 906                     "role": "MASTER"
 907                 },
 908                 "socket_id": 0,
 909                 "max_insts_all_threads": 0,
 910                 "path": "system.cpu3",
 911                 "max_loads_any_thread": 0,
 912                 "switched_out": false,
 913                 "workload": [
 914                     {
 915                         "name": "workload",
 916                         "output": "cout",
 917                         "chkpt": "",
 918                         "errout": "cerr",
 919                         "kvmInSE": false,
 920                         "system": "system",
 921                         "useArchPT": false,
 922                         "eventq_index": 0,
 923                         "file": "/dist/m5/regression/test-progs/anagram/bin/alpha/eio/anagram-vshort.eio.gz",
 924                         "cxx_class": "EioProcess",
 925                         "path": "system.cpu3.workload",
 926                         "max_stack_size": 67108864,
 927                         "type": "EioProcess",
 928                         "input": "cin"
 929                     }
 930                 ],
 931                 "name": "cpu3",
 932                 "dtb": {
 933                     "name": "dtb",
 934                     "eventq_index": 0,
 935                     "cxx_class": "AlphaISA::TLB",
 936                     "path": "system.cpu3.dtb",
 937                     "type": "AlphaTLB",
 938                     "size": 64
 939                 },
 940                 "simpoint_start_insts": [],
 941                 "max_insts_any_thread": 500000,
 942                 "simulate_inst_stalls": false,
 943                 "progress_interval": 0,
 944                 "branchPred": null,
 945                 "dcache": {
 946                     "cpu_side": {
 947                         "peer": "system.cpu3.dcache_port",
 948                         "role": "SLAVE"
 949                     },
 950                     "clusivity": "mostly_incl",
 951                     "prefetcher": null,
 952                     "clk_domain": "system.cpu_clk_domain",
 953                     "write_buffers": 8,
 954                     "response_latency": 2,
 955                     "cxx_class": "Cache",
 956                     "size": 32768,
 957                     "tags": {
 958                         "name": "tags",
 959                         "eventq_index": 0,
 960                         "hit_latency": 2,
 961                         "clk_domain": "system.cpu_clk_domain",
 962                         "sequential_access": false,
 963                         "assoc": 4,
 964                         "cxx_class": "LRU",
 965                         "path": "system.cpu3.dcache.tags",
 966                         "block_size": 64,
 967                         "type": "LRU",
 968                         "size": 32768
 969                     },
 970                     "system": "system",
 971                     "max_miss_count": 0,
 972                     "eventq_index": 0,
 973                     "mem_side": {
 974                         "peer": "system.toL2Bus.slave[7]",
 975                         "role": "MASTER"
 976                     },
 977                     "type": "Cache",
 978                     "forward_snoops": true,
 979                     "writeback_clean": false,
 980                     "hit_latency": 2,
 981                     "tgts_per_mshr": 20,
 982                     "demand_mshr_reserve": 1,
 983                     "addr_ranges": [
 984                         "0:18446744073709551615"
 985                     ],
 986                     "is_read_only": false,
 987                     "prefetch_on_access": false,
 988                     "path": "system.cpu3.dcache",
 989                     "name": "dcache",
 990                     "mshrs": 4,
 991                     "sequential_access": false,
 992                     "assoc": 4
 993                 },
 994                 "isa": [
 995                     {
 996                         "name": "isa",
 997                         "system": "system",
 998                         "eventq_index": 0,
 999                         "cxx_class": "AlphaISA::ISA",
1000                         "path": "system.cpu3.isa",
1001                         "type": "AlphaISA"
1002                     }
1003                 ],
1004                 "tracer": {
1005                     "eventq_index": 0,
1006                     "path": "system.cpu3.tracer",
1007                     "type": "ExeTracer",
1008                     "name": "tracer",
1009                     "cxx_class": "Trace::ExeTracer"
1010                 }
1011             }
1012         ],
1013         "multi_thread": false,
1014         "exit_on_work_items": false,
1015         "work_item_id": -1,
1016         "num_work_ids": 16
1017     },
1018     "time_sync_period": 100000000000,
1019     "eventq_index": 0,
1020     "time_sync_spin_threshold": 100000000,
1021     "cxx_class": "Root",
1022     "path": "root",
1023     "time_sync_enable": false,
1024     "type": "Root",
1025     "full_system": false
1026 }