8 time_sync_period=100000000000
9 time_sync_spin_threshold=100000000
13 children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
16 clk_domain=system.clk_domain
18 exit_on_work_items=false
21 kernel_addr_check=true
22 load_addr_mask=1099511627775
26 memories=system.physmem
27 mmap_using_noreserve=false
32 work_begin_ckpt_count=0
33 work_begin_cpu_id_exit=-1
34 work_begin_exit_count=0
35 work_cpus_ckpt_count=0
39 system_port=system.membus.slave[0]
47 voltage_domain=system.voltage_domain
51 children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
54 clk_domain=system.cpu_clk_domain
56 do_checkpoint_insts=true
58 do_statistics_insts=true
62 function_trace_start=0
63 interrupts=system.cpu.interrupts
66 max_insts_all_threads=0
67 max_insts_any_thread=0
68 max_loads_all_threads=0
69 max_loads_any_thread=0
77 tracer=system.cpu.tracer
78 workload=system.cpu.workload
79 dcache_port=system.cpu.dcache.cpu_side
80 icache_port=system.cpu.icache.cpu_side
85 addr_ranges=0:18446744073709551615
87 clk_domain=system.cpu_clk_domain
96 prefetch_on_access=false
99 sequential_access=false
102 tags=system.cpu.dcache.tags
105 writeback_clean=false
106 cpu_side=system.cpu.dcache_port
107 mem_side=system.cpu.toL2Bus.slave[1]
109 [system.cpu.dcache.tags]
113 clk_domain=system.cpu_clk_domain
116 sequential_access=false
127 addr_ranges=0:18446744073709551615
129 clk_domain=system.cpu_clk_domain
130 clusivity=mostly_incl
131 demand_mshr_reserve=1
138 prefetch_on_access=false
141 sequential_access=false
144 tags=system.cpu.icache.tags
148 cpu_side=system.cpu.icache_port
149 mem_side=system.cpu.toL2Bus.slave[0]
151 [system.cpu.icache.tags]
155 clk_domain=system.cpu_clk_domain
158 sequential_access=false
161 [system.cpu.interrupts]
178 addr_ranges=0:18446744073709551615
180 clk_domain=system.cpu_clk_domain
181 clusivity=mostly_incl
182 demand_mshr_reserve=1
189 prefetch_on_access=false
192 sequential_access=false
195 tags=system.cpu.l2cache.tags
198 writeback_clean=false
199 cpu_side=system.cpu.toL2Bus.master[0]
200 mem_side=system.membus.slave[1]
202 [system.cpu.l2cache.tags]
206 clk_domain=system.cpu_clk_domain
209 sequential_access=false
214 children=snoop_filter
215 clk_domain=system.cpu_clk_domain
220 snoop_filter=system.cpu.toL2Bus.snoop_filter
221 snoop_response_latency=1
223 use_default_range=false
225 master=system.cpu.l2cache.cpu_side
226 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
228 [system.cpu.toL2Bus.snoop_filter]
239 [system.cpu.workload]
242 cwd=build/ALPHA/tests/opt/quick/se/70.twolf/alpha/tru64/simple-timing
249 executable=/dist/m5/cpu2000/binaries/alpha/tru64/twolf
253 max_stack_size=67108864
262 [system.cpu_clk_domain]
268 voltage_domain=system.voltage_domain
270 [system.dvfs_handler]
275 sys_clk_domain=system.clk_domain
276 transition_latency=100000000
280 clk_domain=system.clk_domain
286 snoop_response_latency=4
288 use_default_range=false
290 master=system.physmem.port
291 slave=system.system_port system.cpu.l2cache.mem_side
296 clk_domain=system.clk_domain
297 conf_table_reported=true
304 port=system.membus.master[0]
306 [system.voltage_domain]