tests/sat/share.ys

   1 read_verilog share.v
   2 proc;;
   3
   4 copy test_1 gold_1
   5 copy test_2 gold_2
   6 share test_1 test_2;;
   7
   8 select -assert-count 1 test_1/t:$mul
   9 select -assert-count 1 test_2/t:$mul
  10 select -assert-count 1 test_2/t:$div
  11
  12 miter -equiv -flatten -make_outputs -make_outcmp gold_1 test_1 miter_1
  13 sat -verify -prove trigger 0 -show-inputs -show-outputs miter_1
  14
  15 miter -equiv -flatten -make_outputs -make_outcmp gold_2 test_2 miter_2
  16 sat -verify -prove trigger 0 -show-inputs -show-outputs miter_2
  17