2 // test taken from aes_core from iwls2005
4 module aes_key_expand_128(clk, kld, key, wo_0, wo_1, wo_2, wo_3);
8 output [3:0] wo_0, wo_1, wo_2, wo_3;
16 always @(posedge clk) begin
17 w[0] <= kld ? key[15:12] : w[0];
18 w[1] <= kld ? key[11: 8] : w[0]^w[1];
19 w[2] <= kld ? key[ 7: 4] : w[0]^w[1]^w[2];
20 w[3] <= kld ? key[ 3: 0] : w[0]^w[1]^w[2]^w[3];