fail svinterfaces testcases on yosys error exit
[yosys.git] / tests / simple / arraycells.v
1
2 module array_test001(a, b, c, y);
3 input a;
4 input [31:0] b, c;
5 output [31:0] y;
6
7 aoi12 p [31:0] (a, b, c, y);
8 endmodule
9
10 module aoi12(a, b, c, y);
11 input a, b, c;
12 output y;
13 assign y = ~((a & b) | c);
14 endmodule
15