1 module optest(clk, mode, u1, s1, u2, s2, y);
7 input signed [3:0] s1, s2;
11 always @(posedge clk) begin
104 72: y <= { &u1, ~&u1, |u1, ~|u1, ^u1, ~^u1, ^~u1 };
105 73: y <= { &s1, ~&s1, |s1, ~|s1, ^s1, ~^s1, ^~s1 };
106 74: y <= { &u1[1:0], ~&u1[1:0], |u1[1:0], ~|u1[1:0], ^u1[1:0], ~^u1[1:0], ^~u1[1:0] };
107 75: y <= { &s1[1:0], ~&s1[1:0], |s1[1:0], ~|s1[1:0], ^s1[1:0], ~^s1[1:0], ^~s1[1:0] };
109 76: y <= { u1[1:0] && u2[1:0], u1[1:0] && u2[1:0], !u1[1:0] };
110 77: y <= {4{u1[1:0]}};
111 78: y <= {u1, u2} ^ {s1, s2};
112 79: y <= {u1, u2} & {s1, s2};
114 80: y <= u1[0] ? u1 : u2;
115 81: y <= u1[0] ? u1 : s2;
116 82: y <= u1[0] ? s1 : u2;
117 83: y <= u1[0] ? s1 : s2;