tests/simple/xfirrtl

   1 # This file contains the names of verilog files to exclude from verilog to FIRRTL regression tests due to known failures.
   2 arraycells.v    inst id[0] of
   3 dff_different_styles.v
   4 dff_init.v      Initial value not supported
   5 generate.v      combinational loop
   6 hierdefparam.v  inst id[0] of
   7 i2c_master_tests.v   $adff
   8 macros.v        drops modules
   9 mem2reg.v       drops modules
  10 mem_arst.v      $adff
  11 memory.v        $adff
  12 multiplier.v    inst id[0] of
  13 muxtree.v       drops modules
  14 omsp_dbg_uart.v $adff
  15 operators.v     $pow
  16 partsel.v       drops modules
  17 process.v       drops modules
  18 realexpr.v      drops modules
  19 retime.v        Initial value (11110101) for (retime_test.ff) not supported
  20 scopes.v        original verilog issues ( -x where x isn't declared signed)
  21 sincos.v        $adff
  22 specify.v       no code (empty module generates error
  23 subbytes.v      $adff
  24 task_func.v     drops modules
  25 values.v        combinational loop
  26 vloghammer.v    combinational loop
  27 wreduce.v       original verilog issues ( -x where x isn't declared signed)