tests/svinterfaces/svinterface_at_top.sv

   1
   2
   3 module TopModule(
   4     input logic clk,
   5     input logic rst,
   6     output logic [21:0] outOther,
   7     input logic [1:0] sig,
   8     input logic flip,
   9     output logic [1:0] sig_out,
  10     MyInterface.submodule1 interfaceInstanceAtTop,
  11     output logic [15:0] passThrough);
  12
  13   MyInterface #(.WIDTH(4)) MyInterfaceInstance();
  14
  15   SubModule1 u_SubModule1 (
  16     .clk(clk),
  17     .rst(rst),
  18     .u_MyInterface(MyInterfaceInstance),
  19     .u_MyInterfaceFromTop(interfaceInstanceAtTop),
  20     .outOther(outOther),
  21     .sig (sig)
  22   );
  23
  24   assign sig_out = MyInterfaceInstance.mysig_out;
  25
  26
  27   assign MyInterfaceInstance.setting = flip;
  28
  29   assign passThrough = MyInterfaceInstance.passThrough;
  30
  31 endmodule
  32
  33 interface MyInterface #(
  34   parameter WIDTH = 3)(
  35   );
  36
  37   logic setting;
  38   logic [WIDTH-1:0] other_setting;
  39
  40   logic [1:0] mysig_out;
  41
  42   logic [15:0] passThrough;
  43
  44     modport submodule1 (
  45         input  setting,
  46         output other_setting,
  47         output mysig_out,
  48         output passThrough
  49     );
  50
  51     modport submodule2 (
  52         input  setting,
  53         output other_setting,
  54         input  mysig_out,
  55         output passThrough
  56     );
  57
  58 endinterface
  59
  60
  61 module SubModule1(
  62     input logic clk,
  63     input logic rst,
  64     MyInterface.submodule1 u_MyInterface,
  65     MyInterface.submodule1 u_MyInterfaceFromTop,
  66     input logic [1:0] sig,
  67     output logic [21:0] outOther
  68
  69   );
  70
  71
  72   always_ff @(posedge clk or posedge rst)
  73     if(rst)
  74       u_MyInterface.mysig_out <= 0;
  75     else begin
  76       if(u_MyInterface.setting)
  77         u_MyInterface.mysig_out <= sig;
  78       else
  79         u_MyInterface.mysig_out <= ~sig;
  80     end
  81
  82   MyInterface #(.WIDTH(22)) MyInterfaceInstanceInSub();
  83
  84   SubModule2 u_SubModule2 (
  85     .clk(clk),
  86     .rst(rst),
  87     .u_MyInterfaceFromTopDown(u_MyInterfaceFromTop),
  88     .u_MyInterfaceInSub2(u_MyInterface),
  89     .u_MyInterfaceInSub3(MyInterfaceInstanceInSub)
  90   );
  91
  92     assign outOther = MyInterfaceInstanceInSub.other_setting;
  93
  94     assign MyInterfaceInstanceInSub.setting = 0;
  95     assign MyInterfaceInstanceInSub.mysig_out = sig;
  96
  97 endmodule
  98
  99 module SubModule2(
 100
 101     input logic clk,
 102     input logic rst,
 103     MyInterface.submodule2 u_MyInterfaceInSub2,
 104     MyInterface.submodule1 u_MyInterfaceFromTopDown,
 105     MyInterface.submodule2 u_MyInterfaceInSub3
 106
 107   );
 108
 109   assign u_MyInterfaceFromTopDown.mysig_out = u_MyInterfaceFromTop.setting ? 10 :  20;
 110
 111    always_comb begin
 112       if (u_MyInterfaceInSub3.mysig_out == 2'b00)
 113         u_MyInterfaceInSub3.other_setting[21:0] = 1000;
 114       else if (u_MyInterfaceInSub3.mysig_out == 2'b01)
 115         u_MyInterfaceInSub3.other_setting[21:0] = 2000;
 116       else if (u_MyInterfaceInSub3.mysig_out == 2'b10)
 117         u_MyInterfaceInSub3.other_setting[21:0] = 3000;
 118       else
 119         u_MyInterfaceInSub3.other_setting[21:0] = 4000;
 120    end
 121
 122     assign u_MyInterfaceInSub2.passThrough[7:0] = 124;
 123     assign u_MyInterfaceInSub2.passThrough[15:8] = 200;
 124
 125 endmodule