Add ability to override verilog mode for verific -f command
[yosys.git] / tests / svtypes / static_cast_nonconst.ys
1 logger -expect error "Static cast with non constant expression" 1
2 read_verilog -sv <<EOT
3 module top; wire [7:0] a, b = (a)'(0); endmodule
4 EOT