Merge pull request #1519 from YosysHQ/eddie/submod_po
[yosys.git] / tests / svtypes / typedef_scopes.sv
1
2 typedef logic [3:0] outer_uint4_t;
3 typedef enum logic {s0, s1} outer_enum_t;
4
5 module top;
6
7 (outer_uint4_t) u4_i = 8'hA5;
8 (outer_enum_t) enum4_i = s0;
9 always @(*) assert(u4_i == 4'h5);
10 always @(*) assert(enum4_i == 1'b0);
11
12 typedef logic [3:0] inner_type;
13 typedef enum logic [2:0] {s2=2, s3, s4} inner_enum_t;
14 (inner_type) inner_i1 = 8'h5A;
15 (inner_enum_t) inner_enum1 = s3;
16 always @(*) assert(inner_i1 == 4'hA);
17 always @(*) assert(inner_enum1 == 3'h3);
18
19 if (1) begin: genblock
20 typedef logic [7:0] inner_type;
21 parameter (inner_type) inner_const = 8'hA5;
22 typedef enum logic [2:0] {s5=5, s6, s7} inner_enum_t;
23 (inner_type) inner_gb_i = inner_const; //8'hA5;
24 (inner_enum_t) inner_gb_enum1 = s7;
25 always @(*) assert(inner_gb_i == 8'hA5);
26 always @(*) assert(inner_gb_enum1 == 3'h7);
27 end
28
29 (inner_type) inner_i2 = 8'h42;
30 (inner_enum_t) inner_enum2 = s4;
31 always @(*) assert(inner_i2 == 4'h2);
32 always @(*) assert(inner_enum2 == 3'h4);
33
34
35 endmodule