tests/svtypes/typedef_struct_port.sv

   1 package p;
   2
   3 typedef struct packed {
   4     byte a;
   5     byte b;
   6 } p_t;
   7
   8 typedef logic [31:0] l_t;
   9
  10 endpackage
  11
  12 module foo1(
  13         input p::p_t p,
  14         output p::p_t o
  15 );
  16     assign o = p;
  17 endmodule
  18
  19 module foo2(p, o);
  20     input p::p_t p;
  21     output p::p_t o;
  22     assign o = p;
  23 endmodule
  24
  25 module foo3(input p::l_t p, input p::l_t o);
  26     assign o = p;
  27 endmodule
  28
  29 module foo4(input logic [15:0] p, input logic [15:0] o);
  30     assign o = p;
  31 endmodule
  32
  33 module test_parser(a,b,c,d,e,f,g,h,i);
  34 input [7:0] a; // no explicit net declaration - net is unsigned
  35 input [7:0] b;
  36 input signed [7:0] c;
  37 input signed [7:0] d; // no explicit net declaration - net is signed
  38 output [7:0] e; // no explicit net declaration - net is unsigned
  39 output [7:0] f;
  40 output signed [7:0] g;
  41 output signed [7:0] h; // no explicit net declaration - net is signed
  42 output unsigned [7:0] i;
  43 wire signed [7:0] b; // port b inherits signed attribute from net decl.
  44 wire [7:0] c; // net c inherits signed attribute from port
  45 logic signed [7:0] f;// port f inherits signed attribute from logic decl.
  46 logic [7:0] g; // logic g inherits signed attribute from port
  47
  48     assign a = 8'b10001111;
  49     assign b = 8'b10001111;
  50     assign c = 8'b10001111;
  51     assign d = 8'b10001111;
  52     assign e = 8'b10001111;
  53     assign f = 8'b10001111;
  54     assign g = 8'b10001111;
  55     assign h = 8'b10001111;
  56     assign i = 8'b10001111;
  57     always_comb begin
  58         assert($unsigned(143) == a);
  59         assert($signed(-113) == b);
  60         assert($signed(-113) == c);
  61         assert($signed(-113) == d);
  62         assert($unsigned(143) == e);
  63         assert($unsigned(143) == f);
  64         assert($signed(-113) == g);
  65         assert($signed(-113) == h);
  66         assert($unsigned(143) == i);
  67     end
  68 endmodule
  69
  70 module top;
  71     p::p_t ps;
  72     assign ps.a = 8'hAA;
  73     assign ps.b = 8'h55;
  74     foo1 foo(.p(ps));
  75
  76     p::p_t body;
  77     assign body.a = 8'hBB;
  78     assign body.b = 8'h66;
  79     foo2 foo_b(.p(body));
  80
  81     typedef p::l_t local_alias;
  82
  83     local_alias l_s;
  84     assign l_s = 32'hAAAAAAAA;
  85     foo3 foo_l(.p(l_s));
  86
  87     typedef logic [15:0] sl_t;
  88
  89     sl_t sl_s;
  90     assign sl_s = 16'hBBBB;
  91     foo4 foo_sl(.p(sl_s));
  92
  93     typedef sl_t local_alias_st;
  94
  95     local_alias_st lsl_s;
  96     assign lsl_s = 16'hCCCC;
  97     foo4 foo_lsl(.p(lsl_s));
  98
  99     const logic j = 1'b1;
 100
 101     always_comb begin
 102         assert(8'hAA == ps.a);
 103         assert(8'h55 == ps.b);
 104         assert(8'hBB == body.a);
 105         assert(8'h66 == body.b);
 106         assert(32'hAAAAAAAA == l_s);
 107         assert(16'hBBBB == sl_s);
 108         assert(16'hCCCC == lsl_s);
 109         assert(1'b1 == j);
 110     end
 111 endmodule