tests/svtypes/union_simple.sv

   1 module top;
   2
   3         typedef struct packed {
   4                 byte a,b,c,d;
   5         } byte4_t;
   6
   7         typedef union packed {
   8                 int     x;
   9                 byte4_t y;
  10         } w_t;
  11
  12         w_t w;
  13
  14         assign w.x = 'h42;
  15         always_comb begin
  16                 assert(w.y.d == 8'h42);
  17         end
  18
  19         typedef logic[4:0] reg_addr_t;
  20         typedef logic[6:0] opcode_t;
  21
  22         typedef struct packed {
  23                 bit [6:0]  func7;
  24                 reg_addr_t rs2;
  25                 reg_addr_t rs1;
  26                 bit [2:0]  func3;
  27                 reg_addr_t rd;
  28                 opcode_t   opcode;
  29         } R_t;
  30
  31         typedef struct packed {
  32                 bit[11:0]  imm;
  33                 reg_addr_t rs1;
  34                 bit[2:0]   func3;
  35                 reg_addr_t rd;
  36                 opcode_t   opcode;
  37         } I_t;
  38
  39         typedef struct packed {
  40                 bit[19:0]  imm;
  41                 reg_addr_t rd;
  42                 opcode_t   opcode;
  43         } U_t;
  44
  45         typedef union packed {
  46                 R_t     r;
  47                 I_t     i;
  48                 U_t     u;
  49         } instruction_t;
  50
  51         instruction_t ir1;
  52         assign ir1 = 32'h0AA01EB7;          //  lui t4,0xAA01
  53         always_comb begin
  54                 assert(ir1.u.opcode == 'h37);
  55                 assert(ir1.r.opcode == 'h37);
  56                 assert(ir1.u.rd == 'd29);
  57                 assert(ir1.r.rd == 'd29);
  58                 assert(ir1.u.imm == 'hAA01);
  59         end
  60
  61         union packed {
  62                 int word;
  63                 struct packed {
  64                         byte a, b, c, d;
  65                 } byte4;
  66         } u;
  67         assign u.word = 'h42;
  68         always_comb begin
  69                 assert(u.byte4.d == 'h42);
  70         end
  71
  72 endmodule