Add ability to override verilog mode for verific -f command
[yosys.git] / tests / techmap / dfflegalize_aldff.ys
1 read_verilog -icells <<EOT
2
3 module aldff(input C, L, AD, D, output [2:0] Q);
4 $_ALDFF_PP_ ff0 (.C(C), .L(L), .AD(AD), .D(D), .Q(Q[0]));
5 $_ALDFF_PN_ ff1 (.C(C), .L(L), .AD(AD), .D(D), .Q(Q[1]));
6 $_ALDFF_NP_ ff2 (.C(C), .L(L), .AD(AD), .D(D), .Q(Q[2]));
7 endmodule
8
9 module aldffe(input C, E, L, AD, D, output [3:0] Q);
10 $_ALDFFE_PPP_ ff0 (.C(C), .L(L), .AD(AD), .E(E), .D(D), .Q(Q[0]));
11 $_ALDFFE_PPN_ ff1 (.C(C), .L(L), .AD(AD), .E(E), .D(D), .Q(Q[1]));
12 $_ALDFFE_PNP_ ff2 (.C(C), .L(L), .AD(AD), .E(E), .D(D), .Q(Q[2]));
13 $_ALDFFE_NPP_ ff3 (.C(C), .L(L), .AD(AD), .E(E), .D(D), .Q(Q[3]));
14 endmodule
15
16 module top(input C, E, L, AD, D, output [6:0] Q);
17 aldff aldff_(.C(C), .L(L), .AD(AD), .D(D), .Q(Q[2:0]));
18 aldffe aldffe_(.C(C), .L(L), .AD(AD), .E(E), .D(D), .Q(Q[6:3]));
19 endmodule
20
21 EOT
22
23 design -save orig
24 flatten
25 equiv_opt -assert -multiclock dfflegalize -cell $_ALDFF_PP_ x
26 equiv_opt -assert -multiclock dfflegalize -cell $_ALDFFE_PPP_ x
27 #equiv_opt -assert -multiclock dfflegalize -cell $_DFFSR_PPP_ x
28 #equiv_opt -assert -multiclock dfflegalize -cell $_DFFSRE_PPPP_ x
29
30
31 # Convert everything to ALDFFs.
32
33 design -load orig
34 dfflegalize -cell $_ALDFF_PP_ x
35
36 select -assert-count 2 aldff/t:$_NOT_
37 select -assert-count 2 aldffe/t:$_NOT_
38 select -assert-count 0 aldff/t:$_MUX_
39 select -assert-count 4 aldffe/t:$_MUX_
40 select -assert-count 7 t:$_ALDFF_PP_
41 select -assert-none t:$_ALDFF_PP_ t:$_MUX_ t:$_NOT_ top/* %% %n t:* %i
42
43
44 # Convert everything to ALDFFEs.
45
46 design -load orig
47 dfflegalize -cell $_ALDFFE_PPP_ x
48
49 select -assert-count 2 aldff/t:$_NOT_
50 select -assert-count 3 aldffe/t:$_NOT_
51 select -assert-count 7 t:$_ALDFFE_PPP_
52 select -assert-none t:$_ALDFFE_PPP_ t:$_NOT_ top/* %% %n t:* %i
53
54
55 # Convert everything to DFFSRs.
56
57 design -load orig
58 dfflegalize -cell $_DFFSR_PPP_ x
59
60 select -assert-count 2 aldff/t:$_AND_
61 select -assert-count 3 aldffe/t:$_AND_
62 select -assert-count 2 aldff/t:$_ANDNOT_
63 select -assert-count 3 aldffe/t:$_ANDNOT_
64 select -assert-count 1 aldff/t:$_OR_
65 select -assert-count 1 aldffe/t:$_OR_
66 select -assert-count 1 aldff/t:$_ORNOT_
67 select -assert-count 1 aldffe/t:$_ORNOT_
68 select -assert-count 3 aldff/t:$_NOT_
69 select -assert-count 3 aldffe/t:$_NOT_
70 select -assert-count 0 aldff/t:$_MUX_
71 select -assert-count 4 aldffe/t:$_MUX_
72 select -assert-count 7 t:$_DFFSR_PPP_
73 select -assert-none t:$_DFFSR_PPP_ t:$_MUX_ t:$_NOT_ t:$_AND_ t:$_ANDNOT_ t:$_OR_ t:$_ORNOT_ top/* %% %n t:* %i
74
75
76 # Convert everything to DFFSREs.
77
78 design -load orig
79 dfflegalize -cell $_DFFSRE_PPPP_ x
80
81 select -assert-count 2 aldff/t:$_AND_
82 select -assert-count 3 aldffe/t:$_AND_
83 select -assert-count 2 aldff/t:$_ANDNOT_
84 select -assert-count 3 aldffe/t:$_ANDNOT_
85 select -assert-count 1 aldff/t:$_OR_
86 select -assert-count 1 aldffe/t:$_OR_
87 select -assert-count 1 aldff/t:$_ORNOT_
88 select -assert-count 1 aldffe/t:$_ORNOT_
89 select -assert-count 3 aldff/t:$_NOT_
90 select -assert-count 4 aldffe/t:$_NOT_
91 select -assert-count 7 t:$_DFFSRE_PPPP_
92 select -assert-none t:$_DFFSRE_PPPP_ t:$_NOT_ t:$_AND_ t:$_ANDNOT_ t:$_OR_ t:$_ORNOT_ top/* %% %n t:* %i