tests/techmap/dfflegalize_sr_init.ys

   1 read_verilog -icells <<EOT
   2
   3 module sr0(input R, S, (* init = 3'h0 *) output [2:0] Q);
   4 $_SR_PP_ ff0 (.R(R), .S(S), .Q(Q[0]));
   5 $_SR_PN_ ff1 (.R(R), .S(S), .Q(Q[1]));
   6 $_SR_NP_ ff2 (.R(R), .S(S), .Q(Q[2]));
   7 endmodule
   8
   9 module sr1(input R, S, (* init = 3'h7 *) output [2:0] Q);
  10 $_SR_PP_ ff0 (.R(R), .S(S), .Q(Q[0]));
  11 $_SR_PN_ ff1 (.R(R), .S(S), .Q(Q[1]));
  12 $_SR_NP_ ff2 (.R(R), .S(S), .Q(Q[2]));
  13 endmodule
  14
  15 module top(input C, E, R, D, output [5:0] Q);
  16 sr0 sr0_(.S(S), .R(R), .Q(Q[2:0]));
  17 sr1 sr1_(.S(S), .R(R), .Q(Q[5:3]));
  18 endmodule
  19
  20 EOT
  21
  22 design -save orig
  23 flatten
  24 #equiv_opt -assert -multiclock dfflegalize -cell $_SR_PP_ 0
  25 #equiv_opt -assert -multiclock dfflegalize -cell $_SR_PP_ 1
  26 #equiv_opt -assert -multiclock dfflegalize -cell $_DLATCH_PP0_ 0
  27 #equiv_opt -assert -multiclock dfflegalize -cell $_DLATCH_PP0_ 1
  28 #equiv_opt -assert -multiclock dfflegalize -cell $_DLATCH_PP1_ 0
  29 #equiv_opt -assert -multiclock dfflegalize -cell $_DLATCH_PP1_ 1
  30 #equiv_opt -assert -multiclock dfflegalize -cell $_DLATCHSR_PPP_ 0
  31 #equiv_opt -assert -multiclock dfflegalize -cell $_DLATCHSR_PPP_ 1
  32 #equiv_opt -assert -multiclock dfflegalize -cell $_DFFSR_PPP_ 0
  33 #equiv_opt -assert -multiclock dfflegalize -cell $_DFFSR_PPP_ 1
  34 #equiv_opt -assert -multiclock dfflegalize -cell $_DFFSRE_PPPP_ 0
  35 #equiv_opt -assert -multiclock dfflegalize -cell $_DFFSRE_PPPP_ 1
  36
  37
  38 # Convert everything to SRs.
  39
  40 design -load orig
  41 dfflegalize -cell $_SR_PP_ 0
  42
  43 select -assert-count 2 sr0/t:$_NOT_
  44 select -assert-count 5 sr1/t:$_NOT_
  45 select -assert-count 3 sr0/t:$_SR_PP_
  46 select -assert-count 3 sr1/t:$_SR_PP_
  47 select -assert-count 0 sr0/t:$_ANDNOT_
  48 select -assert-count 1 sr1/t:$_ANDNOT_
  49 select -assert-count 0 sr0/t:$_AND_
  50 select -assert-count 1 sr1/t:$_AND_
  51 select -assert-count 0 sr0/t:$_OR_
  52 select -assert-count 1 sr1/t:$_OR_
  53 select -assert-none t:$_SR_PP_ t:$_NOT_ t:$_ANDNOT_ t:$_OR_ t:$_AND_ top/* %% %n t:* %i
  54
  55 design -load orig
  56 dfflegalize -cell $_SR_PP_ 1
  57
  58 select -assert-count 5 sr0/t:$_NOT_
  59 select -assert-count 2 sr1/t:$_NOT_
  60 select -assert-count 3 sr0/t:$_SR_PP_
  61 select -assert-count 3 sr1/t:$_SR_PP_
  62 select -assert-count 1 sr0/t:$_ANDNOT_
  63 select -assert-count 0 sr1/t:$_ANDNOT_
  64 select -assert-count 1 sr0/t:$_AND_
  65 select -assert-count 0 sr1/t:$_AND_
  66 select -assert-count 1 sr0/t:$_OR_
  67 select -assert-count 0 sr1/t:$_OR_
  68 select -assert-none t:$_SR_PP_ t:$_NOT_ t:$_ANDNOT_ t:$_OR_ t:$_AND_ top/* %% %n t:* %i
  69
  70
  71 # Convert everything to ADLATCHs.
  72
  73 design -load orig
  74 dfflegalize -cell $_DLATCH_PP0_ 0
  75
  76 select -assert-count 2 sr0/t:$_NOT_
  77 select -assert-count 5 sr1/t:$_NOT_
  78 select -assert-count 3 sr0/t:$_DLATCH_PP0_
  79 select -assert-count 3 sr1/t:$_DLATCH_PP0_
  80 select -assert-count 0 sr0/t:$_ANDNOT_
  81 select -assert-count 1 sr1/t:$_ANDNOT_
  82 select -assert-count 0 sr0/t:$_AND_
  83 select -assert-count 1 sr1/t:$_AND_
  84 select -assert-count 0 sr0/t:$_OR_
  85 select -assert-count 1 sr1/t:$_OR_
  86 select -assert-none t:$_DLATCH_PP0_ t:$_NOT_ t:$_ANDNOT_ t:$_OR_ t:$_AND_ top/* %% %n t:* %i
  87
  88 design -load orig
  89 dfflegalize -cell $_DLATCH_PP0_ 1
  90
  91 select -assert-count 5 sr0/t:$_NOT_
  92 select -assert-count 2 sr1/t:$_NOT_
  93 select -assert-count 3 sr0/t:$_DLATCH_PP0_
  94 select -assert-count 3 sr1/t:$_DLATCH_PP0_
  95 select -assert-count 1 sr0/t:$_ANDNOT_
  96 select -assert-count 0 sr1/t:$_ANDNOT_
  97 select -assert-count 1 sr0/t:$_AND_
  98 select -assert-count 0 sr1/t:$_AND_
  99 select -assert-count 1 sr0/t:$_OR_
 100 select -assert-count 0 sr1/t:$_OR_
 101 select -assert-none t:$_DLATCH_PP0_ t:$_NOT_ t:$_ANDNOT_ t:$_OR_ t:$_AND_ top/* %% %n t:* %i
 102
 103 design -load orig
 104 dfflegalize -cell $_DLATCH_PP1_ 0
 105
 106 select -assert-count 11 sr0/t:$_NOT_
 107 select -assert-count 8 sr1/t:$_NOT_
 108 select -assert-count 3 sr0/t:$_DLATCH_PP1_
 109 select -assert-count 3 sr1/t:$_DLATCH_PP1_
 110 select -assert-count 1 sr0/t:$_ANDNOT_
 111 select -assert-count 0 sr1/t:$_ANDNOT_
 112 select -assert-count 1 sr0/t:$_AND_
 113 select -assert-count 0 sr1/t:$_AND_
 114 select -assert-count 1 sr0/t:$_OR_
 115 select -assert-count 0 sr1/t:$_OR_
 116 select -assert-none t:$_DLATCH_PP1_ t:$_NOT_ t:$_ANDNOT_ t:$_OR_ t:$_AND_ top/* %% %n t:* %i
 117
 118 design -load orig
 119 dfflegalize -cell $_DLATCH_PP1_ 1
 120
 121 select -assert-count 8 sr0/t:$_NOT_
 122 select -assert-count 11 sr1/t:$_NOT_
 123 select -assert-count 3 sr0/t:$_DLATCH_PP1_
 124 select -assert-count 3 sr1/t:$_DLATCH_PP1_
 125 select -assert-count 0 sr0/t:$_ANDNOT_
 126 select -assert-count 1 sr1/t:$_ANDNOT_
 127 select -assert-count 0 sr0/t:$_AND_
 128 select -assert-count 1 sr1/t:$_AND_
 129 select -assert-count 0 sr0/t:$_OR_
 130 select -assert-count 1 sr1/t:$_OR_
 131 select -assert-none t:$_DLATCH_PP1_ t:$_NOT_ t:$_ANDNOT_ t:$_OR_ t:$_AND_ top/* %% %n t:* %i
 132
 133
 134 # Convert everything to DLATCHSRs.
 135
 136 design -load orig
 137 dfflegalize -cell $_DLATCHSR_PPP_ 0
 138
 139 select -assert-count 2 sr0/t:$_NOT_
 140 select -assert-count 5 sr1/t:$_NOT_
 141 select -assert-count 3 sr0/t:$_DLATCHSR_PPP_
 142 select -assert-count 3 sr1/t:$_DLATCHSR_PPP_
 143 select -assert-count 0 sr0/t:$_ANDNOT_
 144 select -assert-count 1 sr1/t:$_ANDNOT_
 145 select -assert-count 0 sr0/t:$_AND_
 146 select -assert-count 1 sr1/t:$_AND_
 147 select -assert-count 0 sr0/t:$_OR_
 148 select -assert-count 1 sr1/t:$_OR_
 149 select -assert-none t:$_DLATCHSR_PPP_ t:$_NOT_ t:$_ANDNOT_ t:$_OR_ t:$_AND_ top/* %% %n t:* %i
 150
 151 design -load orig
 152 dfflegalize -cell $_DLATCHSR_PPP_ 1
 153
 154 select -assert-count 5 sr0/t:$_NOT_
 155 select -assert-count 2 sr1/t:$_NOT_
 156 select -assert-count 3 sr0/t:$_DLATCHSR_PPP_
 157 select -assert-count 3 sr1/t:$_DLATCHSR_PPP_
 158 select -assert-count 1 sr0/t:$_ANDNOT_
 159 select -assert-count 0 sr1/t:$_ANDNOT_
 160 select -assert-count 1 sr0/t:$_AND_
 161 select -assert-count 0 sr1/t:$_AND_
 162 select -assert-count 1 sr0/t:$_OR_
 163 select -assert-count 0 sr1/t:$_OR_
 164 select -assert-none t:$_DLATCHSR_PPP_ t:$_NOT_ t:$_ANDNOT_ t:$_OR_ t:$_AND_ top/* %% %n t:* %i
 165
 166
 167 # Convert everything to DFFSRs.
 168
 169 design -load orig
 170 dfflegalize -cell $_DFFSR_PPP_ 0
 171
 172 select -assert-count 2 sr0/t:$_NOT_
 173 select -assert-count 5 sr1/t:$_NOT_
 174 select -assert-count 3 sr0/t:$_DFFSR_PPP_
 175 select -assert-count 3 sr1/t:$_DFFSR_PPP_
 176 select -assert-count 0 sr0/t:$_ANDNOT_
 177 select -assert-count 1 sr1/t:$_ANDNOT_
 178 select -assert-count 0 sr0/t:$_AND_
 179 select -assert-count 1 sr1/t:$_AND_
 180 select -assert-count 0 sr0/t:$_OR_
 181 select -assert-count 1 sr1/t:$_OR_
 182 select -assert-none t:$_DFFSR_PPP_ t:$_NOT_ t:$_ANDNOT_ t:$_OR_ t:$_AND_ top/* %% %n t:* %i
 183
 184 design -load orig
 185 dfflegalize -cell $_DFFSR_PPP_ 1
 186
 187 select -assert-count 5 sr0/t:$_NOT_
 188 select -assert-count 2 sr1/t:$_NOT_
 189 select -assert-count 3 sr0/t:$_DFFSR_PPP_
 190 select -assert-count 3 sr1/t:$_DFFSR_PPP_
 191 select -assert-count 1 sr0/t:$_ANDNOT_
 192 select -assert-count 0 sr1/t:$_ANDNOT_
 193 select -assert-count 1 sr0/t:$_AND_
 194 select -assert-count 0 sr1/t:$_AND_
 195 select -assert-count 1 sr0/t:$_OR_
 196 select -assert-count 0 sr1/t:$_OR_
 197 select -assert-none t:$_DFFSR_PPP_ t:$_NOT_ t:$_ANDNOT_ t:$_OR_ t:$_AND_ top/* %% %n t:* %i
 198
 199
 200 # Convert everything to DFFSREs.
 201
 202 design -load orig
 203 dfflegalize -cell $_DFFSRE_PPPP_ 0
 204
 205 select -assert-count 2 sr0/t:$_NOT_
 206 select -assert-count 5 sr1/t:$_NOT_
 207 select -assert-count 3 sr0/t:$_DFFSRE_PPPP_
 208 select -assert-count 3 sr1/t:$_DFFSRE_PPPP_
 209 select -assert-count 0 sr0/t:$_ANDNOT_
 210 select -assert-count 1 sr1/t:$_ANDNOT_
 211 select -assert-count 0 sr0/t:$_AND_
 212 select -assert-count 1 sr1/t:$_AND_
 213 select -assert-count 0 sr0/t:$_OR_
 214 select -assert-count 1 sr1/t:$_OR_
 215 select -assert-none t:$_DFFSRE_PPPP_ t:$_NOT_ t:$_ANDNOT_ t:$_OR_ t:$_AND_ top/* %% %n t:* %i
 216
 217 design -load orig
 218 dfflegalize -cell $_DFFSRE_PPPP_ 1
 219
 220 select -assert-count 5 sr0/t:$_NOT_
 221 select -assert-count 2 sr1/t:$_NOT_
 222 select -assert-count 3 sr0/t:$_DFFSRE_PPPP_
 223 select -assert-count 3 sr1/t:$_DFFSRE_PPPP_
 224 select -assert-count 1 sr0/t:$_ANDNOT_
 225 select -assert-count 0 sr1/t:$_ANDNOT_
 226 select -assert-count 1 sr0/t:$_AND_
 227 select -assert-count 0 sr1/t:$_AND_
 228 select -assert-count 1 sr0/t:$_OR_
 229 select -assert-count 0 sr1/t:$_OR_
 230 select -assert-none t:$_DFFSRE_PPPP_ t:$_NOT_ t:$_ANDNOT_ t:$_OR_ t:$_AND_ top/* %% %n t:* %i