tests/test-progs/asmtest/src/riscv/isa/rv64uamt/lrsc_d.S

   1 /*
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  35
  36 //------------------------------------------------------------------------
  37 // This code tests lr.d and sc.d instructions in multi-threading system.
  38 // All threads execute a critical section LOOP_COUNT times. A thread
  39 // gets into a critical section by acquiring a lock variable (i.e.,
  40 // shared_var) and checking return value.
  41 // 0 means the lock is not being locked. Each thread increments
  42 // a variable (i.e., var) inside the critical section and releases the
  43 // lock by swapping back 0 to the lock variable.
  44 // The master thread (i.e., thread 0) waits for all threads to complete
  45 // and compare the var's value to the expected result.
  46 //------------------------------------------------------------------------
  47
  48 #include "riscv_test.h"
  49 #include "test_macros.h"
  50 #include "test_macros_mt.h"
  51
  52   RVTEST_RV64U
  53   RVTEST_CODE_BEGIN
  54
  55 #define LOOP_COUNT  1000
  56 #define RESULT      NUM_THREADS * LOOP_COUNT
  57
  58 //------------------------------------------------------------------------
  59 // Master thread creates new threads, waits for all threads to complete,
  60 // deallocates threads and checks result
  61 //------------------------------------------------------------------------
  62   call _create_threads
  63   call _join
  64   call _delete_threads
  65   call _check
  66
  67   RVTEST_CODE_END
  68
  69 //------------------------------------------------------------------------
  70 // mt_test function executed in child threads
  71 // A child thread signals its completion by atomicaly adding 1 to barrier
  72 //------------------------------------------------------------------------
  73 _mt_test:
  74   li        t0, 1               // initialize the swap value (1-locked)
  75   li        t1, LOOP_COUNT
  76   la        t2, var             // load the var's address
  77   la        a0, shared_var
  78
  79 1:
  80   lr.d.aq       s2, (a0)        // load and reserve a0
  81   bnez          s2, 1b          // retry lr if the lock is being held
  82   sc.d.rl       s2, t0, (a0)    // try to lock a0
  83   bnez          s2, 1b          // retry if sc failed
  84
  85   lw            t3, (t2)        // load the var's value
  86   addi          t3, t3, 1       // add 1 to the value
  87   sw            t3, (t2)        // store the new value to var
  88
  89   sd            zero, (a0)      // release the lock by storing 0 to a0
  90
  91   addi          t1, t1, -1      // decrement the loop_count
  92   bnez          t1, 1b          // repeat if not done yet
  93
  94   la            a0, barrier
  95   amoadd.d      zero, t0, (a0)  // signal this thread's completion
  96
  97   RVTEST_CODE_END
  98
  99 //------------------------------------------------------------------------
 100 // Master thread checks result
 101 //------------------------------------------------------------------------
 102 _check:
 103   la        a0, var
 104   li        a1, RESULT
 105   ld        a0, (a0)
 106   bne       a0, a1, _fail
 107   li        a0, SUCCESS
 108   ret
 109
 110 _fail:
 111   li        a0, FAILURE
 112   ret
 113
 114   .data
 115
 116 MT_DATA
 117 var: .dword   0