tests/various/abc9.v

   1 module abc9_test027(output reg o);
   2 initial o = 1'b0;
   3 always @*
   4     o <= ~o;
   5 endmodule
   6
   7 module abc9_test028(input i, output o);
   8 wire w;
   9 unknown u(~i, w);
  10 unknown2 u2(w, o);
  11 endmodule
  12
  13 module abc9_test032(input clk, d, r, output reg q);
  14 initial q = 1'b0;
  15 always @(negedge clk or negedge r)
  16     if (!r) q <= 1'b0;
  17     else q <= d;
  18 endmodule