tests/various/hierarchy_param.ys

   1 read_verilog <<EOT
   2
   3 module bb (...);
   4 parameter A = "abc";
   5 parameter B = 1;
   6 parameter C = 2;
   7 input a;
   8 output b;
   9 endmodule
  10
  11 module top (...);
  12 input a;
  13 output b;
  14 bb #("def", 3) my_bb (a, b);
  15 endmodule
  16
  17 EOT
  18
  19 hierarchy -top top
  20 dump
  21
  22 select -assert-count 1 t:bb r:A=def %i
  23 select -assert-count 1 t:bb r:B=3 %i