tests/various/memory_word_as_index.ys

   1 read_verilog memory_word_as_index.v
   2
   3 hierarchy
   4 proc
   5 memory
   6 flatten
   7 opt -full
   8
   9 equiv_make gold gate1 equiv
  10 equiv_simple
  11 equiv_status -assert
  12
  13 delete equiv
  14
  15 equiv_make gold gate2 equiv
  16 equiv_simple
  17 equiv_status -assert
  18
  19 delete equiv
  20
  21 equiv_make gold gate3 equiv
  22 equiv_simple
  23 equiv_status -assert