Move neg-pol to pos-pol mapping from ff_map to cells_map.v
[yosys.git] / tests / various / muxpack.ys
1 read_verilog muxpack.v
2 design -save read
3 hierarchy -top mux_if_unbal_4_1
4 prep
5 design -save gold
6 muxpack
7 opt
8 stat
9 select -assert-count 0 t:$mux
10 select -assert-count 1 t:$pmux
11 design -stash gate
12 design -import gold -as gold
13 design -import gate -as gate
14 miter -equiv -flatten -make_assert -make_outputs gold gate miter
15 sat -verify -prove-asserts -show-ports miter
16
17 design -load read
18 hierarchy -top mux_if_unbal_5_3
19 prep
20 design -save gold
21 muxpack
22 opt
23 stat
24 select -assert-count 0 t:$mux
25 select -assert-count 1 t:$pmux
26 design -stash gate
27 design -import gold -as gold
28 design -import gate -as gate
29 miter -equiv -flatten -make_assert -make_outputs gold gate miter
30 sat -verify -prove-asserts -show-ports miter
31
32 design -load read
33 hierarchy -top mux_if_unbal_5_3_invert
34 prep
35 design -save gold
36 muxpack
37 opt
38 stat
39 select -assert-count 0 t:$mux
40 select -assert-count 1 t:$pmux
41 design -stash gate
42 design -import gold -as gold
43 design -import gate -as gate
44 miter -equiv -flatten -make_assert -make_outputs gold gate miter
45 sat -verify -prove-asserts -show-ports miter
46
47 design -load read
48 hierarchy -top mux_if_unbal_5_3_width_mismatch
49 prep
50 design -save gold
51 muxpack
52 opt
53 stat
54 select -assert-count 0 t:$mux
55 select -assert-count 2 t:$pmux
56 design -stash gate
57 design -import gold -as gold
58 design -import gate -as gate
59 miter -equiv -flatten -make_assert -make_outputs gold gate miter
60 sat -verify -prove-asserts -show-ports miter
61
62 design -load read
63 hierarchy -top mux_if_unbal_4_1_missing
64 prep
65 design -save gold
66 muxpack
67 opt
68 stat
69 select -assert-count 0 t:$mux
70 select -assert-count 1 t:$pmux
71 design -stash gate
72 design -import gold -as gold
73 design -import gate -as gate
74 miter -equiv -flatten -make_assert -make_outputs gold gate miter
75 sat -verify -prove-asserts -show-ports miter
76
77 design -load read
78 hierarchy -top mux_if_unbal_5_3_order
79 prep
80 design -save gold
81 muxpack
82 opt
83 stat
84 select -assert-count 0 t:$mux
85 select -assert-count 1 t:$pmux
86 design -stash gate
87 design -import gold -as gold
88 design -import gate -as gate
89 miter -equiv -flatten -make_assert -make_outputs gold gate miter
90 sat -verify -prove-asserts -show-ports miter
91
92 design -load read
93 hierarchy -top mux_if_unbal_4_1_nonexcl
94 prep
95 design -save gold
96 muxpack
97 opt
98 stat
99 select -assert-count 0 t:$mux
100 select -assert-count 1 t:$pmux
101 design -stash gate
102 design -import gold -as gold
103 design -import gate -as gate
104 miter -equiv -flatten -make_assert -make_outputs gold gate miter
105 sat -verify -prove-asserts -show-ports miter
106
107 design -load read
108 hierarchy -top mux_if_unbal_5_3_nonexcl
109 prep
110 design -save gold
111 muxpack
112 opt
113 stat
114 select -assert-count 0 t:$mux
115 select -assert-count 1 t:$pmux
116 design -stash gate
117 design -import gold -as gold
118 design -import gate -as gate
119 miter -equiv -flatten -make_assert -make_outputs gold gate miter
120 sat -verify -prove-asserts -show-ports miter
121
122 design -load read
123 hierarchy -top mux_case_unbal_8_7
124 prep
125 design -save gold
126 muxpack
127 opt
128 stat
129 select -assert-count 0 t:$mux
130 select -assert-count 1 t:$pmux
131 design -stash gate
132 design -import gold -as gold
133 design -import gate -as gate
134 miter -equiv -flatten -make_assert -make_outputs gold gate miter
135 sat -verify -prove-asserts -show-ports miter