tests/various/muxpack.ys

   1 read_verilog muxpack.v
   2 design -save read
   3 hierarchy -top mux_if_unbal_4_1
   4 prep
   5 design -save gold
   6 muxpack
   7 opt
   8 stat
   9 select -assert-count 1 t:$pmux
  10 design -stash gate
  11 design -import gold -as gold
  12 design -import gate -as gate
  13 miter -equiv -flatten -make_assert -make_outputs gold gate miter
  14 sat -verify -prove-asserts -show-ports miter
  15
  16 design -load read
  17 hierarchy -top mux_if_unbal_5_3
  18 prep
  19 design -save gold
  20 muxpack
  21 opt
  22 stat
  23 select -assert-count 1 t:$pmux
  24 design -stash gate
  25 design -import gold -as gold
  26 design -import gate -as gate
  27 miter -equiv -flatten -make_assert -make_outputs gold gate miter
  28 sat -verify -prove-asserts -show-ports miter
  29
  30 design -load read
  31 hierarchy -top mux_if_unbal_5_3_invert
  32 prep
  33 design -save gold
  34 muxpack
  35 opt
  36 stat
  37 select -assert-count 1 t:$pmux
  38 design -stash gate
  39 design -import gold -as gold
  40 design -import gate -as gate
  41 miter -equiv -flatten -make_assert -make_outputs gold gate miter
  42 sat -verify -prove-asserts -show-ports miter