tests/verilog/func_arg_mismatch_2.ys

   1 logger -expect error "Incompatible re-declaration of constant function wire" 1
   2 read_verilog -sv <<EOT
   3 module top;
   4     function automatic integer f;
   5         input [0:0] inp;
   6         integer inp;
   7         f = inp;
   8     endfunction
   9     integer x;
  10     initial x = f(0);
  11 endmodule
  12 EOT