1 # Use condition code registers for the ARM architecture.
2 # Previously the integer register file was used for these registers.
4 if cpt
.get('root','isa') == 'arm':
5 for sec
in cpt
.sections():
8 re_cpu_match
= re
.match('^(.*sys.*\.cpu[^.]*)\.xc\.(.+)$', sec
)
9 # Search for all the execution contexts
14 for (item
,value
) in cpt
.items(sec
):
16 if 'ccRegs' not in items
:
17 intRegs
= cpt
.get(sec
, 'intRegs').split()
19 # Move those 5 integer registers to the ccRegs register file
20 ccRegs
= intRegs
[38:43]
23 ccRegs
.append('0') # CCREG_ZERO
25 cpt
.set(sec
, 'intRegs', ' '.join(intRegs
))
26 cpt
.set(sec
, 'ccRegs', ' '.join(ccRegs
))