1 # Copyright (c) 2015 ARM Limited
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37 """The gem5 GIC extensions change the size of many GIC data
38 structures. Resize them to match the new GIC."""
41 if cpt
.get('root','isa') != 'arm':
49 ("iccrpr", [ "0xff", ]),
50 ("cpuEnabled", [ "false", ]),
51 ("cpuPriority", [ "0xff", ]),
53 ("cpuHighestInt", [ "1023", ]),
54 ("cpuPpiPending", [ "0", ]),
55 ("cpuPpiActive", [ "0", ] ),
56 ("interrupt_time", [ "0", ]),
57 ("*bankedIntPriority", ["0", ] * (sgi_max
+ ppi_max
)),
60 ("cpuSgiPendingExt", "0"),
61 ("cpuSgiActiveExt", "0"),
64 for sec
in cpt
.sections():
65 if re
.search('.*\.gic$', sec
):
66 for reg
, default
in per_cpu_regs
:
67 value
= cpt
.get(sec
, reg
).split(" ")
68 assert len(value
) / len(default
) == old_cpu_max
, \
69 "GIC register size mismatch"
70 value
+= [ " ".join(default
), ] * (new_cpu_max
- old_cpu_max
)
71 cpt
.set(sec
, reg
, " ".join(value
))
73 for reg
, default
in new_per_cpu_regs
:
74 cpt
.set(sec
, reg
, " ".join([ default
, ] * new_cpu_max
))