1 # Add the ARM MISCREG TEEHBR
3 if cpt
.get('root','isa') == 'arm':
4 for sec
in cpt
.sections():
6 # Search for all ISA sections
7 if re
.search('.*sys.*\.cpu.*\.isa$', sec
):
8 mr
= cpt
.get(sec
, 'miscRegs').split()
10 print("MISCREG_TEEHBR already seems to be inserted.")
12 mr
.insert(51,0); # Add dummy value for MISCREG_TEEHBR
13 cpt
.set(sec
, 'miscRegs', ' '.join(str(x
) for x
in mr
))