misc: Merged release-staging-v19.0.0.0 into develop
[gem5.git] / util / cpt_upgraders / remove-arm-cpsr-mode-miscreg.py
1 # Remove the MISCREG_CPSR_MODE register from the ARM register file
2 def upgrader(cpt):
3 if cpt.get('root','isa') == 'arm':
4 for sec in cpt.sections():
5 import re
6 # Search for all ISA sections
7 if re.search('.*sys.*\.cpu.*\.isa$', sec):
8 mr = cpt.get(sec, 'miscRegs').split()
9 # Remove MISCREG_CPSR_MODE
10 del mr[137]
11 cpt.set(sec, 'miscRegs', ' '.join(str(x) for x in mr))
12
13 legacy_version = 5