3 # Copyright (c) 2015 ARM Limited
6 # The license below extends only to copyright in the software and shall
7 # not be construed as granting a license to any other intellectual
8 # property including but not limited to intellectual property relating
9 # to a hardware implementation of the functionality of the software
10 # licensed hereunder. You may use the software subject to the license
11 # terms below provided that you ensure that this notice is replicated
12 # unmodified and in its entirety in all distributions of the software,
13 # modified or unmodified, in source code or in binary form.
15 # Redistribution and use in source and binary forms, with or without
16 # modification, are permitted provided that the following conditions are
17 # met: redistributions of source code must retain the above copyright
18 # notice, this list of conditions and the following disclaimer;
19 # redistributions in binary form must reproduce the above copyright
20 # notice, this list of conditions and the following disclaimer in the
21 # documentation and/or other materials provided with the distribution;
22 # neither the name of the copyright holders nor the names of its
23 # contributors may be used to endorse or promote products derived from
24 # this software without specific prior written permission.
26 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 # Copyright 2008 Google Inc. All rights reserved.
39 # http://code.google.com/p/protobuf/
41 # Redistribution and use in source and binary forms, with or without
42 # modification, are permitted provided that the following conditions are
45 # * Redistributions of source code must retain the above copyright
46 # notice, this list of conditions and the following disclaimer.
47 # * Redistributions in binary form must reproduce the above
48 # copyright notice, this list of conditions and the following disclaimer
49 # in the documentation and/or other materials provided with the
51 # * Neither the name of Google Inc. nor the names of its
52 # contributors may be used to endorse or promote products derived from
53 # this software without specific prior written permission.
55 # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
56 # "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
57 # LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
58 # A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
59 # OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
60 # SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
61 # LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
62 # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
63 # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
64 # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
65 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 # Authors: Radhika Jagtap
70 # This script is used to dump ASCII traces of the instruction dependency
71 # graph to protobuf format.
73 # The ASCII trace format uses one line per instruction with the format
74 # instruction sequence number, (optional) pc, (optional) weight, load, store,
75 # (optional) flags, (optional) addr, (optional) size, comp delay,
76 # (repeated) order dependencies comma-separated, and (repeated) register
77 # dependencies comma-separated.
80 # seq_num,[pc],[weight,]load,store,[address,size,flags,]comp_delay:[rob_dep]:
82 # 1,1,False,False,8500::
83 # 2,1,False,False,1000:,1:
84 # 3,1,True,False,831248,4,74,500:,2:
85 # 4,1,False,False,0:,2:
86 # 5,1,False,False,500::,4
87 # 6,1,False,True,831248,4,74,1000:,3:,4,5
92 # Import the packet proto definitions. If they are not found, attempt
93 # to generate them automatically. This assumes that the script is
94 # executed from the gem5 root.
96 import inst_dep_record_pb2
98 print "Did not find proto definition, attempting to generate"
99 from subprocess
import call
100 error
= call(['protoc', '--python_out=util', '--proto_path=src/proto',
101 'src/proto/inst_dep_record.proto'])
103 import inst_dep_record_pb2
104 print "Generated proto definitions for instruction dependency record"
106 print "Failed to import proto definitions"
110 if len(sys
.argv
) != 3:
111 print "Usage: ", sys
.argv
[0], " <ASCII input> <protobuf output>"
114 # Open the file in write mode
115 proto_out
= open(sys
.argv
[2], 'wb')
117 # Open the file in read mode
119 ascii_in
= open(sys
.argv
[1], 'r')
121 print "Failed to open ", sys
.argv
[1], " for reading"
124 # Write the magic number in 4-byte Little Endian, similar to what
125 # is done in src/proto/protoio.cc
126 proto_out
.write("gem5")
128 # Add the packet header
129 header
= inst_dep_record_pb2
.InstDepRecordHeader()
130 header
.obj_id
= "Converted ASCII trace " + sys
.argv
[1]
131 # Assume the default tick rate
132 header
.tick_freq
= 1000000000
133 header
.window_size
= 120
134 protolib
.encodeMessage(proto_out
, header
)
137 # For each line in the ASCII trace, create a packet message and
138 # write it to the encoded output
139 for line
in ascii_in
:
140 inst_info_str
, rob_dep_str
, reg_dep_str
= (line
.strip()).split(':')
141 inst_info_list
= inst_info_str
.split(',')
142 dep_record
= inst_dep_record_pb2
.InstDepRecord()
144 dep_record
.seq_num
= long(inst_info_list
[0])
145 dep_record
.pc
= long(inst_info_list
[1])
146 dep_record
.weight
= long(inst_info_list
[2])
147 dep_record
.load
= True if inst_info_list
[3] == 'True' else False
148 dep_record
.store
= True if inst_info_list
[4] == 'True' else False
150 # If the instruction is a load or store record the addr, size flags
151 # in addition to recording the computation delay
152 if dep_record
.load
or dep_record
.store
:
153 addr
, size
, flags
, comp_delay
= inst_info_list
[5:9]
154 dep_record
.addr
= long(addr
)
155 dep_record
.size
= int(size
)
156 dep_record
.flags
= int(flags
)
157 dep_record
.comp_delay
= long(comp_delay
)
158 elif not dep_record
.load
and not dep_record
.store
:
159 comp_delay
= inst_info_list
[4]
160 dep_record
.comp_delay
= long(comp_delay
)
162 print "Fatal:", seq_num
, "is both load and store"
165 # Parse the register and order dependencies both of which are
166 # repeated fields. An empty list is valid.
167 rob_deps
= rob_dep_str
.strip().split(',')
168 for a_dep
in rob_deps
:
169 # if the string is empty, split(',') returns 1 item: ''
170 # if the string is ",4", split(',') returns 2 items: '', '4'
171 # long('') gives error, so check if the item is non-empty
173 dep_record
.rob_dep
.append(long(a_dep
))
175 reg_deps
= reg_dep_str
.split(',')
176 for a_dep
in reg_deps
:
178 dep_record
.reg_dep
.append(long(a_dep
))
180 protolib
.encodeMessage(proto_out
, dep_record
)
183 print "Converted", num_records
, "records."
188 if __name__
== "__main__":