util/m5/m5op.S

   1 /*
   2  * Copyright (c) 2003-2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Nathan Binkert
  29  *          Ali Saidi
  30  */
  31
  32 #define m5_op 0x01
  33
  34 #define arm_func 0x00
  35 #define quiesce_func 0x01
  36 #define quiescens_func 0x02
  37 #define quiescecycle_func 0x03
  38 #define quiescetime_func 0x04
  39 #define ivlb_func 0x10
  40 #define ivle_func 0x11
  41 #define exit_old_func 0x20 // deprectated!
  42 #define exit_func 0x21
  43 #define initparam_func 0x30
  44 #define loadsymbol_func 0x31
  45 #define resetstats_func 0x40
  46 #define dumpstats_func 0x41
  47 #define dumprststats_func 0x42
  48 #define ckpt_func 0x43
  49 #define readfile_func 0x50
  50 #define debugbreak_func 0x51
  51 #define switchcpu_func 0x52
  52 #define addsymbol_func 0x53
  53 #define panic_func     0x54
  54 #define anbegin_func     0x55
  55 #define anwait_func     0x56
  56
  57 #define INST(op, ra, rb, func) \
  58         .long (((op) << 26) | ((ra) << 21) | ((rb) << 16) | (func))
  59
  60 #define LEAF(func)    \
  61         .align 3;     \
  62         .globl  func; \
  63         .ent    func; \
  64 func:
  65
  66 #define RET           \
  67         ret     ($26)
  68
  69 #define END(func)     \
  70         .end func
  71
  72 #define ARM(reg) INST(m5_op, reg, 0, arm_func)
  73 #define QUIESCE INST(m5_op, 0, 0, quiesce_func)
  74 #define QUIESCENS(r1) INST(m5_op, r1, 0, quiescens_func)
  75 #define QUIESCECYC(r1) INST(m5_op, r1, 0, quiescecycle_func)
  76 #define QUIESCETIME INST(m5_op, 0, 0, quiescetime_func)
  77 #define IVLB(reg) INST(m5_op, reg, 0, ivlb_func)
  78 #define IVLE(reg) INST(m5_op, reg, 0, ivle_func)
  79 #define M5EXIT(reg) INST(m5_op, reg, 0, exit_func)
  80 #define INITPARAM(reg) INST(m5_op, reg, 0, initparam_func)
  81 #define LOADSYMBOL(reg) INST(m5_op, reg, 0, loadsymbol_func)
  82 #define RESET_STATS(r1, r2) INST(m5_op, r1, r2, resetstats_func)
  83 #define DUMP_STATS(r1, r2) INST(m5_op, r1, r2, dumpstats_func)
  84 #define DUMPRST_STATS(r1, r2) INST(m5_op, r1, r2, dumprststats_func)
  85 #define CHECKPOINT(r1, r2) INST(m5_op, r1, r2, ckpt_func)
  86 #define READFILE INST(m5_op, 0, 0, readfile_func)
  87 #define DEBUGBREAK INST(m5_op, 0, 0, debugbreak_func)
  88 #define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func)
  89 #define ADDSYMBOL(r1,r2) INST(m5_op, r1, r2, addsymbol_func)
  90 #define PANIC INST(m5_op, 0, 0, panic_func)
  91 #define AN_BEGIN(r1) INST(m5_op, r1, 0, anbegin_func)
  92 #define AN_WAIT(r1,r2) INST(m5_op, r1, r2, anwait_func)
  93
  94         .set noreorder
  95
  96         .align 4
  97 LEAF(arm)
  98         ARM(16)
  99         RET
 100 END(arm)
 101
 102         .align 4
 103 LEAF(quiesce)
 104         QUIESCE
 105         RET
 106 END(quiesce)
 107
 108         .align 4
 109 LEAF(quiesceNs)
 110         QUIESCENS(16)
 111         RET
 112 END(quiesceNs)
 113
 114         .align 4
 115 LEAF(quiesceCycle)
 116         QUIESCECYC(16)
 117         RET
 118 END(quiesceCycle)
 119
 120         .align 4
 121 LEAF(quiesceTime)
 122         QUIESCETIME
 123         RET
 124 END(quiesceTime)
 125
 126
 127         .align 4
 128 LEAF(m5_ivlb)
 129         IVLB(16)
 130         RET
 131 END(m5_ivlb)
 132
 133         .align 4
 134 LEAF(m5_ivle)
 135         IVLE(16)
 136         RET
 137 END(m5_ivle)
 138
 139         .align 4
 140 LEAF(m5_exit)
 141         M5EXIT(16)
 142         RET
 143 END(m5_exit)
 144
 145         .align 4
 146 LEAF(m5_initparam)
 147         INITPARAM(0)
 148         RET
 149 END(m5_initparam)
 150
 151         .align 4
 152 LEAF(m5_loadsymbol)
 153         LOADSYMBOL(0)
 154         RET
 155 END(m5_loadsymbol)
 156
 157         .align 4
 158 LEAF(m5_reset_stats)
 159         RESET_STATS(16, 17)
 160         RET
 161 END(m5_reset_stats)
 162
 163         .align 4
 164 LEAF(m5_dump_stats)
 165         DUMP_STATS(16, 17)
 166         RET
 167 END(m5_dump_stats)
 168
 169         .align 4
 170 LEAF(m5_dumpreset_stats)
 171         DUMPRST_STATS(16, 17)
 172         RET
 173 END(m5_dumpreset_stats)
 174
 175         .align 4
 176 LEAF(m5_checkpoint)
 177         CHECKPOINT(16, 17)
 178         RET
 179 END(m5_checkpoint)
 180
 181         .align 4
 182 LEAF(m5_readfile)
 183         READFILE
 184         RET
 185 END(m5_readfile)
 186
 187         .align 4
 188 LEAF(m5_debugbreak)
 189         DEBUGBREAK
 190         RET
 191 END(m5_debugbreak)
 192
 193         .align 4
 194 LEAF(m5_switchcpu)
 195         SWITCHCPU
 196         RET
 197 END(m5_switchcpu)
 198
 199         .align 4
 200 LEAF(m5_addsymbol)
 201         ADDSYMBOL(16, 17)
 202         RET
 203 END(m5_addsymbol)
 204
 205         .align 4
 206 LEAF(m5_panic)
 207         PANIC
 208         RET
 209 END(m5_panic)
 210
 211
 212         .align 4
 213 LEAF(m5_anbegin)
 214         AN_BEGIN(16)
 215         RET
 216 END(m5_anbegin)
 217
 218
 219         .align 4
 220 LEAF(m5_anwait)
 221         AN_WAIT(16,17)
 222         RET
 223 END(m5_anwait)
 224
 225