2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Nathan Binkert
36 #define INST(op, ra, rb, func) \
37 .long (((op) << 26) | ((ra) << 21) | ((rb) << 16) | (func))
51 #define ARM(reg) INST(m5_op, reg, 0, arm_func)
52 #define QUIESCE INST(m5_op, 0, 0, quiesce_func)
53 #define QUIESCENS(r1) INST(m5_op, r1, 0, quiescens_func)
54 #define QUIESCECYC(r1) INST(m5_op, r1, 0, quiescecycle_func)
55 #define QUIESCETIME INST(m5_op, 0, 0, quiescetime_func)
56 #define M5EXIT(reg) INST(m5_op, reg, 0, exit_func)
57 #define INITPARAM(reg) INST(m5_op, reg, 0, initparam_func)
58 #define LOADSYMBOL(reg) INST(m5_op, reg, 0, loadsymbol_func)
59 #define RESET_STATS(r1, r2) INST(m5_op, r1, r2, resetstats_func)
60 #define DUMP_STATS(r1, r2) INST(m5_op, r1, r2, dumpstats_func)
61 #define DUMPRST_STATS(r1, r2) INST(m5_op, r1, r2, dumprststats_func)
62 #define CHECKPOINT(r1, r2) INST(m5_op, r1, r2, ckpt_func)
63 #define READFILE INST(m5_op, 0, 0, readfile_func)
64 #define DEBUGBREAK INST(m5_op, 0, 0, debugbreak_func)
65 #define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func)
66 #define ADDSYMBOL(r1,r2) INST(m5_op, r1, r2, addsymbol_func)
67 #define PANIC INST(m5_op, 0, 0, panic_func)
68 #define AN_BEGIN(r1) INST(m5_op, r1, 0, anbegin_func)
69 #define AN_WAIT(r1,r2) INST(m5_op, r1, r2, anwait_func)
134 LEAF(m5_dumpreset_stats)
135 DUMPRST_STATS(16, 17)
137 END(m5_dumpreset_stats)